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Eǂ̂Ƃc
@@ԃXs[hɊւA߃tFb`Ŗǂޖ󂾂B

@@E int crw  int user_modeǂɂ{ɏoȂH
@@@@crw + (user_mode << 3) ̌`ŎH

      Ă݂܂BǂȂłB


EGȃX^bN̖
@@pusha esp==7,9,11,13,15 GPF(CȂ



Erepe/ne string
@@AstringߒɊO荞݂󂯕tȂB
@@hbP݂ rep̃JE^A ^C~OŊ荞݂
@@KvƂ\tgŕssB



EfoOWX^̃u[N
@@݂DR̃u[NgpAv݂͑Ȃ悤B
@@Ή̂ł ݂̌`ł͂Ȃ exec_1step()dA
@@VOXebv荞݂̂悤 ia32()ŐU蕪sȂƂ悢B



EVtg}N
	if ((s) == 0) CPU_FLAGL |= Z_FLAG;
	if ((s) & (1 << (SIZE - 1))) CPU_FLAGL |= S_FLAG;

	if ((s) == 0) CPU_FLAGL |= Z_FLAG;
	else if ((s) & (1 << (SIZE - 1))) CPU_FLAGL |= S_FLAG;

@@ǂH(elseŃWv܂c)

@@(FCPUɂĕς邪) ނc

	if ((s) == 0) CPU_FLAGL |= Z_FLAG;
	CPU_FLAGL |= ((s) >> (SIZE - 8)) & S_FLAG;

@@̕ʔH


	x86								ARM
	cmp 	(s), 0					cmp		(s), #0
	jne		short @f				orreq	CPU_FLAGL, CPU_FLAGL, #Z_FLAG
	or		CPU_FLAGL, Z_FLAG
@@:	test	(s), 1 << (SIZE - 1)	tst		(s), #(1 << (SIZE - 1))
	je		short @f				orrne	CPU_FLAGL, CPU_FLAGL, #S_FLAG
	or		CPU_FLAGL, S_FLAG
@@:

	cmp 	(s), 0					cmp		(s), #0
	jne		short @1				orreq	CPU_FLAGL, CPU_FLAGL, #Z_FLAG
	or		CPU_FLAGL, Z_FLAG		beq		@2
	jmp		short @2
@1:	test	(s), 1 << (SIZE - 1)	tst		(s), #(1 << (SIZE - 1))
	je		short @2				orrne	CPU_FLAGL, CPU_FLAGL, #S_FLAG
	or		CPU_FLAGL, S_FLAG
@2:

	mov		reg, (s)				movs	reg, (s)
	cmp		reg, 0
	jne		short @f
	or		CPU_FLAGL, Z_FLAG		orreq	CPU_FLAGL, CPU_FLAGL, Z_FLAG
@@:	shr		reg, SIZE - 8			mov		reg, reg lsr #(SIZE - 8)
	and		reg, S_FLAG				and		reg, reg, #S_FLAG
	or		CPU_FLAGL, reg			orr		CPU_FLAGL, reg, CPU_FLAGL

