/***********************************************************************
 * This file was generated by /build/libuhd/src/uhd/host/lib/ic_reg_maps/gen_rhcpld_regs.py on Thu Aug 13 13:47:33 2026
 **********************************************************************/

#ifndef INCLUDED_RHODIUM_CPLD_REGS_HPP
#define INCLUDED_RHODIUM_CPLD_REGS_HPP

#include <uhd/config.hpp>
#include <uhd/exception.hpp>
#include <set>
#include <vector>
#include <stdint.h>

class rhodium_cpld_regs_t{
public:
    uint16_t scratch;
    uint8_t reg6_reserved0;
    enum rx_sw1_t{
        RX_SW1_CAL_LOOPBACK = 0,
        RX_SW1_RX2 = 1,
        RX_SW1_ISOLATION = 2,
        RX_SW1_TXRX = 3
    };
    rx_sw1_t rx_sw1;
    enum rx_sw2_sw7_t{
        RX_SW2_SW7_LOWBAND = 0,
        RX_SW2_SW7_HIGHBAND = 1
    };
    rx_sw2_sw7_t rx_sw2_sw7;
    enum rx_sw3_t{
        RX_SW3_RX_SW4 = 0,
        RX_SW3_FILTER7 = 1,
        RX_SW3_FILTER6 = 2,
        RX_SW3_FILTER5 = 3
    };
    rx_sw3_t rx_sw3;
    enum rx_sw4_sw5_t{
        RX_SW4_SW5_FILTER2 = 1,
        RX_SW4_SW5_FILTER1 = 2,
        RX_SW4_SW5_FILTER4 = 4,
        RX_SW4_SW5_FILTER3 = 8
    };
    rx_sw4_sw5_t rx_sw4_sw5;
    enum rx_sw6_t{
        RX_SW6_FILTER5 = 0,
        RX_SW6_FILTER6 = 1,
        RX_SW6_FILTER7 = 2,
        RX_SW6_RX_SW5 = 3
    };
    rx_sw6_t rx_sw6;
    enum rx_gain_tbl_sel_t{
        RX_GAIN_TBL_SEL_LOWBAND = 0,
        RX_GAIN_TBL_SEL_HIGHBAND = 1
    };
    rx_gain_tbl_sel_t rx_gain_tbl_sel;
    uint8_t reg6_reserved1;
    uint8_t reg7_reserved0;
    enum tx_sw1_t{
        TX_SW1_LOWBAND_IF = 0,
        TX_SW1_TX_SW2 = 1,
        TX_SW1_CAL_LOOPBACK = 2,
        TX_SW1_ISOLATION = 3
    };
    tx_sw1_t tx_sw1;
    enum tx_sw2_t{
        TX_SW2_TX_SW3 = 0,
        TX_SW2_FILTER7 = 1,
        TX_SW2_FILTER6 = 2,
        TX_SW2_FILTER5 = 3
    };
    tx_sw2_t tx_sw2;
    enum tx_sw3_sw4_t{
        TX_SW3_SW4_FILTER2 = 1,
        TX_SW3_SW4_FILTER1 = 2,
        TX_SW3_SW4_FILTER4 = 4,
        TX_SW3_SW4_FILTER3 = 8
    };
    tx_sw3_sw4_t tx_sw3_sw4;
    enum tx_sw5_t{
        TX_SW5_FILTER5 = 0,
        TX_SW5_FILTER6 = 1,
        TX_SW5_FILTER7 = 2,
        TX_SW5_TX_SW4 = 3
    };
    tx_sw5_t tx_sw5;
    enum tx_gain_tbl_sel_t{
        TX_GAIN_TBL_SEL_LOWBAND = 0,
        TX_GAIN_TBL_SEL_HIGHBAND = 1
    };
    tx_gain_tbl_sel_t tx_gain_tbl_sel;
    uint8_t reg7_reserved1;
    uint8_t reg8_reserved0;
    enum cal_iso_sw_t{
        CAL_ISO_SW_ISOLATION = 0,
        CAL_ISO_SW_CAL_LOOPBACK = 1
    };
    cal_iso_sw_t cal_iso_sw;
    enum tx_hb_lb_sel_t{
        TX_HB_LB_SEL_LOWBAND = 0,
        TX_HB_LB_SEL_HIGHBAND = 1
    };
    tx_hb_lb_sel_t tx_hb_lb_sel;
    uint8_t reg8_reserved1;
    enum tx_lo_input_sel_t{
        TX_LO_INPUT_SEL_INTERNAL = 0,
        TX_LO_INPUT_SEL_EXTERNAL = 1
    };
    tx_lo_input_sel_t tx_lo_input_sel;
    enum rx_hb_lb_sel_t{
        RX_HB_LB_SEL_LOWBAND = 0,
        RX_HB_LB_SEL_HIGHBAND = 1
    };
    rx_hb_lb_sel_t rx_hb_lb_sel;
    uint8_t reg8_reserved2;
    enum rx_lo_input_sel_t{
        RX_LO_INPUT_SEL_EXTERNAL = 0,
        RX_LO_INPUT_SEL_INTERNAL = 1
    };
    rx_lo_input_sel_t rx_lo_input_sel;
    enum rx_demod_adj_t{
        RX_DEMOD_ADJ_RES_OPEN = 0,
        RX_DEMOD_ADJ_RES_200_OHM = 1,
        RX_DEMOD_ADJ_RES_1500_OHM = 2
    };
    rx_demod_adj_t rx_demod_adj;
    enum tx_lo_filter_sel_t{
        TX_LO_FILTER_SEL_0_9GHZ_LPF = 0,
        TX_LO_FILTER_SEL_5_85GHZ_LPF = 1,
        TX_LO_FILTER_SEL_2_25GHZ_LPF = 2,
        TX_LO_FILTER_SEL_ISOLATION = 3
    };
    tx_lo_filter_sel_t tx_lo_filter_sel;
    enum rx_lo_filter_sel_t{
        RX_LO_FILTER_SEL_0_9GHZ_LPF = 0,
        RX_LO_FILTER_SEL_5_85GHZ_LPF = 1,
        RX_LO_FILTER_SEL_2_25GHZ_LPF = 2,
        RX_LO_FILTER_SEL_ISOLATION = 3
    };
    rx_lo_filter_sel_t rx_lo_filter_sel;

    rhodium_cpld_regs_t(void){
        _state = NULL;
        scratch = 0;
        reg6_reserved0 = 0;
        rx_sw1 = RX_SW1_RX2;
        rx_sw2_sw7 = RX_SW2_SW7_LOWBAND;
        rx_sw3 = RX_SW3_RX_SW4;
        rx_sw4_sw5 = RX_SW4_SW5_FILTER2;
        rx_sw6 = RX_SW6_RX_SW5;
        rx_gain_tbl_sel = RX_GAIN_TBL_SEL_LOWBAND;
        reg6_reserved1 = 0;
        reg7_reserved0 = 0;
        tx_sw1 = TX_SW1_ISOLATION;
        tx_sw2 = TX_SW2_TX_SW3;
        tx_sw3_sw4 = TX_SW3_SW4_FILTER2;
        tx_sw5 = TX_SW5_FILTER5;
        tx_gain_tbl_sel = TX_GAIN_TBL_SEL_LOWBAND;
        reg7_reserved1 = 0;
        reg8_reserved0 = 0;
        cal_iso_sw = CAL_ISO_SW_ISOLATION;
        tx_hb_lb_sel = TX_HB_LB_SEL_LOWBAND;
        reg8_reserved1 = 0;
        tx_lo_input_sel = TX_LO_INPUT_SEL_INTERNAL;
        rx_hb_lb_sel = RX_HB_LB_SEL_LOWBAND;
        reg8_reserved2 = 0;
        rx_lo_input_sel = RX_LO_INPUT_SEL_INTERNAL;
        rx_demod_adj = RX_DEMOD_ADJ_RES_OPEN;
        tx_lo_filter_sel = TX_LO_FILTER_SEL_ISOLATION;
        rx_lo_filter_sel = RX_LO_FILTER_SEL_ISOLATION;
    }

    ~rhodium_cpld_regs_t(void){
        delete _state;
    }

    uint32_t get_reg(uint8_t addr){
        uint32_t reg = 0;
        switch(addr){
        case 5:
            reg |= (uint32_t(scratch) & 0xffff) << 0;
            break;
        case 6:
            reg |= (uint32_t(reg6_reserved0) & 0x1) << 0;
            reg |= (uint32_t(rx_sw1) & 0x3) << 1;
            reg |= (uint32_t(rx_sw2_sw7) & 0x1) << 3;
            reg |= (uint32_t(rx_sw3) & 0x3) << 4;
            reg |= (uint32_t(rx_sw4_sw5) & 0xf) << 6;
            reg |= (uint32_t(rx_sw6) & 0x3) << 10;
            reg |= (uint32_t(rx_gain_tbl_sel) & 0x1) << 12;
            reg |= (uint32_t(reg6_reserved1) & 0x7) << 13;
            break;
        case 7:
            reg |= (uint32_t(reg7_reserved0) & 0x3) << 0;
            reg |= (uint32_t(tx_sw1) & 0x3) << 2;
            reg |= (uint32_t(tx_sw2) & 0x3) << 4;
            reg |= (uint32_t(tx_sw3_sw4) & 0xf) << 6;
            reg |= (uint32_t(tx_sw5) & 0x3) << 10;
            reg |= (uint32_t(tx_gain_tbl_sel) & 0x1) << 12;
            reg |= (uint32_t(reg7_reserved1) & 0x7) << 13;
            break;
        case 8:
            reg |= (uint32_t(reg8_reserved0) & 0x7) << 0;
            reg |= (uint32_t(cal_iso_sw) & 0x1) << 3;
            reg |= (uint32_t(tx_hb_lb_sel) & 0x1) << 4;
            reg |= (uint32_t(reg8_reserved1) & 0x1) << 5;
            reg |= (uint32_t(tx_lo_input_sel) & 0x1) << 6;
            reg |= (uint32_t(rx_hb_lb_sel) & 0x1) << 7;
            reg |= (uint32_t(reg8_reserved2) & 0x1) << 8;
            reg |= (uint32_t(rx_lo_input_sel) & 0x1) << 9;
            reg |= (uint32_t(rx_demod_adj) & 0x3) << 10;
            reg |= (uint32_t(tx_lo_filter_sel) & 0x3) << 12;
            reg |= (uint32_t(rx_lo_filter_sel) & 0x3) << 14;
            break;
        case 9:
            break;
        case 10:
            break;
        case 11:
            break;
        case 12:
            break;
        case 13:
            break;
        case 14:
            break;
        }
        return reg;
    }
    
    std::set<size_t> get_all_addrs()
    {
        std::set<size_t> addrs;
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(5);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(6);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(7);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(7);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(7);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(7);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(7);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(7);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(7);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        // Hopefully, compilers will optimize out this mess...
        addrs.insert(8);
        return addrs;
    }

    void save_state(void){
        if (_state == NULL) _state = new rhodium_cpld_regs_t();
        _state->scratch = this->scratch;
        _state->reg6_reserved0 = this->reg6_reserved0;
        _state->rx_sw1 = this->rx_sw1;
        _state->rx_sw2_sw7 = this->rx_sw2_sw7;
        _state->rx_sw3 = this->rx_sw3;
        _state->rx_sw4_sw5 = this->rx_sw4_sw5;
        _state->rx_sw6 = this->rx_sw6;
        _state->rx_gain_tbl_sel = this->rx_gain_tbl_sel;
        _state->reg6_reserved1 = this->reg6_reserved1;
        _state->reg7_reserved0 = this->reg7_reserved0;
        _state->tx_sw1 = this->tx_sw1;
        _state->tx_sw2 = this->tx_sw2;
        _state->tx_sw3_sw4 = this->tx_sw3_sw4;
        _state->tx_sw5 = this->tx_sw5;
        _state->tx_gain_tbl_sel = this->tx_gain_tbl_sel;
        _state->reg7_reserved1 = this->reg7_reserved1;
        _state->reg8_reserved0 = this->reg8_reserved0;
        _state->cal_iso_sw = this->cal_iso_sw;
        _state->tx_hb_lb_sel = this->tx_hb_lb_sel;
        _state->reg8_reserved1 = this->reg8_reserved1;
        _state->tx_lo_input_sel = this->tx_lo_input_sel;
        _state->rx_hb_lb_sel = this->rx_hb_lb_sel;
        _state->reg8_reserved2 = this->reg8_reserved2;
        _state->rx_lo_input_sel = this->rx_lo_input_sel;
        _state->rx_demod_adj = this->rx_demod_adj;
        _state->tx_lo_filter_sel = this->tx_lo_filter_sel;
        _state->rx_lo_filter_sel = this->rx_lo_filter_sel;
    }

    uint16_t get_state_scratch(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->scratch;
    }

    uint8_t get_state_reg6_reserved0(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->reg6_reserved0;
    }

    rx_sw1_t get_state_rx_sw1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_sw1;
    }

    rx_sw2_sw7_t get_state_rx_sw2_sw7(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_sw2_sw7;
    }

    rx_sw3_t get_state_rx_sw3(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_sw3;
    }

    rx_sw4_sw5_t get_state_rx_sw4_sw5(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_sw4_sw5;
    }

    rx_sw6_t get_state_rx_sw6(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_sw6;
    }

    rx_gain_tbl_sel_t get_state_rx_gain_tbl_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_gain_tbl_sel;
    }

    uint8_t get_state_reg6_reserved1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->reg6_reserved1;
    }

    uint8_t get_state_reg7_reserved0(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->reg7_reserved0;
    }

    tx_sw1_t get_state_tx_sw1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_sw1;
    }

    tx_sw2_t get_state_tx_sw2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_sw2;
    }

    tx_sw3_sw4_t get_state_tx_sw3_sw4(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_sw3_sw4;
    }

    tx_sw5_t get_state_tx_sw5(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_sw5;
    }

    tx_gain_tbl_sel_t get_state_tx_gain_tbl_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_gain_tbl_sel;
    }

    uint8_t get_state_reg7_reserved1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->reg7_reserved1;
    }

    uint8_t get_state_reg8_reserved0(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->reg8_reserved0;
    }

    cal_iso_sw_t get_state_cal_iso_sw(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->cal_iso_sw;
    }

    tx_hb_lb_sel_t get_state_tx_hb_lb_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_hb_lb_sel;
    }

    uint8_t get_state_reg8_reserved1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->reg8_reserved1;
    }

    tx_lo_input_sel_t get_state_tx_lo_input_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_lo_input_sel;
    }

    rx_hb_lb_sel_t get_state_rx_hb_lb_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_hb_lb_sel;
    }

    uint8_t get_state_reg8_reserved2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->reg8_reserved2;
    }

    rx_lo_input_sel_t get_state_rx_lo_input_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_lo_input_sel;
    }

    rx_demod_adj_t get_state_rx_demod_adj(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_demod_adj;
    }

    tx_lo_filter_sel_t get_state_tx_lo_filter_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tx_lo_filter_sel;
    }

    rx_lo_filter_sel_t get_state_rx_lo_filter_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rx_lo_filter_sel;
    }


    template<typename T> std::set<T> get_changed_addrs(bool include_ro = false) {
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        //check each register for changes
        std::set<T> addrs;
        if (include_ro || !false) {
            if(_state->scratch != this->scratch) {
                addrs.insert(5);
            }
        }
        if (include_ro || !false) {
            if(_state->reg6_reserved0 != this->reg6_reserved0) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_sw1 != this->rx_sw1) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_sw2_sw7 != this->rx_sw2_sw7) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_sw3 != this->rx_sw3) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_sw4_sw5 != this->rx_sw4_sw5) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_sw6 != this->rx_sw6) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_gain_tbl_sel != this->rx_gain_tbl_sel) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->reg6_reserved1 != this->reg6_reserved1) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->reg7_reserved0 != this->reg7_reserved0) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_sw1 != this->tx_sw1) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_sw2 != this->tx_sw2) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_sw3_sw4 != this->tx_sw3_sw4) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_sw5 != this->tx_sw5) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_gain_tbl_sel != this->tx_gain_tbl_sel) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->reg7_reserved1 != this->reg7_reserved1) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->reg8_reserved0 != this->reg8_reserved0) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->cal_iso_sw != this->cal_iso_sw) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_hb_lb_sel != this->tx_hb_lb_sel) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->reg8_reserved1 != this->reg8_reserved1) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_lo_input_sel != this->tx_lo_input_sel) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_hb_lb_sel != this->rx_hb_lb_sel) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->reg8_reserved2 != this->reg8_reserved2) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_lo_input_sel != this->rx_lo_input_sel) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_demod_adj != this->rx_demod_adj) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->tx_lo_filter_sel != this->tx_lo_filter_sel) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->rx_lo_filter_sel != this->rx_lo_filter_sel) {
                addrs.insert(8);
            }
        }
        return addrs;
    }

private:
    rhodium_cpld_regs_t *_state;
};

#endif /* INCLUDED_RHODIUM_CPLD_REGS_HPP */
