/***********************************************************************
 * This file was generated by /build/libuhd/src/uhd/host/lib/ic_reg_maps/gen_tda18272hnm_regs.py on Thu Aug 13 13:47:33 2026
 **********************************************************************/

#ifndef INCLUDED_TDA18272HNM_REGS_HPP
#define INCLUDED_TDA18272HNM_REGS_HPP

#include <uhd/config.hpp>
#include <uhd/exception.hpp>
#include <set>
#include <vector>
#include <stdint.h>

class tda18272hnm_regs_t{
public:
    uint8_t ident_14_8;
    uint8_t ident_7_0;
    uint8_t major_rev;
    uint8_t minor_rev;
    uint8_t tm_d;
    enum tm_on_t{
        TM_ON_SENSOR_OFF = 0,
        TM_ON_SENSOR_ON = 1
    };
    tm_on_t tm_on;
    enum por_t{
        POR_READ = 0,
        POR_RESET = 1
    };
    por_t por;
    enum lo_lock_t{
        LO_LOCK_UNLOCKED = 0,
        LO_LOCK_LOCKED = 1
    };
    lo_lock_t lo_lock;
    enum sm_t{
        SM_NORMAL = 0,
        SM_STANDBY = 1
    };
    sm_t sm;
    enum sm_pll_t{
        SM_PLL_ON = 0,
        SM_PLL_OFF = 1
    };
    sm_pll_t sm_pll;
    enum sm_lna_t{
        SM_LNA_ON = 0,
        SM_LNA_OFF = 1
    };
    sm_lna_t sm_lna;
    uint8_t power_level;
    enum irq_status_t{
        IRQ_STATUS_CLEARED = 0,
        IRQ_STATUS_SET = 1
    };
    irq_status_t irq_status;
    enum irq_xtalcal_end_t{
        IRQ_XTALCAL_END_FALSE = 0,
        IRQ_XTALCAL_END_TRUE = 1
    };
    irq_xtalcal_end_t irq_xtalcal_end;
    enum irq_rssi_end_t{
        IRQ_RSSI_END_FALSE = 0,
        IRQ_RSSI_END_TRUE = 1
    };
    irq_rssi_end_t irq_rssi_end;
    enum irq_localc_end_t{
        IRQ_LOCALC_END_FALSE = 0,
        IRQ_LOCALC_END_TRUE = 1
    };
    irq_localc_end_t irq_localc_end;
    enum irq_rfcal_end_t{
        IRQ_RFCAL_END_FALSE = 0,
        IRQ_RFCAL_END_TRUE = 1
    };
    irq_rfcal_end_t irq_rfcal_end;
    enum irq_ircal_end_t{
        IRQ_IRCAL_END_FALSE = 0,
        IRQ_IRCAL_END_TRUE = 1
    };
    irq_ircal_end_t irq_ircal_end;
    enum irq_rccal_end_t{
        IRQ_RCCAL_END_FALSE = 0,
        IRQ_RCCAL_END_TRUE = 1
    };
    irq_rccal_end_t irq_rccal_end;
    enum irq_enable_t{
        IRQ_ENABLE_FALSE = 0,
        IRQ_ENABLE_TRUE = 1
    };
    irq_enable_t irq_enable;
    enum irq_xtalcal_enable_t{
        IRQ_XTALCAL_ENABLE_FALSE = 0,
        IRQ_XTALCAL_ENABLE_TRUE = 1
    };
    irq_xtalcal_enable_t irq_xtalcal_enable;
    enum irq_rssi_enable_t{
        IRQ_RSSI_ENABLE_FALSE = 0,
        IRQ_RSSI_ENABLE_TRUE = 1
    };
    irq_rssi_enable_t irq_rssi_enable;
    enum irq_localc_enable_t{
        IRQ_LOCALC_ENABLE_FALSE = 0,
        IRQ_LOCALC_ENABLE_TRUE = 1
    };
    irq_localc_enable_t irq_localc_enable;
    enum irq_rfcal_enable_t{
        IRQ_RFCAL_ENABLE_FALSE = 0,
        IRQ_RFCAL_ENABLE_TRUE = 1
    };
    irq_rfcal_enable_t irq_rfcal_enable;
    enum irq_ircal_enable_t{
        IRQ_IRCAL_ENABLE_FALSE = 0,
        IRQ_IRCAL_ENABLE_TRUE = 1
    };
    irq_ircal_enable_t irq_ircal_enable;
    enum irq_rccal_enable_t{
        IRQ_RCCAL_ENABLE_FALSE = 0,
        IRQ_RCCAL_ENABLE_TRUE = 1
    };
    irq_rccal_enable_t irq_rccal_enable;
    enum irq_clear_t{
        IRQ_CLEAR_FALSE = 0,
        IRQ_CLEAR_TRUE = 1
    };
    irq_clear_t irq_clear;
    enum irq_xtalcal_clear_t{
        IRQ_XTALCAL_CLEAR_FALSE = 0,
        IRQ_XTALCAL_CLEAR_TRUE = 1
    };
    irq_xtalcal_clear_t irq_xtalcal_clear;
    enum irq_rssi_clear_t{
        IRQ_RSSI_CLEAR_FALSE = 0,
        IRQ_RSSI_CLEAR_TRUE = 1
    };
    irq_rssi_clear_t irq_rssi_clear;
    enum irq_localc_clear_t{
        IRQ_LOCALC_CLEAR_FALSE = 0,
        IRQ_LOCALC_CLEAR_TRUE = 1
    };
    irq_localc_clear_t irq_localc_clear;
    enum irq_rfcal_clear_t{
        IRQ_RFCAL_CLEAR_FALSE = 0,
        IRQ_RFCAL_CLEAR_TRUE = 1
    };
    irq_rfcal_clear_t irq_rfcal_clear;
    enum irq_ircal_clear_t{
        IRQ_IRCAL_CLEAR_FALSE = 0,
        IRQ_IRCAL_CLEAR_TRUE = 1
    };
    irq_ircal_clear_t irq_ircal_clear;
    enum irq_rccal_clear_t{
        IRQ_RCCAL_CLEAR_FALSE = 0,
        IRQ_RCCAL_CLEAR_TRUE = 1
    };
    irq_rccal_clear_t irq_rccal_clear;
    enum irq_set_t{
        IRQ_SET_FALSE = 0,
        IRQ_SET_TRUE = 1
    };
    irq_set_t irq_set;
    enum irq_xtalcal_set_t{
        IRQ_XTALCAL_SET_FALSE = 0,
        IRQ_XTALCAL_SET_TRUE = 1
    };
    irq_xtalcal_set_t irq_xtalcal_set;
    enum irq_rssi_set_t{
        IRQ_RSSI_SET_FALSE = 0,
        IRQ_RSSI_SET_TRUE = 1
    };
    irq_rssi_set_t irq_rssi_set;
    enum irq_localc_set_t{
        IRQ_LOCALC_SET_FALSE = 0,
        IRQ_LOCALC_SET_TRUE = 1
    };
    irq_localc_set_t irq_localc_set;
    enum irq_rfcal_set_t{
        IRQ_RFCAL_SET_FALSE = 0,
        IRQ_RFCAL_SET_TRUE = 1
    };
    irq_rfcal_set_t irq_rfcal_set;
    enum irq_ircal_set_t{
        IRQ_IRCAL_SET_FALSE = 0,
        IRQ_IRCAL_SET_TRUE = 1
    };
    irq_ircal_set_t irq_ircal_set;
    enum irq_rccal_set_t{
        IRQ_RCCAL_SET_FALSE = 0,
        IRQ_RCCAL_SET_TRUE = 1
    };
    irq_rccal_set_t irq_rccal_set;
    uint8_t lt_enable;
    uint8_t agc1_6_15db;
    uint8_t agc1_top;
    uint8_t agc2_top;
    uint8_t agcs_up_step_assym;
    uint8_t agcs_up_step;
    enum pulse_shaper_disable_t{
        PULSE_SHAPER_DISABLE_VSYNC_PULSE = 0,
        PULSE_SHAPER_DISABLE_500US_PULSE = 1
    };
    pulse_shaper_disable_t pulse_shaper_disable;
    uint8_t agck_step;
    enum agck_mode_t{
        AGCK_MODE_ANALOG_TV = 1,
        AGCK_MODE_DIGITAL_TV = 2
    };
    agck_mode_t agck_mode;
    enum pd_rfagc_adapt_t{
        PD_RFAGC_ADAPT_ON = 0,
        PD_RFAGC_ADAPT_OFF = 1
    };
    pd_rfagc_adapt_t pd_rfagc_adapt;
    uint8_t rfagc_adapt_top;
    uint8_t rfagc_low_bw;
    enum rf_atten_3db_t{
        RF_ATTEN_3DB_0DB = 0,
        RF_ATTEN_3DB_3DB = 1
    };
    rf_atten_3db_t rf_atten_3db;
    uint8_t agc3_top;
    uint8_t agc4_top;
    uint8_t agcs_do_step_assym;
    enum agc5_hpf_t{
        AGC5_HPF_OFF = 0,
        AGC5_HPF_ON = 1
    };
    agc5_hpf_t agc5_hpf;
    uint8_t agc5_top;
    enum if_level_t{
        IF_LEVEL_0_5VPP = 7,
        IF_LEVEL_0_6VPP = 6,
        IF_LEVEL_0_7VPP = 5,
        IF_LEVEL_0_85VPP = 4,
        IF_LEVEL_0_8VPP = 3,
        IF_LEVEL_1_0VPP = 2,
        IF_LEVEL_1_25VPP = 1,
        IF_LEVEL_2_0VPP = 0
    };
    if_level_t if_level;
    enum if_hp_fc_t{
        IF_HP_FC_0_4MHZ = 0,
        IF_HP_FC_0_85MHZ = 1,
        IF_HP_FC_1_0MHZ = 2,
        IF_HP_FC_1_5MHZ = 3
    };
    if_hp_fc_t if_hp_fc;
    enum if_atsc_notch_t{
        IF_ATSC_NOTCH_OFF = 0,
        IF_ATSC_NOTCH_ON = 1
    };
    if_atsc_notch_t if_atsc_notch;
    enum lp_fc_offset_t{
        LP_FC_OFFSET_0_PERCENT = 0,
        LP_FC_OFFSET_M4_PERCENT = 1,
        LP_FC_OFFSET_M8_PERCENT = 2,
        LP_FC_OFFSET_FORBIDDEN = 3
    };
    lp_fc_offset_t lp_fc_offset;
    enum lp_fc_t{
        LP_FC_1_7MHZ = 4,
        LP_FC_6_0MHZ = 0,
        LP_FC_7_0MHZ = 1,
        LP_FC_8_0MHZ = 2,
        LP_FC_10_0MHZ = 3
    };
    lp_fc_t lp_fc;
    uint8_t i2c_clock_mode;
    enum digital_clock_t{
        DIGITAL_CLOCK_SPREAD_OFF = 0,
        DIGITAL_CLOCK_SPREAD_ON = 1
    };
    digital_clock_t digital_clock;
    uint8_t xtalosc_anareg_en;
    enum xtout_t{
        XTOUT_NO = 0,
        XTOUT_16MHZ = 3
    };
    xtout_t xtout;
    uint8_t if_freq;
    uint8_t rf_freq_19_16;
    uint8_t rf_freq_15_8;
    uint8_t rf_freq_7_0;
    uint8_t rssi_meas;
    uint8_t rf_cal_av;
    uint8_t rf_cal;
    uint8_t ir_cal_loop;
    uint8_t ir_cal_image;
    uint8_t ir_cal_wanted;
    uint8_t rc_cal;
    uint8_t calc_pll;
    uint8_t xtalcal_launch;
    uint8_t msm_launch;
    uint8_t psm_agc1;
    uint8_t psm_stob;
    uint8_t psmrfpoly;
    uint8_t psm_mixer;
    uint8_t psm_ifpoly;
    uint8_t psm_lodriver;
    uint8_t dcc_bypass;
    uint8_t dcc_slow;
    uint8_t dcc_psm;
    uint8_t fmax_lo;
    uint8_t ir_loop;
    uint8_t ir_target;
    uint8_t ir_gstep;
    uint8_t ir_corr_boost;
    uint8_t ir_freqlow_sel;
    uint8_t ir_mode_ram_store;
    uint8_t ir_freqlow;
    uint8_t ir_freqmid;
    uint8_t coarse_ir_freqhigh;
    uint8_t ir_freqhigh;
    uint8_t pd_vsync_mgt;
    uint8_t pd_ovld;
    uint8_t pd_udld;
    uint8_t agc_ovld_top;
    uint8_t agc_ovld_timer;
    uint8_t ir_mixer_loop_off;
    uint8_t ir_mixer_do_step;
    enum hi_pass_t{
        HI_PASS_DISABLE = 0,
        HI_PASS_ENABLE = 1
    };
    hi_pass_t hi_pass;
    enum if_notch_t{
        IF_NOTCH_ON = 0,
        IF_NOTCH_OFF = 1
    };
    if_notch_t if_notch;
    uint8_t agc1_loop_off;
    uint8_t agc1_do_step;
    uint8_t force_agc1_gain;
    uint8_t agc1_gain;
    uint8_t agc5_loop_off;
    uint8_t agc5_do_step;
    uint8_t force_agc5_gain;
    uint8_t agc5_gain;
    uint8_t rfcal_offset_cprog0;
    uint8_t rfcal_freq0;
    uint8_t rfcal_offset_cprog1;
    uint8_t rfcal_freq1;
    uint8_t rfcal_offset_cprog2;
    uint8_t rfcal_freq2;
    uint8_t rfcal_offset_cprog3;
    uint8_t rfcal_freq3;
    uint8_t rfcal_offset_cprog4;
    uint8_t rfcal_freq4;
    uint8_t rfcal_offset_cprog5;
    uint8_t rfcal_freq5;
    uint8_t rfcal_offset_cprog6;
    uint8_t rfcal_freq6;
    uint8_t rfcal_offset_cprog7;
    uint8_t rfcal_freq7;
    uint8_t rfcal_offset_cprog8;
    uint8_t rfcal_freq8;
    uint8_t rfcal_offset_cprog9;
    uint8_t rfcal_freq9;
    uint8_t rfcal_offset_cprog10;
    uint8_t rfcal_freq10;
    uint8_t rfcal_offset_cprog11;
    uint8_t rfcal_freq11;
    uint8_t rf_filter_bypass;
    uint8_t agc2_loop_off;
    uint8_t force_agc2_gain;
    uint8_t rf_filter_gv;
    uint8_t rf_filter_band;
    uint8_t rf_filter_cap;
    uint8_t agc2_do_step;
    uint8_t gain_taper;
    uint8_t rf_bpf_bypass;
    uint8_t rf_bpf;
    uint8_t n_cp_current;
    uint8_t up_agc5;
    uint8_t do_agc5;
    uint8_t up_agc4;
    uint8_t do_agc4;
    uint8_t up_agc2;
    uint8_t do_agc2;
    uint8_t up_agc1;
    uint8_t do_agc1;
    enum agc2_gain_read_t{
        AGC2_GAIN_READ_M11DB = 0,
        AGC2_GAIN_READ_M8DB = 1,
        AGC2_GAIN_READ_M5DB = 2,
        AGC2_GAIN_READ_M2DB = 3
    };
    agc2_gain_read_t agc2_gain_read;
    enum agc1_gain_read_t{
        AGC1_GAIN_READ_M12DB = 0,
        AGC1_GAIN_READ_M9DB = 1,
        AGC1_GAIN_READ_M6DB = 2,
        AGC1_GAIN_READ_M3DB = 3,
        AGC1_GAIN_READ_0DB = 4,
        AGC1_GAIN_READ_3DB = 5,
        AGC1_GAIN_READ_6DB = 6,
        AGC1_GAIN_READ_9DB = 7,
        AGC1_GAIN_READ_12DB = 8,
        AGC1_GAIN_READ_15DB = 9
    };
    agc1_gain_read_t agc1_gain_read;
    enum top_agc3_read_t{
        TOP_AGC3_READ_94DBUVRMS = 0,
        TOP_AGC3_READ_96DBUVRMS = 1,
        TOP_AGC3_READ_98DBUVRMS = 2,
        TOP_AGC3_READ_100DBUVRMS = 3,
        TOP_AGC3_READ_102DBUVRMS = 4,
        TOP_AGC3_READ_104DBUVRMS = 5,
        TOP_AGC3_READ_106DBUVRMS = 6,
        TOP_AGC3_READ_107DBUVRMS = 7
    };
    top_agc3_read_t top_agc3_read;
    enum agc5_gain_read_t{
        AGC5_GAIN_READ_0DB = 0,
        AGC5_GAIN_READ_3DB = 1,
        AGC5_GAIN_READ_6DB = 2,
        AGC5_GAIN_READ_9DB = 3
    };
    agc5_gain_read_t agc5_gain_read;
    enum agc4_gain_read_t{
        AGC4_GAIN_READ_2DB = 0,
        AGC4_GAIN_READ_5DB = 1,
        AGC4_GAIN_READ_8DB = 2,
        AGC4_GAIN_READ_11DB = 3,
        AGC4_GAIN_READ_14DB = 4
    };
    agc4_gain_read_t agc4_gain_read;
    uint8_t rssi;
    uint8_t rssi_av;
    uint8_t rssi_cap_reset_en;
    uint8_t rssi_cap_val;
    uint8_t rssi_ck_speed;
    uint8_t rssi_dicho_not;
    uint8_t rfcal_phi2;
    uint8_t dds_polarity;
    uint8_t rfcal_deltagain;
    enum irq_polarity_t{
        IRQ_POLARITY_RAISED_VCC = 0,
        IRQ_POLARITY_RAISED_LOW = 1
    };
    irq_polarity_t irq_polarity;
    uint8_t rfcal_log_1;
    uint8_t rfcal_log_2;
    uint8_t rfcal_log_3;
    uint8_t rfcal_log_4;
    uint8_t rfcal_log_5;
    uint8_t rfcal_log_6;
    uint8_t rfcal_log_7;
    uint8_t rfcal_log_8;
    uint8_t rfcal_log_9;
    uint8_t rfcal_log_10;
    uint8_t rfcal_log_11;
    uint8_t rfcal_log_12;
    enum magic_t{
        MAGIC_UNTOUCHED = 0,
        MAGIC_XTAL_CAL_DAC = 1
    };
    magic_t magic;

    tda18272hnm_regs_t(void){
        _state = NULL;
        ident_14_8 = 0;
        ident_7_0 = 0;
        major_rev = 0;
        minor_rev = 0;
        tm_d = 0;
        tm_on = TM_ON_SENSOR_OFF;
        por = POR_READ;
        lo_lock = LO_LOCK_UNLOCKED;
        sm = SM_NORMAL;
        sm_pll = SM_PLL_ON;
        sm_lna = SM_LNA_ON;
        power_level = 0;
        irq_status = IRQ_STATUS_CLEARED;
        irq_xtalcal_end = IRQ_XTALCAL_END_FALSE;
        irq_rssi_end = IRQ_RSSI_END_FALSE;
        irq_localc_end = IRQ_LOCALC_END_FALSE;
        irq_rfcal_end = IRQ_RFCAL_END_FALSE;
        irq_ircal_end = IRQ_IRCAL_END_FALSE;
        irq_rccal_end = IRQ_RCCAL_END_FALSE;
        irq_enable = IRQ_ENABLE_TRUE;
        irq_xtalcal_enable = IRQ_XTALCAL_ENABLE_FALSE;
        irq_rssi_enable = IRQ_RSSI_ENABLE_FALSE;
        irq_localc_enable = IRQ_LOCALC_ENABLE_FALSE;
        irq_rfcal_enable = IRQ_RFCAL_ENABLE_FALSE;
        irq_ircal_enable = IRQ_IRCAL_ENABLE_FALSE;
        irq_rccal_enable = IRQ_RCCAL_ENABLE_FALSE;
        irq_clear = IRQ_CLEAR_FALSE;
        irq_xtalcal_clear = IRQ_XTALCAL_CLEAR_FALSE;
        irq_rssi_clear = IRQ_RSSI_CLEAR_FALSE;
        irq_localc_clear = IRQ_LOCALC_CLEAR_FALSE;
        irq_rfcal_clear = IRQ_RFCAL_CLEAR_FALSE;
        irq_ircal_clear = IRQ_IRCAL_CLEAR_FALSE;
        irq_rccal_clear = IRQ_RCCAL_CLEAR_FALSE;
        irq_set = IRQ_SET_FALSE;
        irq_xtalcal_set = IRQ_XTALCAL_SET_FALSE;
        irq_rssi_set = IRQ_RSSI_SET_FALSE;
        irq_localc_set = IRQ_LOCALC_SET_FALSE;
        irq_rfcal_set = IRQ_RFCAL_SET_FALSE;
        irq_ircal_set = IRQ_IRCAL_SET_FALSE;
        irq_rccal_set = IRQ_RCCAL_SET_FALSE;
        lt_enable = 0;
        agc1_6_15db = 1;
        agc1_top = 0;
        agc2_top = 15;
        agcs_up_step_assym = 3;
        agcs_up_step = 1;
        pulse_shaper_disable = PULSE_SHAPER_DISABLE_VSYNC_PULSE;
        agck_step = 0;
        agck_mode = AGCK_MODE_ANALOG_TV;
        pd_rfagc_adapt = PD_RFAGC_ADAPT_ON;
        rfagc_adapt_top = 0;
        rfagc_low_bw = 1;
        rf_atten_3db = RF_ATTEN_3DB_0DB;
        agc3_top = 1;
        agc4_top = 1;
        agcs_do_step_assym = 2;
        agc5_hpf = AGC5_HPF_ON;
        agc5_top = 1;
        if_level = IF_LEVEL_2_0VPP;
        if_hp_fc = IF_HP_FC_0_4MHZ;
        if_atsc_notch = IF_ATSC_NOTCH_OFF;
        lp_fc_offset = LP_FC_OFFSET_0_PERCENT;
        lp_fc = LP_FC_10_0MHZ;
        i2c_clock_mode = 0;
        digital_clock = DIGITAL_CLOCK_SPREAD_ON;
        xtalosc_anareg_en = 0;
        xtout = XTOUT_NO;
        if_freq = 0;
        rf_freq_19_16 = 0;
        rf_freq_15_8 = 0;
        rf_freq_7_0 = 0;
        rssi_meas = 0;
        rf_cal_av = 0;
        rf_cal = 0;
        ir_cal_loop = 0;
        ir_cal_image = 0;
        ir_cal_wanted = 0;
        rc_cal = 0;
        calc_pll = 0;
        xtalcal_launch = 0;
        msm_launch = 0;
        psm_agc1 = 0;
        psm_stob = 0;
        psmrfpoly = 0;
        psm_mixer = 0;
        psm_ifpoly = 0;
        psm_lodriver = 0;
        dcc_bypass = 0;
        dcc_slow = 0;
        dcc_psm = 0;
        fmax_lo = 10;
        ir_loop = 0;
        ir_target = 0;
        ir_gstep = 0;
        ir_corr_boost = 0;
        ir_freqlow_sel = 0;
        ir_mode_ram_store = 0;
        ir_freqlow = 0;
        ir_freqmid = 0;
        coarse_ir_freqhigh = 0;
        ir_freqhigh = 0;
        pd_vsync_mgt = 0;
        pd_ovld = 0;
        pd_udld = 0;
        agc_ovld_top = 0;
        agc_ovld_timer = 0;
        ir_mixer_loop_off = 0;
        ir_mixer_do_step = 0;
        hi_pass = HI_PASS_DISABLE;
        if_notch = IF_NOTCH_OFF;
        agc1_loop_off = 0;
        agc1_do_step = 2;
        force_agc1_gain = 0;
        agc1_gain = 8;
        agc5_loop_off = 0;
        agc5_do_step = 0;
        force_agc5_gain = 0;
        agc5_gain = 2;
        rfcal_offset_cprog0 = 0;
        rfcal_freq0 = 0;
        rfcal_offset_cprog1 = 0;
        rfcal_freq1 = 0;
        rfcal_offset_cprog2 = 0;
        rfcal_freq2 = 0;
        rfcal_offset_cprog3 = 0;
        rfcal_freq3 = 0;
        rfcal_offset_cprog4 = 0;
        rfcal_freq4 = 0;
        rfcal_offset_cprog5 = 0;
        rfcal_freq5 = 0;
        rfcal_offset_cprog6 = 0;
        rfcal_freq6 = 0;
        rfcal_offset_cprog7 = 0;
        rfcal_freq7 = 0;
        rfcal_offset_cprog8 = 0;
        rfcal_freq8 = 0;
        rfcal_offset_cprog9 = 0;
        rfcal_freq9 = 0;
        rfcal_offset_cprog10 = 0;
        rfcal_freq10 = 0;
        rfcal_offset_cprog11 = 0;
        rfcal_freq11 = 0;
        rf_filter_bypass = 0;
        agc2_loop_off = 0;
        force_agc2_gain = 0;
        rf_filter_gv = 2;
        rf_filter_band = 0;
        rf_filter_cap = 0;
        agc2_do_step = 2;
        gain_taper = 0;
        rf_bpf_bypass = 0;
        rf_bpf = 0;
        n_cp_current = 104;
        up_agc5 = 0;
        do_agc5 = 0;
        up_agc4 = 0;
        do_agc4 = 0;
        up_agc2 = 0;
        do_agc2 = 0;
        up_agc1 = 0;
        do_agc1 = 0;
        agc2_gain_read = AGC2_GAIN_READ_M2DB;
        agc1_gain_read = AGC1_GAIN_READ_15DB;
        top_agc3_read = TOP_AGC3_READ_94DBUVRMS;
        agc5_gain_read = AGC5_GAIN_READ_9DB;
        agc4_gain_read = AGC4_GAIN_READ_14DB;
        rssi = 0;
        rssi_av = 0;
        rssi_cap_reset_en = 1;
        rssi_cap_val = 1;
        rssi_ck_speed = 0;
        rssi_dicho_not = 1;
        rfcal_phi2 = 1;
        dds_polarity = 0;
        rfcal_deltagain = 1;
        irq_polarity = IRQ_POLARITY_RAISED_VCC;
        rfcal_log_1 = 0;
        rfcal_log_2 = 0;
        rfcal_log_3 = 0;
        rfcal_log_4 = 0;
        rfcal_log_5 = 0;
        rfcal_log_6 = 0;
        rfcal_log_7 = 0;
        rfcal_log_8 = 0;
        rfcal_log_9 = 0;
        rfcal_log_10 = 0;
        rfcal_log_11 = 0;
        rfcal_log_12 = 0;
        magic = MAGIC_XTAL_CAL_DAC;
    }

    ~tda18272hnm_regs_t(void){
        delete _state;
    }

    uint8_t get_reg(uint8_t addr){
        uint8_t reg = 0;
        switch(addr){
        case 0:
            reg |= (uint8_t(ident_14_8) & 0x7f) << 0;
            break;
        case 1:
            reg |= (uint8_t(ident_7_0) & 0xff) << 0;
            break;
        case 2:
            reg |= (uint8_t(major_rev) & 0xf) << 4;
            reg |= (uint8_t(minor_rev) & 0xf) << 0;
            break;
        case 3:
            reg |= (uint8_t(tm_d) & 0x7f) << 0;
            break;
        case 4:
            reg |= (uint8_t(tm_on) & 0x1) << 0;
            break;
        case 5:
            reg |= (uint8_t(por) & 0x1) << 1;
            reg |= (uint8_t(lo_lock) & 0x1) << 0;
            break;
        case 6:
            reg |= (uint8_t(sm) & 0x1) << 3;
            reg |= (uint8_t(sm_pll) & 0x1) << 2;
            reg |= (uint8_t(sm_lna) & 0x1) << 1;
            break;
        case 7:
            reg |= (uint8_t(power_level) & 0x7f) << 0;
            break;
        case 8:
            reg |= (uint8_t(irq_status) & 0x1) << 7;
            reg |= (uint8_t(irq_xtalcal_end) & 0x1) << 5;
            reg |= (uint8_t(irq_rssi_end) & 0x1) << 4;
            reg |= (uint8_t(irq_localc_end) & 0x1) << 3;
            reg |= (uint8_t(irq_rfcal_end) & 0x1) << 2;
            reg |= (uint8_t(irq_ircal_end) & 0x1) << 1;
            reg |= (uint8_t(irq_rccal_end) & 0x1) << 0;
            break;
        case 9:
            reg |= (uint8_t(irq_enable) & 0x1) << 7;
            reg |= (uint8_t(irq_xtalcal_enable) & 0x1) << 5;
            reg |= (uint8_t(irq_rssi_enable) & 0x1) << 4;
            reg |= (uint8_t(irq_localc_enable) & 0x1) << 3;
            reg |= (uint8_t(irq_rfcal_enable) & 0x1) << 2;
            reg |= (uint8_t(irq_ircal_enable) & 0x1) << 1;
            reg |= (uint8_t(irq_rccal_enable) & 0x1) << 0;
            break;
        case 10:
            reg |= (uint8_t(irq_clear) & 0x1) << 7;
            reg |= (uint8_t(irq_xtalcal_clear) & 0x1) << 5;
            reg |= (uint8_t(irq_rssi_clear) & 0x1) << 4;
            reg |= (uint8_t(irq_localc_clear) & 0x1) << 3;
            reg |= (uint8_t(irq_rfcal_clear) & 0x1) << 2;
            reg |= (uint8_t(irq_ircal_clear) & 0x1) << 1;
            reg |= (uint8_t(irq_rccal_clear) & 0x1) << 0;
            break;
        case 11:
            reg |= (uint8_t(irq_set) & 0x1) << 7;
            reg |= (uint8_t(irq_xtalcal_set) & 0x1) << 5;
            reg |= (uint8_t(irq_rssi_set) & 0x1) << 4;
            reg |= (uint8_t(irq_localc_set) & 0x1) << 3;
            reg |= (uint8_t(irq_rfcal_set) & 0x1) << 2;
            reg |= (uint8_t(irq_ircal_set) & 0x1) << 1;
            reg |= (uint8_t(irq_rccal_set) & 0x1) << 0;
            break;
        case 12:
            reg |= (uint8_t(lt_enable) & 0x1) << 7;
            reg |= (uint8_t(agc1_6_15db) & 0x1) << 6;
            reg |= (uint8_t(agc1_top) & 0xf) << 0;
            break;
        case 13:
            reg |= (uint8_t(agc2_top) & 0x1f) << 0;
            break;
        case 14:
            reg |= (uint8_t(agcs_up_step_assym) & 0x3) << 6;
            reg |= (uint8_t(agcs_up_step) & 0x1) << 5;
            reg |= (uint8_t(pulse_shaper_disable) & 0x1) << 4;
            reg |= (uint8_t(agck_step) & 0x3) << 2;
            reg |= (uint8_t(agck_mode) & 0x3) << 0;
            break;
        case 15:
            reg |= (uint8_t(pd_rfagc_adapt) & 0x1) << 7;
            reg |= (uint8_t(rfagc_adapt_top) & 0x3) << 5;
            reg |= (uint8_t(rfagc_low_bw) & 0x1) << 4;
            reg |= (uint8_t(rf_atten_3db) & 0x1) << 3;
            reg |= (uint8_t(agc3_top) & 0x7) << 0;
            break;
        case 16:
            reg |= (uint8_t(agc4_top) & 0xf) << 0;
            break;
        case 17:
            reg |= (uint8_t(agcs_do_step_assym) & 0x3) << 5;
            reg |= (uint8_t(agc5_hpf) & 0x1) << 4;
            reg |= (uint8_t(agc5_top) & 0xf) << 0;
            break;
        case 18:
            reg |= (uint8_t(if_level) & 0x7) << 0;
            break;
        case 19:
            reg |= (uint8_t(if_hp_fc) & 0x3) << 6;
            reg |= (uint8_t(if_atsc_notch) & 0x1) << 5;
            reg |= (uint8_t(lp_fc_offset) & 0x3) << 3;
            reg |= (uint8_t(lp_fc) & 0x7) << 0;
            break;
        case 20:
            reg |= (uint8_t(i2c_clock_mode) & 0x1) << 7;
            reg |= (uint8_t(digital_clock) & 0x1) << 6;
            reg |= (uint8_t(xtalosc_anareg_en) & 0x1) << 4;
            reg |= (uint8_t(xtout) & 0x3) << 0;
            break;
        case 21:
            reg |= (uint8_t(if_freq) & 0xff) << 0;
            break;
        case 22:
            reg |= (uint8_t(rf_freq_19_16) & 0xf) << 0;
            break;
        case 23:
            reg |= (uint8_t(rf_freq_15_8) & 0xff) << 0;
            break;
        case 24:
            reg |= (uint8_t(rf_freq_7_0) & 0xff) << 0;
            break;
        case 25:
            reg |= (uint8_t(rssi_meas) & 0x1) << 7;
            reg |= (uint8_t(rf_cal_av) & 0x1) << 6;
            reg |= (uint8_t(rf_cal) & 0x1) << 5;
            reg |= (uint8_t(ir_cal_loop) & 0x1) << 4;
            reg |= (uint8_t(ir_cal_image) & 0x1) << 3;
            reg |= (uint8_t(ir_cal_wanted) & 0x1) << 2;
            reg |= (uint8_t(rc_cal) & 0x1) << 1;
            reg |= (uint8_t(calc_pll) & 0x1) << 0;
            break;
        case 26:
            reg |= (uint8_t(xtalcal_launch) & 0x1) << 1;
            reg |= (uint8_t(msm_launch) & 0x1) << 0;
            break;
        case 27:
            reg |= (uint8_t(psm_agc1) & 0x3) << 6;
            reg |= (uint8_t(psm_stob) & 0x1) << 5;
            reg |= (uint8_t(psmrfpoly) & 0x1) << 4;
            reg |= (uint8_t(psm_mixer) & 0x1) << 3;
            reg |= (uint8_t(psm_ifpoly) & 0x1) << 2;
            reg |= (uint8_t(psm_lodriver) & 0x3) << 0;
            break;
        case 28:
            reg |= (uint8_t(dcc_bypass) & 0x1) << 7;
            reg |= (uint8_t(dcc_slow) & 0x1) << 6;
            reg |= (uint8_t(dcc_psm) & 0x1) << 5;
            break;
        case 29:
            reg |= (uint8_t(fmax_lo) & 0x3f) << 0;
            break;
        case 30:
            reg |= (uint8_t(ir_loop) & 0x3) << 6;
            reg |= (uint8_t(ir_target) & 0x7) << 3;
            reg |= (uint8_t(ir_gstep) & 0x7) << 0;
            break;
        case 31:
            reg |= (uint8_t(ir_corr_boost) & 0x1) << 7;
            reg |= (uint8_t(ir_freqlow_sel) & 0x1) << 6;
            reg |= (uint8_t(ir_mode_ram_store) & 0x1) << 5;
            reg |= (uint8_t(ir_freqlow) & 0x1f) << 0;
            break;
        case 32:
            reg |= (uint8_t(ir_freqmid) & 0x1f) << 0;
            break;
        case 33:
            reg |= (uint8_t(coarse_ir_freqhigh) & 0x1) << 4;
            reg |= (uint8_t(ir_freqhigh) & 0xf) << 0;
            break;
        case 34:
            reg |= (uint8_t(pd_vsync_mgt) & 0x1) << 7;
            reg |= (uint8_t(pd_ovld) & 0x1) << 6;
            reg |= (uint8_t(pd_udld) & 0x1) << 5;
            reg |= (uint8_t(agc_ovld_top) & 0x7) << 2;
            reg |= (uint8_t(agc_ovld_timer) & 0x3) << 0;
            break;
        case 35:
            reg |= (uint8_t(ir_mixer_loop_off) & 0x1) << 7;
            reg |= (uint8_t(ir_mixer_do_step) & 0x3) << 5;
            reg |= (uint8_t(hi_pass) & 0x1) << 1;
            reg |= (uint8_t(if_notch) & 0x1) << 0;
            break;
        case 36:
            reg |= (uint8_t(agc1_loop_off) & 0x1) << 7;
            reg |= (uint8_t(agc1_do_step) & 0x3) << 5;
            reg |= (uint8_t(force_agc1_gain) & 0x1) << 4;
            reg |= (uint8_t(agc1_gain) & 0xf) << 0;
            break;
        case 37:
            reg |= (uint8_t(agc5_loop_off) & 0x1) << 7;
            reg |= (uint8_t(agc5_do_step) & 0x3) << 5;
            reg |= (uint8_t(force_agc5_gain) & 0x1) << 3;
            reg |= (uint8_t(agc5_gain) & 0x3) << 0;
            break;
        case 38:
            reg |= (uint8_t(rfcal_offset_cprog0) & 0x3) << 6;
            reg |= (uint8_t(rfcal_freq0) & 0x3) << 4;
            reg |= (uint8_t(rfcal_offset_cprog1) & 0x3) << 2;
            reg |= (uint8_t(rfcal_freq1) & 0x3) << 0;
            break;
        case 39:
            reg |= (uint8_t(rfcal_offset_cprog2) & 0x3) << 6;
            reg |= (uint8_t(rfcal_freq2) & 0x3) << 4;
            reg |= (uint8_t(rfcal_offset_cprog3) & 0x3) << 2;
            reg |= (uint8_t(rfcal_freq3) & 0x3) << 0;
            break;
        case 40:
            reg |= (uint8_t(rfcal_offset_cprog4) & 0x3) << 6;
            reg |= (uint8_t(rfcal_freq4) & 0x3) << 4;
            reg |= (uint8_t(rfcal_offset_cprog5) & 0x3) << 2;
            reg |= (uint8_t(rfcal_freq5) & 0x3) << 0;
            break;
        case 41:
            reg |= (uint8_t(rfcal_offset_cprog6) & 0x3) << 6;
            reg |= (uint8_t(rfcal_freq6) & 0x3) << 4;
            reg |= (uint8_t(rfcal_offset_cprog7) & 0x3) << 2;
            reg |= (uint8_t(rfcal_freq7) & 0x3) << 0;
            break;
        case 42:
            reg |= (uint8_t(rfcal_offset_cprog8) & 0x3) << 6;
            reg |= (uint8_t(rfcal_freq8) & 0x3) << 4;
            reg |= (uint8_t(rfcal_offset_cprog9) & 0x3) << 2;
            reg |= (uint8_t(rfcal_freq9) & 0x3) << 0;
            break;
        case 43:
            reg |= (uint8_t(rfcal_offset_cprog10) & 0x3) << 6;
            reg |= (uint8_t(rfcal_freq10) & 0x3) << 4;
            reg |= (uint8_t(rfcal_offset_cprog11) & 0x3) << 2;
            reg |= (uint8_t(rfcal_freq11) & 0x3) << 0;
            break;
        case 44:
            reg |= (uint8_t(rf_filter_bypass) & 0x1) << 7;
            reg |= (uint8_t(agc2_loop_off) & 0x1) << 5;
            reg |= (uint8_t(force_agc2_gain) & 0x1) << 4;
            reg |= (uint8_t(rf_filter_gv) & 0x3) << 2;
            reg |= (uint8_t(rf_filter_band) & 0x3) << 0;
            break;
        case 45:
            reg |= (uint8_t(rf_filter_cap) & 0xff) << 0;
            break;
        case 46:
            reg |= (uint8_t(agc2_do_step) & 0x3) << 6;
            reg |= (uint8_t(gain_taper) & 0x3f) << 0;
            break;
        case 47:
            reg |= (uint8_t(rf_bpf_bypass) & 0x1) << 7;
            reg |= (uint8_t(rf_bpf) & 0x7) << 0;
            break;
        case 48:
            reg |= (uint8_t(n_cp_current) & 0x7f) << 0;
            break;
        case 49:
            reg |= (uint8_t(up_agc5) & 0x1) << 7;
            reg |= (uint8_t(do_agc5) & 0x1) << 6;
            reg |= (uint8_t(up_agc4) & 0x1) << 5;
            reg |= (uint8_t(do_agc4) & 0x1) << 4;
            reg |= (uint8_t(up_agc2) & 0x1) << 3;
            reg |= (uint8_t(do_agc2) & 0x1) << 2;
            reg |= (uint8_t(up_agc1) & 0x1) << 1;
            reg |= (uint8_t(do_agc1) & 0x1) << 0;
            break;
        case 50:
            reg |= (uint8_t(agc2_gain_read) & 0x3) << 4;
            reg |= (uint8_t(agc1_gain_read) & 0xf) << 0;
            break;
        case 51:
            reg |= (uint8_t(top_agc3_read) & 0x7) << 0;
            break;
        case 52:
            reg |= (uint8_t(agc5_gain_read) & 0x3) << 3;
            reg |= (uint8_t(agc4_gain_read) & 0x7) << 0;
            break;
        case 53:
            reg |= (uint8_t(rssi) & 0xff) << 0;
            break;
        case 54:
            reg |= (uint8_t(rssi_av) & 0x1) << 5;
            reg |= (uint8_t(rssi_cap_reset_en) & 0x1) << 3;
            reg |= (uint8_t(rssi_cap_val) & 0x1) << 2;
            reg |= (uint8_t(rssi_ck_speed) & 0x1) << 1;
            reg |= (uint8_t(rssi_dicho_not) & 0x1) << 0;
            break;
        case 55:
            reg |= (uint8_t(rfcal_phi2) & 0x3) << 6;
            reg |= (uint8_t(dds_polarity) & 0x1) << 5;
            reg |= (uint8_t(rfcal_deltagain) & 0xf) << 1;
            reg |= (uint8_t(irq_polarity) & 0x1) << 0;
            break;
        case 56:
            reg |= (uint8_t(rfcal_log_1) & 0xff) << 0;
            break;
        case 57:
            reg |= (uint8_t(rfcal_log_2) & 0xff) << 0;
            break;
        case 58:
            reg |= (uint8_t(rfcal_log_3) & 0xff) << 0;
            break;
        case 59:
            reg |= (uint8_t(rfcal_log_4) & 0xff) << 0;
            break;
        case 60:
            reg |= (uint8_t(rfcal_log_5) & 0xff) << 0;
            break;
        case 61:
            reg |= (uint8_t(rfcal_log_6) & 0xff) << 0;
            break;
        case 62:
            reg |= (uint8_t(rfcal_log_7) & 0xff) << 0;
            break;
        case 63:
            reg |= (uint8_t(rfcal_log_8) & 0xff) << 0;
            break;
        case 64:
            reg |= (uint8_t(rfcal_log_9) & 0xff) << 0;
            break;
        case 65:
            reg |= (uint8_t(rfcal_log_10) & 0xff) << 0;
            break;
        case 66:
            reg |= (uint8_t(rfcal_log_11) & 0xff) << 0;
            break;
        case 67:
            reg |= (uint8_t(rfcal_log_12) & 0xff) << 0;
            reg |= (uint8_t(magic) & 0x1) << 7;
            break;
        }
        return uint8_t(reg);
    }
    
    void set_reg(uint8_t addr, uint8_t reg){
        switch(addr){
        case 0:
            ident_14_8 = uint8_t((reg >> 0) & 0x7f);
            break;
        case 1:
            ident_7_0 = uint8_t((reg >> 0) & 0xff);
            break;
        case 2:
            major_rev = uint8_t((reg >> 4) & 0xf);
            minor_rev = uint8_t((reg >> 0) & 0xf);
            break;
        case 3:
            tm_d = uint8_t((reg >> 0) & 0x7f);
            break;
        case 4:
            tm_on = tm_on_t((reg >> 0) & 0x1);
            break;
        case 5:
            por = por_t((reg >> 1) & 0x1);
            lo_lock = lo_lock_t((reg >> 0) & 0x1);
            break;
        case 6:
            sm = sm_t((reg >> 3) & 0x1);
            sm_pll = sm_pll_t((reg >> 2) & 0x1);
            sm_lna = sm_lna_t((reg >> 1) & 0x1);
            break;
        case 7:
            power_level = uint8_t((reg >> 0) & 0x7f);
            break;
        case 8:
            irq_status = irq_status_t((reg >> 7) & 0x1);
            irq_xtalcal_end = irq_xtalcal_end_t((reg >> 5) & 0x1);
            irq_rssi_end = irq_rssi_end_t((reg >> 4) & 0x1);
            irq_localc_end = irq_localc_end_t((reg >> 3) & 0x1);
            irq_rfcal_end = irq_rfcal_end_t((reg >> 2) & 0x1);
            irq_ircal_end = irq_ircal_end_t((reg >> 1) & 0x1);
            irq_rccal_end = irq_rccal_end_t((reg >> 0) & 0x1);
            break;
        case 9:
            irq_enable = irq_enable_t((reg >> 7) & 0x1);
            irq_xtalcal_enable = irq_xtalcal_enable_t((reg >> 5) & 0x1);
            irq_rssi_enable = irq_rssi_enable_t((reg >> 4) & 0x1);
            irq_localc_enable = irq_localc_enable_t((reg >> 3) & 0x1);
            irq_rfcal_enable = irq_rfcal_enable_t((reg >> 2) & 0x1);
            irq_ircal_enable = irq_ircal_enable_t((reg >> 1) & 0x1);
            irq_rccal_enable = irq_rccal_enable_t((reg >> 0) & 0x1);
            break;
        case 10:
            irq_clear = irq_clear_t((reg >> 7) & 0x1);
            irq_xtalcal_clear = irq_xtalcal_clear_t((reg >> 5) & 0x1);
            irq_rssi_clear = irq_rssi_clear_t((reg >> 4) & 0x1);
            irq_localc_clear = irq_localc_clear_t((reg >> 3) & 0x1);
            irq_rfcal_clear = irq_rfcal_clear_t((reg >> 2) & 0x1);
            irq_ircal_clear = irq_ircal_clear_t((reg >> 1) & 0x1);
            irq_rccal_clear = irq_rccal_clear_t((reg >> 0) & 0x1);
            break;
        case 11:
            irq_set = irq_set_t((reg >> 7) & 0x1);
            irq_xtalcal_set = irq_xtalcal_set_t((reg >> 5) & 0x1);
            irq_rssi_set = irq_rssi_set_t((reg >> 4) & 0x1);
            irq_localc_set = irq_localc_set_t((reg >> 3) & 0x1);
            irq_rfcal_set = irq_rfcal_set_t((reg >> 2) & 0x1);
            irq_ircal_set = irq_ircal_set_t((reg >> 1) & 0x1);
            irq_rccal_set = irq_rccal_set_t((reg >> 0) & 0x1);
            break;
        case 12:
            lt_enable = uint8_t((reg >> 7) & 0x1);
            agc1_6_15db = uint8_t((reg >> 6) & 0x1);
            agc1_top = uint8_t((reg >> 0) & 0xf);
            break;
        case 13:
            agc2_top = uint8_t((reg >> 0) & 0x1f);
            break;
        case 14:
            agcs_up_step_assym = uint8_t((reg >> 6) & 0x3);
            agcs_up_step = uint8_t((reg >> 5) & 0x1);
            pulse_shaper_disable = pulse_shaper_disable_t((reg >> 4) & 0x1);
            agck_step = uint8_t((reg >> 2) & 0x3);
            agck_mode = agck_mode_t((reg >> 0) & 0x3);
            break;
        case 15:
            pd_rfagc_adapt = pd_rfagc_adapt_t((reg >> 7) & 0x1);
            rfagc_adapt_top = uint8_t((reg >> 5) & 0x3);
            rfagc_low_bw = uint8_t((reg >> 4) & 0x1);
            rf_atten_3db = rf_atten_3db_t((reg >> 3) & 0x1);
            agc3_top = uint8_t((reg >> 0) & 0x7);
            break;
        case 16:
            agc4_top = uint8_t((reg >> 0) & 0xf);
            break;
        case 17:
            agcs_do_step_assym = uint8_t((reg >> 5) & 0x3);
            agc5_hpf = agc5_hpf_t((reg >> 4) & 0x1);
            agc5_top = uint8_t((reg >> 0) & 0xf);
            break;
        case 18:
            if_level = if_level_t((reg >> 0) & 0x7);
            break;
        case 19:
            if_hp_fc = if_hp_fc_t((reg >> 6) & 0x3);
            if_atsc_notch = if_atsc_notch_t((reg >> 5) & 0x1);
            lp_fc_offset = lp_fc_offset_t((reg >> 3) & 0x3);
            lp_fc = lp_fc_t((reg >> 0) & 0x7);
            break;
        case 20:
            i2c_clock_mode = uint8_t((reg >> 7) & 0x1);
            digital_clock = digital_clock_t((reg >> 6) & 0x1);
            xtalosc_anareg_en = uint8_t((reg >> 4) & 0x1);
            xtout = xtout_t((reg >> 0) & 0x3);
            break;
        case 21:
            if_freq = uint8_t((reg >> 0) & 0xff);
            break;
        case 22:
            rf_freq_19_16 = uint8_t((reg >> 0) & 0xf);
            break;
        case 23:
            rf_freq_15_8 = uint8_t((reg >> 0) & 0xff);
            break;
        case 24:
            rf_freq_7_0 = uint8_t((reg >> 0) & 0xff);
            break;
        case 25:
            rssi_meas = uint8_t((reg >> 7) & 0x1);
            rf_cal_av = uint8_t((reg >> 6) & 0x1);
            rf_cal = uint8_t((reg >> 5) & 0x1);
            ir_cal_loop = uint8_t((reg >> 4) & 0x1);
            ir_cal_image = uint8_t((reg >> 3) & 0x1);
            ir_cal_wanted = uint8_t((reg >> 2) & 0x1);
            rc_cal = uint8_t((reg >> 1) & 0x1);
            calc_pll = uint8_t((reg >> 0) & 0x1);
            break;
        case 26:
            xtalcal_launch = uint8_t((reg >> 1) & 0x1);
            msm_launch = uint8_t((reg >> 0) & 0x1);
            break;
        case 27:
            psm_agc1 = uint8_t((reg >> 6) & 0x3);
            psm_stob = uint8_t((reg >> 5) & 0x1);
            psmrfpoly = uint8_t((reg >> 4) & 0x1);
            psm_mixer = uint8_t((reg >> 3) & 0x1);
            psm_ifpoly = uint8_t((reg >> 2) & 0x1);
            psm_lodriver = uint8_t((reg >> 0) & 0x3);
            break;
        case 28:
            dcc_bypass = uint8_t((reg >> 7) & 0x1);
            dcc_slow = uint8_t((reg >> 6) & 0x1);
            dcc_psm = uint8_t((reg >> 5) & 0x1);
            break;
        case 29:
            fmax_lo = uint8_t((reg >> 0) & 0x3f);
            break;
        case 30:
            ir_loop = uint8_t((reg >> 6) & 0x3);
            ir_target = uint8_t((reg >> 3) & 0x7);
            ir_gstep = uint8_t((reg >> 0) & 0x7);
            break;
        case 31:
            ir_corr_boost = uint8_t((reg >> 7) & 0x1);
            ir_freqlow_sel = uint8_t((reg >> 6) & 0x1);
            ir_mode_ram_store = uint8_t((reg >> 5) & 0x1);
            ir_freqlow = uint8_t((reg >> 0) & 0x1f);
            break;
        case 32:
            ir_freqmid = uint8_t((reg >> 0) & 0x1f);
            break;
        case 33:
            coarse_ir_freqhigh = uint8_t((reg >> 4) & 0x1);
            ir_freqhigh = uint8_t((reg >> 0) & 0xf);
            break;
        case 34:
            pd_vsync_mgt = uint8_t((reg >> 7) & 0x1);
            pd_ovld = uint8_t((reg >> 6) & 0x1);
            pd_udld = uint8_t((reg >> 5) & 0x1);
            agc_ovld_top = uint8_t((reg >> 2) & 0x7);
            agc_ovld_timer = uint8_t((reg >> 0) & 0x3);
            break;
        case 35:
            ir_mixer_loop_off = uint8_t((reg >> 7) & 0x1);
            ir_mixer_do_step = uint8_t((reg >> 5) & 0x3);
            hi_pass = hi_pass_t((reg >> 1) & 0x1);
            if_notch = if_notch_t((reg >> 0) & 0x1);
            break;
        case 36:
            agc1_loop_off = uint8_t((reg >> 7) & 0x1);
            agc1_do_step = uint8_t((reg >> 5) & 0x3);
            force_agc1_gain = uint8_t((reg >> 4) & 0x1);
            agc1_gain = uint8_t((reg >> 0) & 0xf);
            break;
        case 37:
            agc5_loop_off = uint8_t((reg >> 7) & 0x1);
            agc5_do_step = uint8_t((reg >> 5) & 0x3);
            force_agc5_gain = uint8_t((reg >> 3) & 0x1);
            agc5_gain = uint8_t((reg >> 0) & 0x3);
            break;
        case 38:
            rfcal_offset_cprog0 = uint8_t((reg >> 6) & 0x3);
            rfcal_freq0 = uint8_t((reg >> 4) & 0x3);
            rfcal_offset_cprog1 = uint8_t((reg >> 2) & 0x3);
            rfcal_freq1 = uint8_t((reg >> 0) & 0x3);
            break;
        case 39:
            rfcal_offset_cprog2 = uint8_t((reg >> 6) & 0x3);
            rfcal_freq2 = uint8_t((reg >> 4) & 0x3);
            rfcal_offset_cprog3 = uint8_t((reg >> 2) & 0x3);
            rfcal_freq3 = uint8_t((reg >> 0) & 0x3);
            break;
        case 40:
            rfcal_offset_cprog4 = uint8_t((reg >> 6) & 0x3);
            rfcal_freq4 = uint8_t((reg >> 4) & 0x3);
            rfcal_offset_cprog5 = uint8_t((reg >> 2) & 0x3);
            rfcal_freq5 = uint8_t((reg >> 0) & 0x3);
            break;
        case 41:
            rfcal_offset_cprog6 = uint8_t((reg >> 6) & 0x3);
            rfcal_freq6 = uint8_t((reg >> 4) & 0x3);
            rfcal_offset_cprog7 = uint8_t((reg >> 2) & 0x3);
            rfcal_freq7 = uint8_t((reg >> 0) & 0x3);
            break;
        case 42:
            rfcal_offset_cprog8 = uint8_t((reg >> 6) & 0x3);
            rfcal_freq8 = uint8_t((reg >> 4) & 0x3);
            rfcal_offset_cprog9 = uint8_t((reg >> 2) & 0x3);
            rfcal_freq9 = uint8_t((reg >> 0) & 0x3);
            break;
        case 43:
            rfcal_offset_cprog10 = uint8_t((reg >> 6) & 0x3);
            rfcal_freq10 = uint8_t((reg >> 4) & 0x3);
            rfcal_offset_cprog11 = uint8_t((reg >> 2) & 0x3);
            rfcal_freq11 = uint8_t((reg >> 0) & 0x3);
            break;
        case 44:
            rf_filter_bypass = uint8_t((reg >> 7) & 0x1);
            agc2_loop_off = uint8_t((reg >> 5) & 0x1);
            force_agc2_gain = uint8_t((reg >> 4) & 0x1);
            rf_filter_gv = uint8_t((reg >> 2) & 0x3);
            rf_filter_band = uint8_t((reg >> 0) & 0x3);
            break;
        case 45:
            rf_filter_cap = uint8_t((reg >> 0) & 0xff);
            break;
        case 46:
            agc2_do_step = uint8_t((reg >> 6) & 0x3);
            gain_taper = uint8_t((reg >> 0) & 0x3f);
            break;
        case 47:
            rf_bpf_bypass = uint8_t((reg >> 7) & 0x1);
            rf_bpf = uint8_t((reg >> 0) & 0x7);
            break;
        case 48:
            n_cp_current = uint8_t((reg >> 0) & 0x7f);
            break;
        case 49:
            up_agc5 = uint8_t((reg >> 7) & 0x1);
            do_agc5 = uint8_t((reg >> 6) & 0x1);
            up_agc4 = uint8_t((reg >> 5) & 0x1);
            do_agc4 = uint8_t((reg >> 4) & 0x1);
            up_agc2 = uint8_t((reg >> 3) & 0x1);
            do_agc2 = uint8_t((reg >> 2) & 0x1);
            up_agc1 = uint8_t((reg >> 1) & 0x1);
            do_agc1 = uint8_t((reg >> 0) & 0x1);
            break;
        case 50:
            agc2_gain_read = agc2_gain_read_t((reg >> 4) & 0x3);
            agc1_gain_read = agc1_gain_read_t((reg >> 0) & 0xf);
            break;
        case 51:
            top_agc3_read = top_agc3_read_t((reg >> 0) & 0x7);
            break;
        case 52:
            agc5_gain_read = agc5_gain_read_t((reg >> 3) & 0x3);
            agc4_gain_read = agc4_gain_read_t((reg >> 0) & 0x7);
            break;
        case 53:
            rssi = uint8_t((reg >> 0) & 0xff);
            break;
        case 54:
            rssi_av = uint8_t((reg >> 5) & 0x1);
            rssi_cap_reset_en = uint8_t((reg >> 3) & 0x1);
            rssi_cap_val = uint8_t((reg >> 2) & 0x1);
            rssi_ck_speed = uint8_t((reg >> 1) & 0x1);
            rssi_dicho_not = uint8_t((reg >> 0) & 0x1);
            break;
        case 55:
            rfcal_phi2 = uint8_t((reg >> 6) & 0x3);
            dds_polarity = uint8_t((reg >> 5) & 0x1);
            rfcal_deltagain = uint8_t((reg >> 1) & 0xf);
            irq_polarity = irq_polarity_t((reg >> 0) & 0x1);
            break;
        case 56:
            rfcal_log_1 = uint8_t((reg >> 0) & 0xff);
            break;
        case 57:
            rfcal_log_2 = uint8_t((reg >> 0) & 0xff);
            break;
        case 58:
            rfcal_log_3 = uint8_t((reg >> 0) & 0xff);
            break;
        case 59:
            rfcal_log_4 = uint8_t((reg >> 0) & 0xff);
            break;
        case 60:
            rfcal_log_5 = uint8_t((reg >> 0) & 0xff);
            break;
        case 61:
            rfcal_log_6 = uint8_t((reg >> 0) & 0xff);
            break;
        case 62:
            rfcal_log_7 = uint8_t((reg >> 0) & 0xff);
            break;
        case 63:
            rfcal_log_8 = uint8_t((reg >> 0) & 0xff);
            break;
        case 64:
            rfcal_log_9 = uint8_t((reg >> 0) & 0xff);
            break;
        case 65:
            rfcal_log_10 = uint8_t((reg >> 0) & 0xff);
            break;
        case 66:
            rfcal_log_11 = uint8_t((reg >> 0) & 0xff);
            break;
        case 67:
            rfcal_log_12 = uint8_t((reg >> 0) & 0xff);
            magic = magic_t((reg >> 7) & 0x1);
            break;
        }
    }

    void save_state(void){
        if (_state == NULL) _state = new tda18272hnm_regs_t();
        _state->ident_14_8 = this->ident_14_8;
        _state->ident_7_0 = this->ident_7_0;
        _state->major_rev = this->major_rev;
        _state->minor_rev = this->minor_rev;
        _state->tm_d = this->tm_d;
        _state->tm_on = this->tm_on;
        _state->por = this->por;
        _state->lo_lock = this->lo_lock;
        _state->sm = this->sm;
        _state->sm_pll = this->sm_pll;
        _state->sm_lna = this->sm_lna;
        _state->power_level = this->power_level;
        _state->irq_status = this->irq_status;
        _state->irq_xtalcal_end = this->irq_xtalcal_end;
        _state->irq_rssi_end = this->irq_rssi_end;
        _state->irq_localc_end = this->irq_localc_end;
        _state->irq_rfcal_end = this->irq_rfcal_end;
        _state->irq_ircal_end = this->irq_ircal_end;
        _state->irq_rccal_end = this->irq_rccal_end;
        _state->irq_enable = this->irq_enable;
        _state->irq_xtalcal_enable = this->irq_xtalcal_enable;
        _state->irq_rssi_enable = this->irq_rssi_enable;
        _state->irq_localc_enable = this->irq_localc_enable;
        _state->irq_rfcal_enable = this->irq_rfcal_enable;
        _state->irq_ircal_enable = this->irq_ircal_enable;
        _state->irq_rccal_enable = this->irq_rccal_enable;
        _state->irq_clear = this->irq_clear;
        _state->irq_xtalcal_clear = this->irq_xtalcal_clear;
        _state->irq_rssi_clear = this->irq_rssi_clear;
        _state->irq_localc_clear = this->irq_localc_clear;
        _state->irq_rfcal_clear = this->irq_rfcal_clear;
        _state->irq_ircal_clear = this->irq_ircal_clear;
        _state->irq_rccal_clear = this->irq_rccal_clear;
        _state->irq_set = this->irq_set;
        _state->irq_xtalcal_set = this->irq_xtalcal_set;
        _state->irq_rssi_set = this->irq_rssi_set;
        _state->irq_localc_set = this->irq_localc_set;
        _state->irq_rfcal_set = this->irq_rfcal_set;
        _state->irq_ircal_set = this->irq_ircal_set;
        _state->irq_rccal_set = this->irq_rccal_set;
        _state->lt_enable = this->lt_enable;
        _state->agc1_6_15db = this->agc1_6_15db;
        _state->agc1_top = this->agc1_top;
        _state->agc2_top = this->agc2_top;
        _state->agcs_up_step_assym = this->agcs_up_step_assym;
        _state->agcs_up_step = this->agcs_up_step;
        _state->pulse_shaper_disable = this->pulse_shaper_disable;
        _state->agck_step = this->agck_step;
        _state->agck_mode = this->agck_mode;
        _state->pd_rfagc_adapt = this->pd_rfagc_adapt;
        _state->rfagc_adapt_top = this->rfagc_adapt_top;
        _state->rfagc_low_bw = this->rfagc_low_bw;
        _state->rf_atten_3db = this->rf_atten_3db;
        _state->agc3_top = this->agc3_top;
        _state->agc4_top = this->agc4_top;
        _state->agcs_do_step_assym = this->agcs_do_step_assym;
        _state->agc5_hpf = this->agc5_hpf;
        _state->agc5_top = this->agc5_top;
        _state->if_level = this->if_level;
        _state->if_hp_fc = this->if_hp_fc;
        _state->if_atsc_notch = this->if_atsc_notch;
        _state->lp_fc_offset = this->lp_fc_offset;
        _state->lp_fc = this->lp_fc;
        _state->i2c_clock_mode = this->i2c_clock_mode;
        _state->digital_clock = this->digital_clock;
        _state->xtalosc_anareg_en = this->xtalosc_anareg_en;
        _state->xtout = this->xtout;
        _state->if_freq = this->if_freq;
        _state->rf_freq_19_16 = this->rf_freq_19_16;
        _state->rf_freq_15_8 = this->rf_freq_15_8;
        _state->rf_freq_7_0 = this->rf_freq_7_0;
        _state->rssi_meas = this->rssi_meas;
        _state->rf_cal_av = this->rf_cal_av;
        _state->rf_cal = this->rf_cal;
        _state->ir_cal_loop = this->ir_cal_loop;
        _state->ir_cal_image = this->ir_cal_image;
        _state->ir_cal_wanted = this->ir_cal_wanted;
        _state->rc_cal = this->rc_cal;
        _state->calc_pll = this->calc_pll;
        _state->xtalcal_launch = this->xtalcal_launch;
        _state->msm_launch = this->msm_launch;
        _state->psm_agc1 = this->psm_agc1;
        _state->psm_stob = this->psm_stob;
        _state->psmrfpoly = this->psmrfpoly;
        _state->psm_mixer = this->psm_mixer;
        _state->psm_ifpoly = this->psm_ifpoly;
        _state->psm_lodriver = this->psm_lodriver;
        _state->dcc_bypass = this->dcc_bypass;
        _state->dcc_slow = this->dcc_slow;
        _state->dcc_psm = this->dcc_psm;
        _state->fmax_lo = this->fmax_lo;
        _state->ir_loop = this->ir_loop;
        _state->ir_target = this->ir_target;
        _state->ir_gstep = this->ir_gstep;
        _state->ir_corr_boost = this->ir_corr_boost;
        _state->ir_freqlow_sel = this->ir_freqlow_sel;
        _state->ir_mode_ram_store = this->ir_mode_ram_store;
        _state->ir_freqlow = this->ir_freqlow;
        _state->ir_freqmid = this->ir_freqmid;
        _state->coarse_ir_freqhigh = this->coarse_ir_freqhigh;
        _state->ir_freqhigh = this->ir_freqhigh;
        _state->pd_vsync_mgt = this->pd_vsync_mgt;
        _state->pd_ovld = this->pd_ovld;
        _state->pd_udld = this->pd_udld;
        _state->agc_ovld_top = this->agc_ovld_top;
        _state->agc_ovld_timer = this->agc_ovld_timer;
        _state->ir_mixer_loop_off = this->ir_mixer_loop_off;
        _state->ir_mixer_do_step = this->ir_mixer_do_step;
        _state->hi_pass = this->hi_pass;
        _state->if_notch = this->if_notch;
        _state->agc1_loop_off = this->agc1_loop_off;
        _state->agc1_do_step = this->agc1_do_step;
        _state->force_agc1_gain = this->force_agc1_gain;
        _state->agc1_gain = this->agc1_gain;
        _state->agc5_loop_off = this->agc5_loop_off;
        _state->agc5_do_step = this->agc5_do_step;
        _state->force_agc5_gain = this->force_agc5_gain;
        _state->agc5_gain = this->agc5_gain;
        _state->rfcal_offset_cprog0 = this->rfcal_offset_cprog0;
        _state->rfcal_freq0 = this->rfcal_freq0;
        _state->rfcal_offset_cprog1 = this->rfcal_offset_cprog1;
        _state->rfcal_freq1 = this->rfcal_freq1;
        _state->rfcal_offset_cprog2 = this->rfcal_offset_cprog2;
        _state->rfcal_freq2 = this->rfcal_freq2;
        _state->rfcal_offset_cprog3 = this->rfcal_offset_cprog3;
        _state->rfcal_freq3 = this->rfcal_freq3;
        _state->rfcal_offset_cprog4 = this->rfcal_offset_cprog4;
        _state->rfcal_freq4 = this->rfcal_freq4;
        _state->rfcal_offset_cprog5 = this->rfcal_offset_cprog5;
        _state->rfcal_freq5 = this->rfcal_freq5;
        _state->rfcal_offset_cprog6 = this->rfcal_offset_cprog6;
        _state->rfcal_freq6 = this->rfcal_freq6;
        _state->rfcal_offset_cprog7 = this->rfcal_offset_cprog7;
        _state->rfcal_freq7 = this->rfcal_freq7;
        _state->rfcal_offset_cprog8 = this->rfcal_offset_cprog8;
        _state->rfcal_freq8 = this->rfcal_freq8;
        _state->rfcal_offset_cprog9 = this->rfcal_offset_cprog9;
        _state->rfcal_freq9 = this->rfcal_freq9;
        _state->rfcal_offset_cprog10 = this->rfcal_offset_cprog10;
        _state->rfcal_freq10 = this->rfcal_freq10;
        _state->rfcal_offset_cprog11 = this->rfcal_offset_cprog11;
        _state->rfcal_freq11 = this->rfcal_freq11;
        _state->rf_filter_bypass = this->rf_filter_bypass;
        _state->agc2_loop_off = this->agc2_loop_off;
        _state->force_agc2_gain = this->force_agc2_gain;
        _state->rf_filter_gv = this->rf_filter_gv;
        _state->rf_filter_band = this->rf_filter_band;
        _state->rf_filter_cap = this->rf_filter_cap;
        _state->agc2_do_step = this->agc2_do_step;
        _state->gain_taper = this->gain_taper;
        _state->rf_bpf_bypass = this->rf_bpf_bypass;
        _state->rf_bpf = this->rf_bpf;
        _state->n_cp_current = this->n_cp_current;
        _state->up_agc5 = this->up_agc5;
        _state->do_agc5 = this->do_agc5;
        _state->up_agc4 = this->up_agc4;
        _state->do_agc4 = this->do_agc4;
        _state->up_agc2 = this->up_agc2;
        _state->do_agc2 = this->do_agc2;
        _state->up_agc1 = this->up_agc1;
        _state->do_agc1 = this->do_agc1;
        _state->agc2_gain_read = this->agc2_gain_read;
        _state->agc1_gain_read = this->agc1_gain_read;
        _state->top_agc3_read = this->top_agc3_read;
        _state->agc5_gain_read = this->agc5_gain_read;
        _state->agc4_gain_read = this->agc4_gain_read;
        _state->rssi = this->rssi;
        _state->rssi_av = this->rssi_av;
        _state->rssi_cap_reset_en = this->rssi_cap_reset_en;
        _state->rssi_cap_val = this->rssi_cap_val;
        _state->rssi_ck_speed = this->rssi_ck_speed;
        _state->rssi_dicho_not = this->rssi_dicho_not;
        _state->rfcal_phi2 = this->rfcal_phi2;
        _state->dds_polarity = this->dds_polarity;
        _state->rfcal_deltagain = this->rfcal_deltagain;
        _state->irq_polarity = this->irq_polarity;
        _state->rfcal_log_1 = this->rfcal_log_1;
        _state->rfcal_log_2 = this->rfcal_log_2;
        _state->rfcal_log_3 = this->rfcal_log_3;
        _state->rfcal_log_4 = this->rfcal_log_4;
        _state->rfcal_log_5 = this->rfcal_log_5;
        _state->rfcal_log_6 = this->rfcal_log_6;
        _state->rfcal_log_7 = this->rfcal_log_7;
        _state->rfcal_log_8 = this->rfcal_log_8;
        _state->rfcal_log_9 = this->rfcal_log_9;
        _state->rfcal_log_10 = this->rfcal_log_10;
        _state->rfcal_log_11 = this->rfcal_log_11;
        _state->rfcal_log_12 = this->rfcal_log_12;
        _state->magic = this->magic;
    }

    uint8_t get_state_ident_14_8(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ident_14_8;
    }

    uint8_t get_state_ident_7_0(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ident_7_0;
    }

    uint8_t get_state_major_rev(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->major_rev;
    }

    uint8_t get_state_minor_rev(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->minor_rev;
    }

    uint8_t get_state_tm_d(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tm_d;
    }

    tm_on_t get_state_tm_on(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->tm_on;
    }

    por_t get_state_por(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->por;
    }

    lo_lock_t get_state_lo_lock(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->lo_lock;
    }

    sm_t get_state_sm(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->sm;
    }

    sm_pll_t get_state_sm_pll(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->sm_pll;
    }

    sm_lna_t get_state_sm_lna(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->sm_lna;
    }

    uint8_t get_state_power_level(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->power_level;
    }

    irq_status_t get_state_irq_status(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_status;
    }

    irq_xtalcal_end_t get_state_irq_xtalcal_end(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_xtalcal_end;
    }

    irq_rssi_end_t get_state_irq_rssi_end(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rssi_end;
    }

    irq_localc_end_t get_state_irq_localc_end(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_localc_end;
    }

    irq_rfcal_end_t get_state_irq_rfcal_end(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rfcal_end;
    }

    irq_ircal_end_t get_state_irq_ircal_end(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_ircal_end;
    }

    irq_rccal_end_t get_state_irq_rccal_end(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rccal_end;
    }

    irq_enable_t get_state_irq_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_enable;
    }

    irq_xtalcal_enable_t get_state_irq_xtalcal_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_xtalcal_enable;
    }

    irq_rssi_enable_t get_state_irq_rssi_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rssi_enable;
    }

    irq_localc_enable_t get_state_irq_localc_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_localc_enable;
    }

    irq_rfcal_enable_t get_state_irq_rfcal_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rfcal_enable;
    }

    irq_ircal_enable_t get_state_irq_ircal_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_ircal_enable;
    }

    irq_rccal_enable_t get_state_irq_rccal_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rccal_enable;
    }

    irq_clear_t get_state_irq_clear(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_clear;
    }

    irq_xtalcal_clear_t get_state_irq_xtalcal_clear(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_xtalcal_clear;
    }

    irq_rssi_clear_t get_state_irq_rssi_clear(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rssi_clear;
    }

    irq_localc_clear_t get_state_irq_localc_clear(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_localc_clear;
    }

    irq_rfcal_clear_t get_state_irq_rfcal_clear(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rfcal_clear;
    }

    irq_ircal_clear_t get_state_irq_ircal_clear(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_ircal_clear;
    }

    irq_rccal_clear_t get_state_irq_rccal_clear(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rccal_clear;
    }

    irq_set_t get_state_irq_set(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_set;
    }

    irq_xtalcal_set_t get_state_irq_xtalcal_set(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_xtalcal_set;
    }

    irq_rssi_set_t get_state_irq_rssi_set(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rssi_set;
    }

    irq_localc_set_t get_state_irq_localc_set(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_localc_set;
    }

    irq_rfcal_set_t get_state_irq_rfcal_set(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rfcal_set;
    }

    irq_ircal_set_t get_state_irq_ircal_set(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_ircal_set;
    }

    irq_rccal_set_t get_state_irq_rccal_set(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_rccal_set;
    }

    uint8_t get_state_lt_enable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->lt_enable;
    }

    uint8_t get_state_agc1_6_15db(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc1_6_15db;
    }

    uint8_t get_state_agc1_top(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc1_top;
    }

    uint8_t get_state_agc2_top(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc2_top;
    }

    uint8_t get_state_agcs_up_step_assym(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agcs_up_step_assym;
    }

    uint8_t get_state_agcs_up_step(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agcs_up_step;
    }

    pulse_shaper_disable_t get_state_pulse_shaper_disable(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->pulse_shaper_disable;
    }

    uint8_t get_state_agck_step(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agck_step;
    }

    agck_mode_t get_state_agck_mode(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agck_mode;
    }

    pd_rfagc_adapt_t get_state_pd_rfagc_adapt(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->pd_rfagc_adapt;
    }

    uint8_t get_state_rfagc_adapt_top(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfagc_adapt_top;
    }

    uint8_t get_state_rfagc_low_bw(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfagc_low_bw;
    }

    rf_atten_3db_t get_state_rf_atten_3db(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_atten_3db;
    }

    uint8_t get_state_agc3_top(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc3_top;
    }

    uint8_t get_state_agc4_top(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc4_top;
    }

    uint8_t get_state_agcs_do_step_assym(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agcs_do_step_assym;
    }

    agc5_hpf_t get_state_agc5_hpf(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc5_hpf;
    }

    uint8_t get_state_agc5_top(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc5_top;
    }

    if_level_t get_state_if_level(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->if_level;
    }

    if_hp_fc_t get_state_if_hp_fc(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->if_hp_fc;
    }

    if_atsc_notch_t get_state_if_atsc_notch(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->if_atsc_notch;
    }

    lp_fc_offset_t get_state_lp_fc_offset(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->lp_fc_offset;
    }

    lp_fc_t get_state_lp_fc(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->lp_fc;
    }

    uint8_t get_state_i2c_clock_mode(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->i2c_clock_mode;
    }

    digital_clock_t get_state_digital_clock(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->digital_clock;
    }

    uint8_t get_state_xtalosc_anareg_en(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->xtalosc_anareg_en;
    }

    xtout_t get_state_xtout(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->xtout;
    }

    uint8_t get_state_if_freq(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->if_freq;
    }

    uint8_t get_state_rf_freq_19_16(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_freq_19_16;
    }

    uint8_t get_state_rf_freq_15_8(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_freq_15_8;
    }

    uint8_t get_state_rf_freq_7_0(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_freq_7_0;
    }

    uint8_t get_state_rssi_meas(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rssi_meas;
    }

    uint8_t get_state_rf_cal_av(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_cal_av;
    }

    uint8_t get_state_rf_cal(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_cal;
    }

    uint8_t get_state_ir_cal_loop(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_cal_loop;
    }

    uint8_t get_state_ir_cal_image(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_cal_image;
    }

    uint8_t get_state_ir_cal_wanted(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_cal_wanted;
    }

    uint8_t get_state_rc_cal(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rc_cal;
    }

    uint8_t get_state_calc_pll(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->calc_pll;
    }

    uint8_t get_state_xtalcal_launch(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->xtalcal_launch;
    }

    uint8_t get_state_msm_launch(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->msm_launch;
    }

    uint8_t get_state_psm_agc1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->psm_agc1;
    }

    uint8_t get_state_psm_stob(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->psm_stob;
    }

    uint8_t get_state_psmrfpoly(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->psmrfpoly;
    }

    uint8_t get_state_psm_mixer(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->psm_mixer;
    }

    uint8_t get_state_psm_ifpoly(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->psm_ifpoly;
    }

    uint8_t get_state_psm_lodriver(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->psm_lodriver;
    }

    uint8_t get_state_dcc_bypass(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->dcc_bypass;
    }

    uint8_t get_state_dcc_slow(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->dcc_slow;
    }

    uint8_t get_state_dcc_psm(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->dcc_psm;
    }

    uint8_t get_state_fmax_lo(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->fmax_lo;
    }

    uint8_t get_state_ir_loop(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_loop;
    }

    uint8_t get_state_ir_target(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_target;
    }

    uint8_t get_state_ir_gstep(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_gstep;
    }

    uint8_t get_state_ir_corr_boost(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_corr_boost;
    }

    uint8_t get_state_ir_freqlow_sel(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_freqlow_sel;
    }

    uint8_t get_state_ir_mode_ram_store(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_mode_ram_store;
    }

    uint8_t get_state_ir_freqlow(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_freqlow;
    }

    uint8_t get_state_ir_freqmid(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_freqmid;
    }

    uint8_t get_state_coarse_ir_freqhigh(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->coarse_ir_freqhigh;
    }

    uint8_t get_state_ir_freqhigh(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_freqhigh;
    }

    uint8_t get_state_pd_vsync_mgt(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->pd_vsync_mgt;
    }

    uint8_t get_state_pd_ovld(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->pd_ovld;
    }

    uint8_t get_state_pd_udld(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->pd_udld;
    }

    uint8_t get_state_agc_ovld_top(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc_ovld_top;
    }

    uint8_t get_state_agc_ovld_timer(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc_ovld_timer;
    }

    uint8_t get_state_ir_mixer_loop_off(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_mixer_loop_off;
    }

    uint8_t get_state_ir_mixer_do_step(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->ir_mixer_do_step;
    }

    hi_pass_t get_state_hi_pass(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->hi_pass;
    }

    if_notch_t get_state_if_notch(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->if_notch;
    }

    uint8_t get_state_agc1_loop_off(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc1_loop_off;
    }

    uint8_t get_state_agc1_do_step(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc1_do_step;
    }

    uint8_t get_state_force_agc1_gain(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->force_agc1_gain;
    }

    uint8_t get_state_agc1_gain(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc1_gain;
    }

    uint8_t get_state_agc5_loop_off(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc5_loop_off;
    }

    uint8_t get_state_agc5_do_step(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc5_do_step;
    }

    uint8_t get_state_force_agc5_gain(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->force_agc5_gain;
    }

    uint8_t get_state_agc5_gain(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc5_gain;
    }

    uint8_t get_state_rfcal_offset_cprog0(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog0;
    }

    uint8_t get_state_rfcal_freq0(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq0;
    }

    uint8_t get_state_rfcal_offset_cprog1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog1;
    }

    uint8_t get_state_rfcal_freq1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq1;
    }

    uint8_t get_state_rfcal_offset_cprog2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog2;
    }

    uint8_t get_state_rfcal_freq2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq2;
    }

    uint8_t get_state_rfcal_offset_cprog3(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog3;
    }

    uint8_t get_state_rfcal_freq3(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq3;
    }

    uint8_t get_state_rfcal_offset_cprog4(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog4;
    }

    uint8_t get_state_rfcal_freq4(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq4;
    }

    uint8_t get_state_rfcal_offset_cprog5(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog5;
    }

    uint8_t get_state_rfcal_freq5(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq5;
    }

    uint8_t get_state_rfcal_offset_cprog6(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog6;
    }

    uint8_t get_state_rfcal_freq6(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq6;
    }

    uint8_t get_state_rfcal_offset_cprog7(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog7;
    }

    uint8_t get_state_rfcal_freq7(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq7;
    }

    uint8_t get_state_rfcal_offset_cprog8(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog8;
    }

    uint8_t get_state_rfcal_freq8(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq8;
    }

    uint8_t get_state_rfcal_offset_cprog9(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog9;
    }

    uint8_t get_state_rfcal_freq9(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq9;
    }

    uint8_t get_state_rfcal_offset_cprog10(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog10;
    }

    uint8_t get_state_rfcal_freq10(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq10;
    }

    uint8_t get_state_rfcal_offset_cprog11(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_offset_cprog11;
    }

    uint8_t get_state_rfcal_freq11(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_freq11;
    }

    uint8_t get_state_rf_filter_bypass(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_filter_bypass;
    }

    uint8_t get_state_agc2_loop_off(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc2_loop_off;
    }

    uint8_t get_state_force_agc2_gain(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->force_agc2_gain;
    }

    uint8_t get_state_rf_filter_gv(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_filter_gv;
    }

    uint8_t get_state_rf_filter_band(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_filter_band;
    }

    uint8_t get_state_rf_filter_cap(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_filter_cap;
    }

    uint8_t get_state_agc2_do_step(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc2_do_step;
    }

    uint8_t get_state_gain_taper(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->gain_taper;
    }

    uint8_t get_state_rf_bpf_bypass(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_bpf_bypass;
    }

    uint8_t get_state_rf_bpf(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rf_bpf;
    }

    uint8_t get_state_n_cp_current(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->n_cp_current;
    }

    uint8_t get_state_up_agc5(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->up_agc5;
    }

    uint8_t get_state_do_agc5(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->do_agc5;
    }

    uint8_t get_state_up_agc4(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->up_agc4;
    }

    uint8_t get_state_do_agc4(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->do_agc4;
    }

    uint8_t get_state_up_agc2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->up_agc2;
    }

    uint8_t get_state_do_agc2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->do_agc2;
    }

    uint8_t get_state_up_agc1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->up_agc1;
    }

    uint8_t get_state_do_agc1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->do_agc1;
    }

    agc2_gain_read_t get_state_agc2_gain_read(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc2_gain_read;
    }

    agc1_gain_read_t get_state_agc1_gain_read(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc1_gain_read;
    }

    top_agc3_read_t get_state_top_agc3_read(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->top_agc3_read;
    }

    agc5_gain_read_t get_state_agc5_gain_read(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc5_gain_read;
    }

    agc4_gain_read_t get_state_agc4_gain_read(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->agc4_gain_read;
    }

    uint8_t get_state_rssi(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rssi;
    }

    uint8_t get_state_rssi_av(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rssi_av;
    }

    uint8_t get_state_rssi_cap_reset_en(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rssi_cap_reset_en;
    }

    uint8_t get_state_rssi_cap_val(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rssi_cap_val;
    }

    uint8_t get_state_rssi_ck_speed(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rssi_ck_speed;
    }

    uint8_t get_state_rssi_dicho_not(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rssi_dicho_not;
    }

    uint8_t get_state_rfcal_phi2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_phi2;
    }

    uint8_t get_state_dds_polarity(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->dds_polarity;
    }

    uint8_t get_state_rfcal_deltagain(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_deltagain;
    }

    irq_polarity_t get_state_irq_polarity(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->irq_polarity;
    }

    uint8_t get_state_rfcal_log_1(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_1;
    }

    uint8_t get_state_rfcal_log_2(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_2;
    }

    uint8_t get_state_rfcal_log_3(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_3;
    }

    uint8_t get_state_rfcal_log_4(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_4;
    }

    uint8_t get_state_rfcal_log_5(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_5;
    }

    uint8_t get_state_rfcal_log_6(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_6;
    }

    uint8_t get_state_rfcal_log_7(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_7;
    }

    uint8_t get_state_rfcal_log_8(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_8;
    }

    uint8_t get_state_rfcal_log_9(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_9;
    }

    uint8_t get_state_rfcal_log_10(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_10;
    }

    uint8_t get_state_rfcal_log_11(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_11;
    }

    uint8_t get_state_rfcal_log_12(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->rfcal_log_12;
    }

    magic_t get_state_magic(void){
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        return _state->magic;
    }


    template<typename T> std::set<T> get_changed_addrs(bool include_ro = false) {
        if (_state == NULL) throw uhd::runtime_error("no saved state");
        //check each register for changes
        std::set<T> addrs;
        if (include_ro || !false) {
            if(_state->ident_14_8 != this->ident_14_8) {
                addrs.insert(0);
            }
        }
        if (include_ro || !false) {
            if(_state->ident_7_0 != this->ident_7_0) {
                addrs.insert(1);
            }
        }
        if (include_ro || !false) {
            if(_state->major_rev != this->major_rev) {
                addrs.insert(2);
            }
        }
        if (include_ro || !false) {
            if(_state->minor_rev != this->minor_rev) {
                addrs.insert(2);
            }
        }
        if (include_ro || !false) {
            if(_state->tm_d != this->tm_d) {
                addrs.insert(3);
            }
        }
        if (include_ro || !false) {
            if(_state->tm_on != this->tm_on) {
                addrs.insert(4);
            }
        }
        if (include_ro || !false) {
            if(_state->por != this->por) {
                addrs.insert(5);
            }
        }
        if (include_ro || !false) {
            if(_state->lo_lock != this->lo_lock) {
                addrs.insert(5);
            }
        }
        if (include_ro || !false) {
            if(_state->sm != this->sm) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->sm_pll != this->sm_pll) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->sm_lna != this->sm_lna) {
                addrs.insert(6);
            }
        }
        if (include_ro || !false) {
            if(_state->power_level != this->power_level) {
                addrs.insert(7);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_status != this->irq_status) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_xtalcal_end != this->irq_xtalcal_end) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rssi_end != this->irq_rssi_end) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_localc_end != this->irq_localc_end) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rfcal_end != this->irq_rfcal_end) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_ircal_end != this->irq_ircal_end) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rccal_end != this->irq_rccal_end) {
                addrs.insert(8);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_enable != this->irq_enable) {
                addrs.insert(9);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_xtalcal_enable != this->irq_xtalcal_enable) {
                addrs.insert(9);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rssi_enable != this->irq_rssi_enable) {
                addrs.insert(9);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_localc_enable != this->irq_localc_enable) {
                addrs.insert(9);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rfcal_enable != this->irq_rfcal_enable) {
                addrs.insert(9);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_ircal_enable != this->irq_ircal_enable) {
                addrs.insert(9);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rccal_enable != this->irq_rccal_enable) {
                addrs.insert(9);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_clear != this->irq_clear) {
                addrs.insert(10);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_xtalcal_clear != this->irq_xtalcal_clear) {
                addrs.insert(10);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rssi_clear != this->irq_rssi_clear) {
                addrs.insert(10);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_localc_clear != this->irq_localc_clear) {
                addrs.insert(10);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rfcal_clear != this->irq_rfcal_clear) {
                addrs.insert(10);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_ircal_clear != this->irq_ircal_clear) {
                addrs.insert(10);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rccal_clear != this->irq_rccal_clear) {
                addrs.insert(10);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_set != this->irq_set) {
                addrs.insert(11);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_xtalcal_set != this->irq_xtalcal_set) {
                addrs.insert(11);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rssi_set != this->irq_rssi_set) {
                addrs.insert(11);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_localc_set != this->irq_localc_set) {
                addrs.insert(11);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rfcal_set != this->irq_rfcal_set) {
                addrs.insert(11);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_ircal_set != this->irq_ircal_set) {
                addrs.insert(11);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_rccal_set != this->irq_rccal_set) {
                addrs.insert(11);
            }
        }
        if (include_ro || !false) {
            if(_state->lt_enable != this->lt_enable) {
                addrs.insert(12);
            }
        }
        if (include_ro || !false) {
            if(_state->agc1_6_15db != this->agc1_6_15db) {
                addrs.insert(12);
            }
        }
        if (include_ro || !false) {
            if(_state->agc1_top != this->agc1_top) {
                addrs.insert(12);
            }
        }
        if (include_ro || !false) {
            if(_state->agc2_top != this->agc2_top) {
                addrs.insert(13);
            }
        }
        if (include_ro || !false) {
            if(_state->agcs_up_step_assym != this->agcs_up_step_assym) {
                addrs.insert(14);
            }
        }
        if (include_ro || !false) {
            if(_state->agcs_up_step != this->agcs_up_step) {
                addrs.insert(14);
            }
        }
        if (include_ro || !false) {
            if(_state->pulse_shaper_disable != this->pulse_shaper_disable) {
                addrs.insert(14);
            }
        }
        if (include_ro || !false) {
            if(_state->agck_step != this->agck_step) {
                addrs.insert(14);
            }
        }
        if (include_ro || !false) {
            if(_state->agck_mode != this->agck_mode) {
                addrs.insert(14);
            }
        }
        if (include_ro || !false) {
            if(_state->pd_rfagc_adapt != this->pd_rfagc_adapt) {
                addrs.insert(15);
            }
        }
        if (include_ro || !false) {
            if(_state->rfagc_adapt_top != this->rfagc_adapt_top) {
                addrs.insert(15);
            }
        }
        if (include_ro || !false) {
            if(_state->rfagc_low_bw != this->rfagc_low_bw) {
                addrs.insert(15);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_atten_3db != this->rf_atten_3db) {
                addrs.insert(15);
            }
        }
        if (include_ro || !false) {
            if(_state->agc3_top != this->agc3_top) {
                addrs.insert(15);
            }
        }
        if (include_ro || !false) {
            if(_state->agc4_top != this->agc4_top) {
                addrs.insert(16);
            }
        }
        if (include_ro || !false) {
            if(_state->agcs_do_step_assym != this->agcs_do_step_assym) {
                addrs.insert(17);
            }
        }
        if (include_ro || !false) {
            if(_state->agc5_hpf != this->agc5_hpf) {
                addrs.insert(17);
            }
        }
        if (include_ro || !false) {
            if(_state->agc5_top != this->agc5_top) {
                addrs.insert(17);
            }
        }
        if (include_ro || !false) {
            if(_state->if_level != this->if_level) {
                addrs.insert(18);
            }
        }
        if (include_ro || !false) {
            if(_state->if_hp_fc != this->if_hp_fc) {
                addrs.insert(19);
            }
        }
        if (include_ro || !false) {
            if(_state->if_atsc_notch != this->if_atsc_notch) {
                addrs.insert(19);
            }
        }
        if (include_ro || !false) {
            if(_state->lp_fc_offset != this->lp_fc_offset) {
                addrs.insert(19);
            }
        }
        if (include_ro || !false) {
            if(_state->lp_fc != this->lp_fc) {
                addrs.insert(19);
            }
        }
        if (include_ro || !false) {
            if(_state->i2c_clock_mode != this->i2c_clock_mode) {
                addrs.insert(20);
            }
        }
        if (include_ro || !false) {
            if(_state->digital_clock != this->digital_clock) {
                addrs.insert(20);
            }
        }
        if (include_ro || !false) {
            if(_state->xtalosc_anareg_en != this->xtalosc_anareg_en) {
                addrs.insert(20);
            }
        }
        if (include_ro || !false) {
            if(_state->xtout != this->xtout) {
                addrs.insert(20);
            }
        }
        if (include_ro || !false) {
            if(_state->if_freq != this->if_freq) {
                addrs.insert(21);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_freq_19_16 != this->rf_freq_19_16) {
                addrs.insert(22);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_freq_15_8 != this->rf_freq_15_8) {
                addrs.insert(23);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_freq_7_0 != this->rf_freq_7_0) {
                addrs.insert(24);
            }
        }
        if (include_ro || !false) {
            if(_state->rssi_meas != this->rssi_meas) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_cal_av != this->rf_cal_av) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_cal != this->rf_cal) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_cal_loop != this->ir_cal_loop) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_cal_image != this->ir_cal_image) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_cal_wanted != this->ir_cal_wanted) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->rc_cal != this->rc_cal) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->calc_pll != this->calc_pll) {
                addrs.insert(25);
            }
        }
        if (include_ro || !false) {
            if(_state->xtalcal_launch != this->xtalcal_launch) {
                addrs.insert(26);
            }
        }
        if (include_ro || !false) {
            if(_state->msm_launch != this->msm_launch) {
                addrs.insert(26);
            }
        }
        if (include_ro || !false) {
            if(_state->psm_agc1 != this->psm_agc1) {
                addrs.insert(27);
            }
        }
        if (include_ro || !false) {
            if(_state->psm_stob != this->psm_stob) {
                addrs.insert(27);
            }
        }
        if (include_ro || !false) {
            if(_state->psmrfpoly != this->psmrfpoly) {
                addrs.insert(27);
            }
        }
        if (include_ro || !false) {
            if(_state->psm_mixer != this->psm_mixer) {
                addrs.insert(27);
            }
        }
        if (include_ro || !false) {
            if(_state->psm_ifpoly != this->psm_ifpoly) {
                addrs.insert(27);
            }
        }
        if (include_ro || !false) {
            if(_state->psm_lodriver != this->psm_lodriver) {
                addrs.insert(27);
            }
        }
        if (include_ro || !false) {
            if(_state->dcc_bypass != this->dcc_bypass) {
                addrs.insert(28);
            }
        }
        if (include_ro || !false) {
            if(_state->dcc_slow != this->dcc_slow) {
                addrs.insert(28);
            }
        }
        if (include_ro || !false) {
            if(_state->dcc_psm != this->dcc_psm) {
                addrs.insert(28);
            }
        }
        if (include_ro || !false) {
            if(_state->fmax_lo != this->fmax_lo) {
                addrs.insert(29);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_loop != this->ir_loop) {
                addrs.insert(30);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_target != this->ir_target) {
                addrs.insert(30);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_gstep != this->ir_gstep) {
                addrs.insert(30);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_corr_boost != this->ir_corr_boost) {
                addrs.insert(31);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_freqlow_sel != this->ir_freqlow_sel) {
                addrs.insert(31);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_mode_ram_store != this->ir_mode_ram_store) {
                addrs.insert(31);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_freqlow != this->ir_freqlow) {
                addrs.insert(31);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_freqmid != this->ir_freqmid) {
                addrs.insert(32);
            }
        }
        if (include_ro || !false) {
            if(_state->coarse_ir_freqhigh != this->coarse_ir_freqhigh) {
                addrs.insert(33);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_freqhigh != this->ir_freqhigh) {
                addrs.insert(33);
            }
        }
        if (include_ro || !false) {
            if(_state->pd_vsync_mgt != this->pd_vsync_mgt) {
                addrs.insert(34);
            }
        }
        if (include_ro || !false) {
            if(_state->pd_ovld != this->pd_ovld) {
                addrs.insert(34);
            }
        }
        if (include_ro || !false) {
            if(_state->pd_udld != this->pd_udld) {
                addrs.insert(34);
            }
        }
        if (include_ro || !false) {
            if(_state->agc_ovld_top != this->agc_ovld_top) {
                addrs.insert(34);
            }
        }
        if (include_ro || !false) {
            if(_state->agc_ovld_timer != this->agc_ovld_timer) {
                addrs.insert(34);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_mixer_loop_off != this->ir_mixer_loop_off) {
                addrs.insert(35);
            }
        }
        if (include_ro || !false) {
            if(_state->ir_mixer_do_step != this->ir_mixer_do_step) {
                addrs.insert(35);
            }
        }
        if (include_ro || !false) {
            if(_state->hi_pass != this->hi_pass) {
                addrs.insert(35);
            }
        }
        if (include_ro || !false) {
            if(_state->if_notch != this->if_notch) {
                addrs.insert(35);
            }
        }
        if (include_ro || !false) {
            if(_state->agc1_loop_off != this->agc1_loop_off) {
                addrs.insert(36);
            }
        }
        if (include_ro || !false) {
            if(_state->agc1_do_step != this->agc1_do_step) {
                addrs.insert(36);
            }
        }
        if (include_ro || !false) {
            if(_state->force_agc1_gain != this->force_agc1_gain) {
                addrs.insert(36);
            }
        }
        if (include_ro || !false) {
            if(_state->agc1_gain != this->agc1_gain) {
                addrs.insert(36);
            }
        }
        if (include_ro || !false) {
            if(_state->agc5_loop_off != this->agc5_loop_off) {
                addrs.insert(37);
            }
        }
        if (include_ro || !false) {
            if(_state->agc5_do_step != this->agc5_do_step) {
                addrs.insert(37);
            }
        }
        if (include_ro || !false) {
            if(_state->force_agc5_gain != this->force_agc5_gain) {
                addrs.insert(37);
            }
        }
        if (include_ro || !false) {
            if(_state->agc5_gain != this->agc5_gain) {
                addrs.insert(37);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog0 != this->rfcal_offset_cprog0) {
                addrs.insert(38);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq0 != this->rfcal_freq0) {
                addrs.insert(38);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog1 != this->rfcal_offset_cprog1) {
                addrs.insert(38);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq1 != this->rfcal_freq1) {
                addrs.insert(38);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog2 != this->rfcal_offset_cprog2) {
                addrs.insert(39);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq2 != this->rfcal_freq2) {
                addrs.insert(39);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog3 != this->rfcal_offset_cprog3) {
                addrs.insert(39);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq3 != this->rfcal_freq3) {
                addrs.insert(39);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog4 != this->rfcal_offset_cprog4) {
                addrs.insert(40);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq4 != this->rfcal_freq4) {
                addrs.insert(40);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog5 != this->rfcal_offset_cprog5) {
                addrs.insert(40);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq5 != this->rfcal_freq5) {
                addrs.insert(40);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog6 != this->rfcal_offset_cprog6) {
                addrs.insert(41);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq6 != this->rfcal_freq6) {
                addrs.insert(41);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog7 != this->rfcal_offset_cprog7) {
                addrs.insert(41);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq7 != this->rfcal_freq7) {
                addrs.insert(41);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog8 != this->rfcal_offset_cprog8) {
                addrs.insert(42);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq8 != this->rfcal_freq8) {
                addrs.insert(42);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog9 != this->rfcal_offset_cprog9) {
                addrs.insert(42);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq9 != this->rfcal_freq9) {
                addrs.insert(42);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog10 != this->rfcal_offset_cprog10) {
                addrs.insert(43);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq10 != this->rfcal_freq10) {
                addrs.insert(43);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_offset_cprog11 != this->rfcal_offset_cprog11) {
                addrs.insert(43);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_freq11 != this->rfcal_freq11) {
                addrs.insert(43);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_filter_bypass != this->rf_filter_bypass) {
                addrs.insert(44);
            }
        }
        if (include_ro || !false) {
            if(_state->agc2_loop_off != this->agc2_loop_off) {
                addrs.insert(44);
            }
        }
        if (include_ro || !false) {
            if(_state->force_agc2_gain != this->force_agc2_gain) {
                addrs.insert(44);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_filter_gv != this->rf_filter_gv) {
                addrs.insert(44);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_filter_band != this->rf_filter_band) {
                addrs.insert(44);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_filter_cap != this->rf_filter_cap) {
                addrs.insert(45);
            }
        }
        if (include_ro || !false) {
            if(_state->agc2_do_step != this->agc2_do_step) {
                addrs.insert(46);
            }
        }
        if (include_ro || !false) {
            if(_state->gain_taper != this->gain_taper) {
                addrs.insert(46);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_bpf_bypass != this->rf_bpf_bypass) {
                addrs.insert(47);
            }
        }
        if (include_ro || !false) {
            if(_state->rf_bpf != this->rf_bpf) {
                addrs.insert(47);
            }
        }
        if (include_ro || !false) {
            if(_state->n_cp_current != this->n_cp_current) {
                addrs.insert(48);
            }
        }
        if (include_ro || !false) {
            if(_state->up_agc5 != this->up_agc5) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->do_agc5 != this->do_agc5) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->up_agc4 != this->up_agc4) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->do_agc4 != this->do_agc4) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->up_agc2 != this->up_agc2) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->do_agc2 != this->do_agc2) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->up_agc1 != this->up_agc1) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->do_agc1 != this->do_agc1) {
                addrs.insert(49);
            }
        }
        if (include_ro || !false) {
            if(_state->agc2_gain_read != this->agc2_gain_read) {
                addrs.insert(50);
            }
        }
        if (include_ro || !false) {
            if(_state->agc1_gain_read != this->agc1_gain_read) {
                addrs.insert(50);
            }
        }
        if (include_ro || !false) {
            if(_state->top_agc3_read != this->top_agc3_read) {
                addrs.insert(51);
            }
        }
        if (include_ro || !false) {
            if(_state->agc5_gain_read != this->agc5_gain_read) {
                addrs.insert(52);
            }
        }
        if (include_ro || !false) {
            if(_state->agc4_gain_read != this->agc4_gain_read) {
                addrs.insert(52);
            }
        }
        if (include_ro || !false) {
            if(_state->rssi != this->rssi) {
                addrs.insert(53);
            }
        }
        if (include_ro || !false) {
            if(_state->rssi_av != this->rssi_av) {
                addrs.insert(54);
            }
        }
        if (include_ro || !false) {
            if(_state->rssi_cap_reset_en != this->rssi_cap_reset_en) {
                addrs.insert(54);
            }
        }
        if (include_ro || !false) {
            if(_state->rssi_cap_val != this->rssi_cap_val) {
                addrs.insert(54);
            }
        }
        if (include_ro || !false) {
            if(_state->rssi_ck_speed != this->rssi_ck_speed) {
                addrs.insert(54);
            }
        }
        if (include_ro || !false) {
            if(_state->rssi_dicho_not != this->rssi_dicho_not) {
                addrs.insert(54);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_phi2 != this->rfcal_phi2) {
                addrs.insert(55);
            }
        }
        if (include_ro || !false) {
            if(_state->dds_polarity != this->dds_polarity) {
                addrs.insert(55);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_deltagain != this->rfcal_deltagain) {
                addrs.insert(55);
            }
        }
        if (include_ro || !false) {
            if(_state->irq_polarity != this->irq_polarity) {
                addrs.insert(55);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_1 != this->rfcal_log_1) {
                addrs.insert(56);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_2 != this->rfcal_log_2) {
                addrs.insert(57);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_3 != this->rfcal_log_3) {
                addrs.insert(58);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_4 != this->rfcal_log_4) {
                addrs.insert(59);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_5 != this->rfcal_log_5) {
                addrs.insert(60);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_6 != this->rfcal_log_6) {
                addrs.insert(61);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_7 != this->rfcal_log_7) {
                addrs.insert(62);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_8 != this->rfcal_log_8) {
                addrs.insert(63);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_9 != this->rfcal_log_9) {
                addrs.insert(64);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_10 != this->rfcal_log_10) {
                addrs.insert(65);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_11 != this->rfcal_log_11) {
                addrs.insert(66);
            }
        }
        if (include_ro || !false) {
            if(_state->rfcal_log_12 != this->rfcal_log_12) {
                addrs.insert(67);
            }
        }
        if (include_ro || !false) {
            if(_state->magic != this->magic) {
                addrs.insert(67);
            }
        }
        return addrs;
    }

    uint32_t get_rf_freq(void){
        return 
        (uint32_t(rf_freq_7_0 & 0xff) << 0) |
        (uint32_t(rf_freq_15_8 & 0xff) << 8) |
        (uint32_t(rf_freq_19_16 & 0xf) << 16) |
        0;
    }

    void set_rf_freq(uint32_t reg){
        rf_freq_7_0 = (reg >> 0) & 0xff;
        rf_freq_15_8 = (reg >> 8) & 0xff;
        rf_freq_19_16 = (reg >> 16) & 0xf;
    }

private:
    tda18272hnm_regs_t *_state;
};

#endif /* INCLUDED_TDA18272HNM_REGS_HPP */
