/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Register Information Header Fragment                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

#include "llvm/CodeGen/TargetRegisterInfo.h"

namespace llvm {

class AMDGPUFrameLowering;

struct AMDGPUGenRegisterInfo : public TargetRegisterInfo {
  explicit AMDGPUGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0,
      unsigned PC = 0, unsigned HwMode = 0);
  unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override;
  unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override;
  LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override;
  const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override;
  const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override;
  unsigned getRegUnitWeight(MCRegUnit RegUnit) const override;
  unsigned getNumRegPressureSets() const override;
  const char *getRegPressureSetName(unsigned Idx) const override;
  unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override;
  const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override;
  const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override;
  ArrayRef<const char *> getRegMaskNames() const override;
  ArrayRef<const uint32_t *> getRegMasks() const override;
  bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override;
  bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override;
  bool isFixedRegister(const MachineFunction &, MCRegister) const override;
  bool isArgumentRegister(const MachineFunction &, MCRegister) const override;
  bool isConstantPhysReg(MCRegister PhysReg) const override final;
  /// Devirtualized TargetFrameLowering.
  static const AMDGPUFrameLowering *getFrameLowering(
      const MachineFunction &MF);
  const TargetRegisterClass *getPhysRegBaseClass(MCRegister Reg) const override;
};

namespace AMDGPU { // Register classes
  extern const TargetRegisterClass SCC_CLASSRegClass;
  extern const TargetRegisterClass VReg_1RegClass;
  extern const TargetRegisterClass VS_16RegClass;
  extern const TargetRegisterClass VGPR_16RegClass;
  extern const TargetRegisterClass VS_16_Lo128RegClass;
  extern const TargetRegisterClass AGPR_LO16RegClass;
  extern const TargetRegisterClass VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass SReg_LO16RegClass;
  extern const TargetRegisterClass VS_16_with_hi16RegClass;
  extern const TargetRegisterClass SGPR_HI16RegClass;
  extern const TargetRegisterClass SGPR_LO16RegClass;
  extern const TargetRegisterClass VS_16_with_hi16_with_lo16_in_SGPR_LO16RegClass;
  extern const TargetRegisterClass TTMP_LO16RegClass;
  extern const TargetRegisterClass VS_16_with_hi16_with_lo16_in_TTMP_LO16RegClass;
  extern const TargetRegisterClass AV_32RegClass;
  extern const TargetRegisterClass VS_32RegClass;
  extern const TargetRegisterClass VS_32_with_hi16RegClass;
  extern const TargetRegisterClass VRegOrLds_32RegClass;
  extern const TargetRegisterClass VGPR_32RegClass;
  extern const TargetRegisterClass VS_32_Lo256RegClass;
  extern const TargetRegisterClass VS_32_Lo256_with_hi16RegClass;
  extern const TargetRegisterClass VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_32_Lo128_with_hi16RegClass;
  extern const TargetRegisterClass VRegOrLds_32_and_VS_32_Lo256RegClass;
  extern const TargetRegisterClass AGPR_32RegClass;
  extern const TargetRegisterClass VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass SRegOrLds_32RegClass;
  extern const TargetRegisterClass SReg_32RegClass;
  extern const TargetRegisterClass SReg_32_XEXEC_HIRegClass;
  extern const TargetRegisterClass SReg_32_XM0RegClass;
  extern const TargetRegisterClass SReg_32_XEXECRegClass;
  extern const TargetRegisterClass SReg_32_XEXEC_HI_and_SReg_32_XM0RegClass;
  extern const TargetRegisterClass SReg_32_XM0_XEXECRegClass;
  extern const TargetRegisterClass VRegOrLds_32_and_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SGPR_32RegClass;
  extern const TargetRegisterClass TTMP_32RegClass;
  extern const TargetRegisterClass Pseudo_SReg_32RegClass;
  extern const TargetRegisterClass SRegOrLds_32_and_VRegOrLds_32RegClass;
  extern const TargetRegisterClass AV_64RegClass;
  extern const TargetRegisterClass VS_64RegClass;
  extern const TargetRegisterClass VS_64_with_sub1RegClass;
  extern const TargetRegisterClass VReg_64RegClass;
  extern const TargetRegisterClass AV_64_Align2RegClass;
  extern const TargetRegisterClass VS_64_Align2RegClass;
  extern const TargetRegisterClass VS_64_Align2_with_sub1RegClass;
  extern const TargetRegisterClass VReg_64_Align2RegClass;
  extern const TargetRegisterClass VS_64_with_sub0_in_VS_32_Lo256RegClass;
  extern const TargetRegisterClass VS_64_with_sub1_and_VS_64_with_sub0_in_VS_32_Lo256RegClass;
  extern const TargetRegisterClass VS_64_with_sub1_with_sub1_in_VS_32_Lo256RegClass;
  extern const TargetRegisterClass AV_64_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_64RegClass;
  extern const TargetRegisterClass AV_64_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass VS_64_Lo256RegClass;
  extern const TargetRegisterClass VS_64_with_sub0_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_64_Lo256_with_sub1RegClass;
  extern const TargetRegisterClass VS_64_with_sub1_and_VS_64_with_sub0_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_64_with_sub1_with_sub1_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_64_Align2_and_VS_64_with_sub0_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_64_with_sub1_and_VS_64_Align2_and_VS_64_with_sub0_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_64_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_64_EncodableRegClass;
  extern const TargetRegisterClass SReg_64_Encodable_with_sub0_in_SReg_32_XEXECRegClass;
  extern const TargetRegisterClass SReg_64RegClass;
  extern const TargetRegisterClass SReg_64_XEXECRegClass;
  extern const TargetRegisterClass SReg_64_XEXEC_XNULLRegClass;
  extern const TargetRegisterClass AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass SGPR_64RegClass;
  extern const TargetRegisterClass CCR_SGPR_64RegClass;
  extern const TargetRegisterClass Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_64RegClass;
  extern const TargetRegisterClass APERTURE_ClassRegClass;
  extern const TargetRegisterClass AV_96RegClass;
  extern const TargetRegisterClass VReg_96RegClass;
  extern const TargetRegisterClass AV_96_Align2RegClass;
  extern const TargetRegisterClass AV_96_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_96_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass VReg_96_Align2RegClass;
  extern const TargetRegisterClass AV_96_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_96_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_96RegClass;
  extern const TargetRegisterClass AV_96_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_96_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_96_with_sub0_in_VGPR_32_Lo256_and_AV_96_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_96_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_96_Align2RegClass;
  extern const TargetRegisterClass AReg_96_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_96_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_96_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_96_with_hi16_in_VGPR_16_Lo128_and_AV_96_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_96_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_96_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass SReg_96RegClass;
  extern const TargetRegisterClass SGPR_96RegClass;
  extern const TargetRegisterClass SGPR_96_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_96_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_96RegClass;
  extern const TargetRegisterClass AV_128RegClass;
  extern const TargetRegisterClass VS_128RegClass;
  extern const TargetRegisterClass VS_128_with_hi16RegClass;
  extern const TargetRegisterClass VReg_128RegClass;
  extern const TargetRegisterClass AV_128_Align2RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass VS_128_Align2RegClass;
  extern const TargetRegisterClass VS_128_Align2_with_hi16RegClass;
  extern const TargetRegisterClass VReg_128_Align2RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub0_in_VS_32_Lo256RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub1_in_VS_32_Lo256RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub2_in_VS_32_Lo256RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub3_in_VS_32_Lo256RegClass;
  extern const TargetRegisterClass AV_128_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_128_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_128RegClass;
  extern const TargetRegisterClass AV_128_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub0_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub0_sub1_in_VS_64_Lo256RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub1_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub2_sub3_in_VS_64_Lo256RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub2_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub3_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_sub0_in_VGPR_32_Lo256_and_AV_128_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_128_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_128_Align2RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_128_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_128_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub0_sub1_in_VS_64_Align2_and_VS_64_with_sub0_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass VS_128_with_hi16_with_sub2_sub3_in_VS_64_Align2_and_VS_64_with_sub0_in_VS_32_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_hi16_in_VGPR_16_Lo128_and_AV_128_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_128_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_128_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_128RegClass;
  extern const TargetRegisterClass SReg_128_XNULLRegClass;
  extern const TargetRegisterClass SGPR_128RegClass;
  extern const TargetRegisterClass SGPR_128_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_128_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_128_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_128RegClass;
  extern const TargetRegisterClass Pseudo_SReg_128RegClass;
  extern const TargetRegisterClass AV_160RegClass;
  extern const TargetRegisterClass VReg_160RegClass;
  extern const TargetRegisterClass AV_160_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass VReg_160_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_160_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_160_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_160RegClass;
  extern const TargetRegisterClass AV_160_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_160_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_sub0_in_VGPR_32_Lo256_and_AV_160_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_160_Align2RegClass;
  extern const TargetRegisterClass AReg_160_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_hi16_in_VGPR_16_Lo128_and_AV_160_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_160_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_160_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_160RegClass;
  extern const TargetRegisterClass SGPR_160RegClass;
  extern const TargetRegisterClass SGPR_160_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_160_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_160_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_160RegClass;
  extern const TargetRegisterClass AV_192RegClass;
  extern const TargetRegisterClass VReg_192RegClass;
  extern const TargetRegisterClass AV_192_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass VReg_192_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_192_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_192_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_192_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_192RegClass;
  extern const TargetRegisterClass AV_192_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_192_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub0_in_VGPR_32_Lo256_and_AV_192_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_192_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_192_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_hi16_in_VGPR_16_Lo128_and_AV_192_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_192_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_192_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_192RegClass;
  extern const TargetRegisterClass SGPR_192RegClass;
  extern const TargetRegisterClass SGPR_192_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_192_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_192_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_192_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_192_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_192_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_192RegClass;
  extern const TargetRegisterClass AV_224RegClass;
  extern const TargetRegisterClass VReg_224RegClass;
  extern const TargetRegisterClass AV_224_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass VReg_224_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_224_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_224_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_224_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_224_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_224RegClass;
  extern const TargetRegisterClass AV_224_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_224_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub0_in_VGPR_32_Lo256_and_AV_224_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_224_Align2RegClass;
  extern const TargetRegisterClass AReg_224_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_hi16_in_VGPR_16_Lo128_and_AV_224_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_224_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_224_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_224RegClass;
  extern const TargetRegisterClass SGPR_224RegClass;
  extern const TargetRegisterClass SGPR_224_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_224_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_224_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_224_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_224_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_224_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_224RegClass;
  extern const TargetRegisterClass AV_256RegClass;
  extern const TargetRegisterClass VReg_256RegClass;
  extern const TargetRegisterClass AV_256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass VReg_256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_256_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_256_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_256_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_256_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_256_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_256RegClass;
  extern const TargetRegisterClass AV_256_with_sub7_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_256_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub0_in_VGPR_32_Lo256_and_AV_256_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_256_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_256_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_in_VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub7_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_hi16_in_VGPR_16_Lo128_and_AV_256_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_256_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_256_with_sub5_sub6_sub7_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_256RegClass;
  extern const TargetRegisterClass SReg_256_XNULLRegClass;
  extern const TargetRegisterClass SGPR_256RegClass;
  extern const TargetRegisterClass SGPR_256_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_256_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_256_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_256_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_256_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_256_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_256_with_sub6_sub7_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_256RegClass;
  extern const TargetRegisterClass AV_288RegClass;
  extern const TargetRegisterClass VReg_288RegClass;
  extern const TargetRegisterClass AV_288_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass VReg_288_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_sub7_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_288RegClass;
  extern const TargetRegisterClass AV_288_with_sub8_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_288_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_in_VGPR_32_Lo256_and_AV_288_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7_in_VReg_256_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_288_Align2RegClass;
  extern const TargetRegisterClass AReg_288_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_in_VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_288_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub7_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub8_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_hi16_in_VGPR_16_Lo128_and_AV_288_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub5_sub6_sub7_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_288_with_sub6_sub7_sub8_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_288RegClass;
  extern const TargetRegisterClass SGPR_288RegClass;
  extern const TargetRegisterClass SGPR_288_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_288_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_288_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_288_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_288_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_288_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_288_with_sub6_sub7_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_288RegClass;
  extern const TargetRegisterClass AV_320RegClass;
  extern const TargetRegisterClass VReg_320RegClass;
  extern const TargetRegisterClass AV_320_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass VReg_320_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub7_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_sub8_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_320RegClass;
  extern const TargetRegisterClass AV_320_with_sub9_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_320_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_in_VGPR_32_Lo256_and_AV_320_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7_in_VReg_256_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_320_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_in_VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_320_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_320_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_288_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub7_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub8_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub9_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_hi16_in_VGPR_16_Lo128_and_AV_320_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub5_sub6_sub7_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub6_sub7_sub8_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_320_with_sub7_sub8_sub9_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_320RegClass;
  extern const TargetRegisterClass SGPR_320RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_320_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_320_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub6_sub7_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_320_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_320RegClass;
  extern const TargetRegisterClass SGPR_320_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_320_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass AV_352RegClass;
  extern const TargetRegisterClass VReg_352RegClass;
  extern const TargetRegisterClass AV_352_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass VReg_352_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub7_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub8_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_sub9_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_352RegClass;
  extern const TargetRegisterClass AV_352_with_sub10_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_352_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_in_VGPR_32_Lo256_and_AV_352_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7_in_VReg_256_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_lo16_hi16_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_320_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_in_VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_352_Align2RegClass;
  extern const TargetRegisterClass AReg_352_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_288_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub7_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub8_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub9_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub10_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_hi16_in_VGPR_16_Lo128_and_AV_352_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub5_sub6_sub7_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub6_sub7_sub8_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub7_sub8_sub9_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_352_with_sub8_sub9_sub10_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_352RegClass;
  extern const TargetRegisterClass SGPR_352RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_352_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_352_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub6_sub7_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_352_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_352RegClass;
  extern const TargetRegisterClass SGPR_352_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_352_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass AV_384RegClass;
  extern const TargetRegisterClass VReg_384RegClass;
  extern const TargetRegisterClass AV_384_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass VReg_384_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub7_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub8_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub9_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_sub10_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_384RegClass;
  extern const TargetRegisterClass AV_384_with_sub11_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_384_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_in_VGPR_32_Lo256_and_AV_384_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7_in_VReg_256_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_lo16_hi16_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_320_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_in_VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_384_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_288_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_384_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_384_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub7_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub8_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub9_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub10_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub11_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_hi16_in_VGPR_16_Lo128_and_AV_384_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub5_sub6_sub7_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub6_sub7_sub8_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub7_sub8_sub9_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub8_sub9_sub10_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_384_with_sub9_sub10_sub11_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_384RegClass;
  extern const TargetRegisterClass SGPR_384RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_384_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub6_sub7_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub10_sub11_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_384RegClass;
  extern const TargetRegisterClass SGPR_384_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass AV_512RegClass;
  extern const TargetRegisterClass VReg_512RegClass;
  extern const TargetRegisterClass AV_512_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass VReg_512_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub7_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub8_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub9_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub10_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub11_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub12_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub13_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_sub14_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_512RegClass;
  extern const TargetRegisterClass AV_512_with_sub15_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_512_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_in_VGPR_32_Lo256_and_AV_512_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7_in_VReg_256_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_lo16_hi16_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_320_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_in_VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_lo16_hi16_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_in_VReg_384_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_288_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AReg_512_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub7_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass VReg_512_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_512_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub8_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub9_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub10_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub11_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub12_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub13_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub14_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub15_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_hi16_in_VGPR_16_Lo128_and_AV_512_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub5_sub6_sub7_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub6_sub7_sub8_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub7_sub8_sub9_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub8_sub9_sub10_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub10_sub11_sub12_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub9_sub10_sub11_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub11_sub12_sub13_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub12_sub13_sub14_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_512_with_sub13_sub14_sub15_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SReg_512RegClass;
  extern const TargetRegisterClass SGPR_512RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_512_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_512_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub6_sub7_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub8_sub9_in_Gfx_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_512_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub10_sub11_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub14_sub15_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_512_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_512_with_sub0_sub1_in_CCR_SGPR_64_with_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_in_SGPR_384_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass TTMP_512RegClass;
  extern const TargetRegisterClass AV_1024RegClass;
  extern const TargetRegisterClass VReg_1024RegClass;
  extern const TargetRegisterClass AV_1024_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass VReg_1024_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_sub2_in_VReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub2_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub3_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub4_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub5_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub6_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub7_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub8_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub9_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub10_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub11_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub12_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub13_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub14_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub15_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub16_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub17_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub18_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub19_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub20_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub21_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub22_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub23_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub24_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub25_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub26_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub27_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub28_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub29_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_sub30_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AReg_1024RegClass;
  extern const TargetRegisterClass AV_1024_with_sub31_in_VGPR_32_Lo256RegClass;
  extern const TargetRegisterClass AV_1024_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_in_VGPR_32_Lo256_and_AV_1024_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_sub1_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_sub1_sub2_sub3_in_VReg_128_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_sub2_in_VReg_64_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_sub1_sub2_sub3_sub4_sub5_in_VReg_192_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_sub2_sub3_in_VReg_96_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7_in_VReg_256_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_sub2_sub3_sub4_sub5_in_VReg_160_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub3_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_lo16_hi16_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_320_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_in_VReg_224_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub4_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_lo16_hi16_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_in_VReg_384_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_in_VReg_288_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub5_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_lo16_sub1_hi16_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub2_lo16_sub2_hi16_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub6_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7_sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15_in_VReg_512_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub3_lo16_sub3_hi16_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub7_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub8_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub9_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub10_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub11_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub12_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub13_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_sub26_lo16_sub26_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub14_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_sub26_lo16_sub26_hi16_sub27_lo16_sub27_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_sub26_lo16_sub26_hi16_sub27_lo16_sub27_hi16_sub28_lo16_sub28_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_1024_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub15_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_sub26_lo16_sub26_hi16_sub27_lo16_sub27_hi16_sub28_lo16_sub28_hi16_sub29_lo16_sub29_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass VReg_1024_Lo256_Align2RegClass;
  extern const TargetRegisterClass AReg_1024_with_sub1_sub2_in_AReg_64_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub16_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_sub26_lo16_sub26_hi16_sub27_lo16_sub27_hi16_sub28_lo16_sub28_hi16_sub29_lo16_sub29_hi16_sub30_lo16_sub30_hi16_sub31_lo16_sub31_hi16_in_VReg_352_Lo256_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub17_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub18_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub19_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub20_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub21_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub22_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub23_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub24_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub25_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub26_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub27_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub28_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub29_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub30_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub31_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_hi16_in_VGPR_16_Lo128_and_AV_1024_with_sub1_sub2_in_AV_64_Align2RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_sub1_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub0_sub1_sub2_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_sub2_in_AV_64_Align2_and_AV_64_with_hi16_in_VGPR_16_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub1_sub2_sub3_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub2_sub3_sub4_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub3_sub4_sub5_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub4_sub5_sub6_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub5_sub6_sub7_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub6_sub7_sub8_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub7_sub8_sub9_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub8_sub9_sub10_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub10_sub11_sub12_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub9_sub10_sub11_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub11_sub12_sub13_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub12_sub13_sub14_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub13_sub14_sub15_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub14_sub15_sub16_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub15_sub16_sub17_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub16_sub17_sub18_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub17_sub18_sub19_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub18_sub19_sub20_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub19_sub20_sub21_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub20_sub21_sub22_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub21_sub22_sub23_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub22_sub23_sub24_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub23_sub24_sub25_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub24_sub25_sub26_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub25_sub26_sub27_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub26_sub27_sub28_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub27_sub28_sub29_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub28_sub29_sub30_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass AV_1024_with_sub29_sub30_sub31_in_AV_96_Align2_and_AV_96_with_sub2_in_VGPR_32_Lo128RegClass;
  extern const TargetRegisterClass SGPR_1024RegClass;
  extern const TargetRegisterClass SReg_1024RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub2_sub3_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub6_sub7_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub10_sub11_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub2_sub3_in_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub14_sub15_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub2_sub3_in_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub6_sub7_in_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub16_sub17_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub10_sub11_in_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub18_sub19_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub2_sub3_in_CCR_SGPR_64_and_SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub6_sub7_in_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_1024_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub12_sub13_sub14_sub15_sub16_sub17_sub18_sub19_sub20_sub21_sub22_sub23_sub24_sub25_sub26_sub27_in_SGPR_512_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub16_sub17_sub18_sub19_sub20_sub21_sub22_sub23_sub24_sub25_sub26_sub27_sub28_sub29_sub30_sub31_in_SGPR_512_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub4_sub5_sub6_sub7_sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15_sub16_sub17_sub18_sub19_in_SGPR_512_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15_sub16_sub17_sub18_sub19_sub20_sub21_sub22_sub23_in_SGPR_512_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_512_with_sub12_sub13_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub20_sub21_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub22_sub23_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_1024_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_in_SGPR_384_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_sub26_lo16_sub26_hi16_sub27_lo16_sub27_hi16_in_SGPR_384_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub20_lo16_sub20_hi16_sub21_lo16_sub21_hi16_sub22_lo16_sub22_hi16_sub23_lo16_sub23_hi16_sub24_lo16_sub24_hi16_sub25_lo16_sub25_hi16_sub26_lo16_sub26_hi16_sub27_lo16_sub27_hi16_sub28_lo16_sub28_hi16_sub29_lo16_sub29_hi16_sub30_lo16_sub30_hi16_sub31_lo16_sub31_hi16_in_SGPR_384_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub4_lo16_sub4_hi16_sub5_lo16_sub5_hi16_sub6_lo16_sub6_hi16_sub7_lo16_sub7_hi16_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_in_SGPR_384_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_CCR_SGPR_64_with_sub8_lo16_sub8_hi16_sub9_lo16_sub9_hi16_sub10_lo16_sub10_hi16_sub11_lo16_sub11_hi16_sub12_lo16_sub12_hi16_sub13_lo16_sub13_hi16_sub14_lo16_sub14_hi16_sub15_lo16_sub15_hi16_sub16_lo16_sub16_hi16_sub17_lo16_sub17_hi16_sub18_lo16_sub18_hi16_sub19_lo16_sub19_hi16_in_SGPR_384_with_sub0_sub1_in_CCR_SGPR_64_and_SGPR_384_with_sub8_sub9_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub0_sub1_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub24_sub25_in_Gfx_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub26_sub27_in_CCR_SGPR_64RegClass;
  extern const TargetRegisterClass SGPR_1024_with_sub4_sub5_in_Gfx_CCR_SGPR_64_and_SGPR_1024_with_sub28_sub29_in_Gfx_CCR_SGPR_64RegClass;
} // end namespace AMDGPU

} // end namespace llvm

