/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Assembly Writer Source Fragment                                            *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|* From: PPC.td                                                               *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

/// getMnemonic - This method is automatically generated by tablegen
/// from the instruction set description.
std::pair<const char *, uint64_t>
PPCInstPrinter::getMnemonic(const MCInst &MI) const {

#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Woverlength-strings"
#endif
  static const char AsmStrs[] = {
  /* 0 */ "#EH_SjLj_Setup\t\000"
  /* 16 */ "bdzla+ \000"
  /* 24 */ "bdnzla+ \000"
  /* 33 */ "bdza+ \000"
  /* 40 */ "bdnza+ \000"
  /* 48 */ "bdzl+ \000"
  /* 55 */ "bdnzl+ \000"
  /* 63 */ "bdz+ \000"
  /* 69 */ "bdnz+ \000"
  /* 76 */ "bcl 20, 31, \000"
  /* 89 */ "bctrl\n\tld 2, \000"
  /* 103 */ "bctrl\n\tlwz 2, \000"
  /* 118 */ "bc 12, \000"
  /* 126 */ "bcl 12, \000"
  /* 135 */ "bclrl 12, \000"
  /* 146 */ "bcctrl 12, \000"
  /* 158 */ "bclr 12, \000"
  /* 168 */ "bcctr 12, \000"
  /* 179 */ "mtspr 3, \000"
  /* 189 */ "bc 4, \000"
  /* 196 */ "bcl 4, \000"
  /* 204 */ "bclrl 4, \000"
  /* 214 */ "bcctrl 4, \000"
  /* 225 */ "bclr 4, \000"
  /* 234 */ "bcctr 4, \000"
  /* 244 */ "mtspr 256, \000"
  /* 256 */ "bdzla- \000"
  /* 264 */ "bdnzla- \000"
  /* 273 */ "bdza- \000"
  /* 280 */ "bdnza- \000"
  /* 288 */ "bdzl- \000"
  /* 295 */ "bdnzl- \000"
  /* 303 */ "bdz- \000"
  /* 309 */ "bdnz- \000"
  /* 316 */ "dqua. \000"
  /* 323 */ "vcmpneb. \000"
  /* 333 */ "vcmpgtsb. \000"
  /* 344 */ "extsb. \000"
  /* 352 */ "vcmpequb. \000"
  /* 363 */ "bcdsub. \000"
  /* 372 */ "fsub. \000"
  /* 379 */ "fmsub. \000"
  /* 387 */ "fnmsub. \000"
  /* 396 */ "vcmpgtub. \000"
  /* 407 */ "vcmpnezb. \000"
  /* 418 */ "addc. \000"
  /* 425 */ "andc. \000"
  /* 432 */ "tabortdc. \000"
  /* 443 */ "subfc. \000"
  /* 451 */ "subic. \000"
  /* 459 */ "addic. \000"
  /* 467 */ "rldic. \000"
  /* 475 */ "bcdtrunc. \000"
  /* 486 */ "bcdutrunc. \000"
  /* 498 */ "orc. \000"
  /* 504 */ "tabortwc. \000"
  /* 515 */ "srad. \000"
  /* 522 */ "denbcd. \000"
  /* 531 */ "bcdadd. \000"
  /* 540 */ "fadd. \000"
  /* 547 */ "fmadd. \000"
  /* 555 */ "fnmadd. \000"
  /* 564 */ "mulhd. \000"
  /* 572 */ "fcfid. \000"
  /* 580 */ "fctid. \000"
  /* 588 */ "mulld. \000"
  /* 596 */ "sld. \000"
  /* 602 */ "nand. \000"
  /* 609 */ "tend. \000"
  /* 616 */ "drrnd. \000"
  /* 624 */ "ddedpd. \000"
  /* 633 */ "srd. \000"
  /* 639 */ "vcmpgtsd. \000"
  /* 650 */ "vcmpequd. \000"
  /* 661 */ "vcmpgtud. \000"
  /* 672 */ "divd. \000"
  /* 679 */ "cntlzd. \000"
  /* 688 */ "cnttzd. \000"
  /* 697 */ "adde. \000"
  /* 704 */ "divde. \000"
  /* 712 */ "slbfee. \000"
  /* 721 */ "subfe. \000"
  /* 729 */ "addme. \000"
  /* 737 */ "subfme. \000"
  /* 746 */ "fre. \000"
  /* 752 */ "frsqrte. \000"
  /* 762 */ "paste. \000"
  /* 770 */ "divwe. \000"
  /* 778 */ "addze. \000"
  /* 786 */ "subfze. \000"
  /* 795 */ "subf. \000"
  /* 802 */ "mtfsf. \000"
  /* 810 */ "fneg. \000"
  /* 817 */ "vcmpneh. \000"
  /* 827 */ "vcmpgtsh. \000"
  /* 838 */ "extsh. \000"
  /* 846 */ "vcmpequh. \000"
  /* 857 */ "vcmpgtuh. \000"
  /* 868 */ "vcmpnezh. \000"
  /* 879 */ "dquai. \000"
  /* 887 */ "tabortdci. \000"
  /* 899 */ "tabortwci. \000"
  /* 911 */ "sradi. \000"
  /* 919 */ "clrlsldi. \000"
  /* 930 */ "extldi. \000"
  /* 939 */ "andi. \000"
  /* 946 */ "clrrdi. \000"
  /* 955 */ "insrdi. \000"
  /* 964 */ "rotrdi. \000"
  /* 973 */ "extrdi. \000"
  /* 982 */ "mtfsfi. \000"
  /* 991 */ "dscli. \000"
  /* 999 */ "extswsli. \000"
  /* 1010 */ "rldimi. \000"
  /* 1019 */ "rlwimi. \000"
  /* 1028 */ "dscri. \000"
  /* 1036 */ "srawi. \000"
  /* 1044 */ "clrlslwi. \000"
  /* 1055 */ "inslwi. \000"
  /* 1064 */ "extlwi. \000"
  /* 1073 */ "clrrwi. \000"
  /* 1082 */ "insrwi. \000"
  /* 1091 */ "rotrwi. \000"
  /* 1100 */ "extrwi. \000"
  /* 1109 */ "vstribl. \000"
  /* 1119 */ "rldcl. \000"
  /* 1127 */ "rldicl. \000"
  /* 1136 */ "fsel. \000"
  /* 1143 */ "vstrihl. \000"
  /* 1153 */ "dmul. \000"
  /* 1160 */ "fmul. \000"
  /* 1167 */ "treclaim. \000"
  /* 1178 */ "frim. \000"
  /* 1185 */ "rlwinm. \000"
  /* 1194 */ "rlwnm. \000"
  /* 1202 */ "bcdcfn. \000"
  /* 1211 */ "bcdcpsgn. \000"
  /* 1222 */ "fcpsgn. \000"
  /* 1231 */ "bcdsetsgn. \000"
  /* 1243 */ "tbegin. \000"
  /* 1252 */ "frin. \000"
  /* 1259 */ "bcdctn. \000"
  /* 1268 */ "drintn. \000"
  /* 1277 */ "addco. \000"
  /* 1285 */ "subfco. \000"
  /* 1294 */ "addo. \000"
  /* 1301 */ "mulldo. \000"
  /* 1310 */ "divdo. \000"
  /* 1318 */ "addeo. \000"
  /* 1326 */ "divdeo. \000"
  /* 1335 */ "subfeo. \000"
  /* 1344 */ "addmeo. \000"
  /* 1353 */ "subfmeo. \000"
  /* 1363 */ "divweo. \000"
  /* 1372 */ "addzeo. \000"
  /* 1381 */ "subfzeo. \000"
  /* 1391 */ "subfo. \000"
  /* 1399 */ "nego. \000"
  /* 1406 */ "divduo. \000"
  /* 1415 */ "divdeuo. \000"
  /* 1425 */ "divweuo. \000"
  /* 1435 */ "divwuo. \000"
  /* 1444 */ "mullwo. \000"
  /* 1453 */ "divwo. \000"
  /* 1461 */ "xvcmpgedp. \000"
  /* 1473 */ "xvcmpeqdp. \000"
  /* 1485 */ "dctdp. \000"
  /* 1493 */ "xvcmpgtdp. \000"
  /* 1505 */ "vcmpbfp. \000"
  /* 1515 */ "vcmpgefp. \000"
  /* 1526 */ "vcmpeqfp. \000"
  /* 1537 */ "vcmpgtfp. \000"
  /* 1548 */ "frip. \000"
  /* 1555 */ "xvcmpgesp. \000"
  /* 1567 */ "xvcmpeqsp. \000"
  /* 1579 */ "drsp. \000"
  /* 1586 */ "frsp. \000"
  /* 1593 */ "xvcmpgtsp. \000"
  /* 1605 */ "dquaq. \000"
  /* 1613 */ "dsubq. \000"
  /* 1621 */ "denbcdq. \000"
  /* 1631 */ "daddq. \000"
  /* 1639 */ "drrndq. \000"
  /* 1648 */ "ddedpdq. \000"
  /* 1658 */ "dquaiq. \000"
  /* 1667 */ "dscliq. \000"
  /* 1676 */ "dscriq. \000"
  /* 1685 */ "icblq. \000"
  /* 1693 */ "dmulq. \000"
  /* 1701 */ "drintnq. \000"
  /* 1711 */ "drdpq. \000"
  /* 1719 */ "dctqpq. \000"
  /* 1728 */ "bcdcfsq. \000"
  /* 1738 */ "bcdctsq. \000"
  /* 1748 */ "vcmpgtsq. \000"
  /* 1759 */ "vcmpequq. \000"
  /* 1770 */ "vcmpgtuq. \000"
  /* 1781 */ "ddivq. \000"
  /* 1789 */ "diexq. \000"
  /* 1797 */ "dxexq. \000"
  /* 1805 */ "dcffixq. \000"
  /* 1815 */ "dctfixq. \000"
  /* 1825 */ "drintxq. \000"
  /* 1835 */ "vstribr. \000"
  /* 1845 */ "rldcr. \000"
  /* 1853 */ "rldicr. \000"
  /* 1862 */ "vstrihr. \000"
  /* 1872 */ "fmr. \000"
  /* 1878 */ "nor. \000"
  /* 1884 */ "xor. \000"
  /* 1890 */ "bcdsr. \000"
  /* 1898 */ "tsr. \000"
  /* 1904 */ "fabs. \000"
  /* 1911 */ "fnabs. \000"
  /* 1919 */ "fsubs. \000"
  /* 1927 */ "fmsubs. \000"
  /* 1936 */ "fnmsubs. \000"
  /* 1946 */ "bcds. \000"
  /* 1953 */ "fadds. \000"
  /* 1961 */ "fmadds. \000"
  /* 1970 */ "fnmadds. \000"
  /* 1980 */ "fcfids. \000"
  /* 1989 */ "fres. \000"
  /* 1996 */ "frsqrtes. \000"
  /* 2007 */ "mffs. \000"
  /* 2014 */ "andis. \000"
  /* 2022 */ "fmuls. \000"
  /* 2030 */ "fsqrts. \000"
  /* 2039 */ "bcdus. \000"
  /* 2047 */ "fcfidus. \000"
  /* 2057 */ "subfus. \000"
  /* 2066 */ "fdivs. \000"
  /* 2074 */ "tabort. \000"
  /* 2083 */ "fsqrt. \000"
  /* 2091 */ "mulhdu. \000"
  /* 2100 */ "fcfidu. \000"
  /* 2109 */ "fctidu. \000"
  /* 2118 */ "divdu. \000"
  /* 2126 */ "divdeu. \000"
  /* 2135 */ "divweu. \000"
  /* 2144 */ "mulhwu. \000"
  /* 2153 */ "fctiwu. \000"
  /* 2162 */ "divwu. \000"
  /* 2170 */ "ddiv. \000"
  /* 2177 */ "fdiv. \000"
  /* 2184 */ "eqv. \000"
  /* 2190 */ "sraw. \000"
  /* 2197 */ "vcmpnew. \000"
  /* 2207 */ "mulhw. \000"
  /* 2215 */ "fctiw. \000"
  /* 2223 */ "mullw. \000"
  /* 2231 */ "slw. \000"
  /* 2237 */ "srw. \000"
  /* 2243 */ "vcmpgtsw. \000"
  /* 2254 */ "extsw. \000"
  /* 2262 */ "vcmpequw. \000"
  /* 2273 */ "vcmpgtuw. \000"
  /* 2284 */ "divw. \000"
  /* 2291 */ "vcmpnezw. \000"
  /* 2302 */ "cntlzw. \000"
  /* 2311 */ "cnttzw. \000"
  /* 2320 */ "stbcx. \000"
  /* 2328 */ "stdcx. \000"
  /* 2336 */ "sthcx. \000"
  /* 2344 */ "stqcx. \000"
  /* 2352 */ "stwcx. \000"
  /* 2360 */ "diex. \000"
  /* 2367 */ "dxex. \000"
  /* 2374 */ "dcffix. \000"
  /* 2383 */ "dctfix. \000"
  /* 2392 */ "tlbsx. \000"
  /* 2400 */ "drintx. \000"
  /* 2409 */ "fctidz. \000"
  /* 2418 */ "bcdcfz. \000"
  /* 2427 */ "friz. \000"
  /* 2434 */ "bcdctz. \000"
  /* 2443 */ "fctiduz. \000"
  /* 2453 */ "fctiwuz. \000"
  /* 2463 */ "fctiwz. \000"
  /* 2472 */ "mtfsb0 \000"
  /* 2480 */ "mtfsb1 \000"
  /* 2488 */ "dmxxextfdmr512 \000"
  /* 2504 */ "dmxxinstdmr512 \000"
  /* 2520 */ "#ATOMIC_CMP_SWAP_I32 \000"
  /* 2542 */ "vupkint4tofp32 \000"
  /* 2558 */ "vupkint8tofp32 \000"
  /* 2574 */ "pmxvbf16ger2 \000"
  /* 2588 */ "pmxvf16ger2 \000"
  /* 2601 */ "pmxvi16ger2 \000"
  /* 2614 */ "pmdmxvbf16gerx2 \000"
  /* 2631 */ "pmdmxvf16gerx2 \000"
  /* 2647 */ "pmxvi8ger4 \000"
  /* 2659 */ "pmdmxvi8gerx4 \000"
  /* 2674 */ "#ATOMIC_CMP_SWAP_I16 \000"
  /* 2696 */ "vupkint4tobf16 \000"
  /* 2712 */ "vupkint8tobf16 \000"
  /* 2728 */ "xvcvspbf16 \000"
  /* 2740 */ "dmxxextfdmr256 \000"
  /* 2756 */ "dmxxinstdmr256 \000"
  /* 2772 */ "xxgfmul128 \000"
  /* 2784 */ "#TC_RETURNa8 \000"
  /* 2798 */ "#TC_RETURNd8 \000"
  /* 2812 */ "#TC_RETURNr8 \000"
  /* 2826 */ "pmxvi4ger8 \000"
  /* 2838 */ "#BUILD_UACC \000"
  /* 2851 */ "#ADJCALLSTACKDOWN \000"
  /* 2870 */ "#ADJCALLSTACKUP \000"
  /* 2887 */ "#TC_RETURNa \000"
  /* 2900 */ "evmhegsmfaa \000"
  /* 2913 */ "evmhogsmfaa \000"
  /* 2926 */ "evmwsmfaa \000"
  /* 2937 */ "evmwssfaa \000"
  /* 2948 */ "evmhegsmiaa \000"
  /* 2961 */ "evmhogsmiaa \000"
  /* 2974 */ "evmwsmiaa \000"
  /* 2985 */ "evmhegumiaa \000"
  /* 2998 */ "evmhogumiaa \000"
  /* 3011 */ "evmwumiaa \000"
  /* 3022 */ "dcba \000"
  /* 3028 */ "bca \000"
  /* 3033 */ "evmhesmfa \000"
  /* 3044 */ "evmwhsmfa \000"
  /* 3055 */ "evmhosmfa \000"
  /* 3066 */ "evmwsmfa \000"
  /* 3076 */ "evmhessfa \000"
  /* 3087 */ "evmwhssfa \000"
  /* 3098 */ "evmhossfa \000"
  /* 3109 */ "evmwssfa \000"
  /* 3119 */ "plha \000"
  /* 3125 */ "evmhesmia \000"
  /* 3136 */ "evmwhsmia \000"
  /* 3147 */ "evmhosmia \000"
  /* 3158 */ "evmwsmia \000"
  /* 3168 */ "evmheumia \000"
  /* 3179 */ "evmwhumia \000"
  /* 3190 */ "evmwlumia \000"
  /* 3201 */ "evmhoumia \000"
  /* 3212 */ "evmwumia \000"
  /* 3222 */ "bla \000"
  /* 3227 */ "bcla \000"
  /* 3233 */ "pla \000"
  /* 3238 */ "bdzla \000"
  /* 3245 */ "bdnzla \000"
  /* 3253 */ "evmra \000"
  /* 3260 */ "dqua \000"
  /* 3266 */ "plwa \000"
  /* 3272 */ "mtvsrwa \000"
  /* 3281 */ "bdza \000"
  /* 3287 */ "bdnza \000"
  /* 3294 */ "vsrab \000"
  /* 3301 */ "rfebb \000"
  /* 3308 */ "vcntmbb \000"
  /* 3317 */ "xvtlsbb \000"
  /* 3326 */ "vclzlsbb \000"
  /* 3336 */ "vctzlsbb \000"
  /* 3346 */ "vcmpneb \000"
  /* 3355 */ "vmrghb \000"
  /* 3363 */ "vucmprhb \000"
  /* 3373 */ "xxspltib \000"
  /* 3383 */ "vmrglb \000"
  /* 3391 */ "vclrlb \000"
  /* 3399 */ "vucmprlb \000"
  /* 3409 */ "vrlb \000"
  /* 3415 */ "vslb \000"
  /* 3421 */ "vpmsumb \000"
  /* 3430 */ "vgnb \000"
  /* 3436 */ "vupkhsntob \000"
  /* 3448 */ "vupklsntob \000"
  /* 3460 */ "cmpb \000"
  /* 3466 */ "cmpeqb \000"
  /* 3474 */ "cmprb \000"
  /* 3481 */ "vclrrb \000"
  /* 3489 */ "vsrb \000"
  /* 3495 */ "vmulesb \000"
  /* 3504 */ "vavgsb \000"
  /* 3512 */ "vupkhsb \000"
  /* 3521 */ "vspltisb \000"
  /* 3531 */ "vupklsb \000"
  /* 3540 */ "vminsb \000"
  /* 3548 */ "vmulosb \000"
  /* 3557 */ "vcmpgtsb \000"
  /* 3567 */ "evextsb \000"
  /* 3576 */ "vmaxsb \000"
  /* 3584 */ "setb \000"
  /* 3590 */ "mftb \000"
  /* 3596 */ "vspltb \000"
  /* 3604 */ "vpopcntb \000"
  /* 3614 */ "vinsertb \000"
  /* 3624 */ "pstb \000"
  /* 3630 */ "vabsdub \000"
  /* 3639 */ "vmuleub \000"
  /* 3648 */ "vavgub \000"
  /* 3656 */ "vminub \000"
  /* 3664 */ "vmuloub \000"
  /* 3673 */ "vcmpequb \000"
  /* 3683 */ "efdsub \000"
  /* 3691 */ "fsub \000"
  /* 3697 */ "fmsub \000"
  /* 3704 */ "fnmsub \000"
  /* 3712 */ "efssub \000"
  /* 3720 */ "evfssub \000"
  /* 3729 */ "vextractub \000"
  /* 3741 */ "vcmpgtub \000"
  /* 3751 */ "vmaxub \000"
  /* 3759 */ "xxblendvb \000"
  /* 3770 */ "vcmpnezb \000"
  /* 3780 */ "vclzb \000"
  /* 3787 */ "vctzb \000"
  /* 3794 */ "setnbc \000"
  /* 3802 */ "setbc \000"
  /* 3809 */ "xxmfacc \000"
  /* 3818 */ "xxmtacc \000"
  /* 3827 */ "addc \000"
  /* 3833 */ "xxlandc \000"
  /* 3842 */ "crandc \000"
  /* 3850 */ "evandc \000"
  /* 3858 */ "dtstdc \000"
  /* 3866 */ "subfc \000"
  /* 3873 */ "subic \000"
  /* 3880 */ "addic \000"
  /* 3887 */ "rldic \000"
  /* 3894 */ "subfic \000"
  /* 3902 */ "xsrdpic \000"
  /* 3911 */ "xvrdpic \000"
  /* 3920 */ "xvrspic \000"
  /* 3929 */ "icblc \000"
  /* 3936 */ "xxssumudmc \000"
  /* 3948 */ "brinc \000"
  /* 3955 */ "sync \000"
  /* 3961 */ "xxlorc \000"
  /* 3969 */ "crorc \000"
  /* 3976 */ "evorc \000"
  /* 3983 */ "sc \000"
  /* 3987 */ "vextsb2d \000"
  /* 3997 */ "vextsh2d \000"
  /* 4007 */ "vextsw2d \000"
  /* 4017 */ "#TC_RETURNd \000"
  /* 4030 */ "vshasigmad \000"
  /* 4042 */ "dmxxshapad \000"
  /* 4054 */ "vsrad \000"
  /* 4061 */ "vgbbd \000"
  /* 4068 */ "vcntmbd \000"
  /* 4077 */ "vprtybd \000"
  /* 4086 */ "denbcd \000"
  /* 4094 */ "cdtbcd \000"
  /* 4102 */ "efdadd \000"
  /* 4110 */ "fadd \000"
  /* 4116 */ "xxmulmulhiadd \000"
  /* 4131 */ "fmadd \000"
  /* 4138 */ "fnmadd \000"
  /* 4146 */ "xxmulmulloadd \000"
  /* 4161 */ "efsadd \000"
  /* 4169 */ "evfsadd \000"
  /* 4178 */ "evldd \000"
  /* 4185 */ "mtvsrdd \000"
  /* 4194 */ "evstdd \000"
  /* 4202 */ "vcfuged \000"
  /* 4211 */ "efscfd \000"
  /* 4219 */ "plfd \000"
  /* 4225 */ "pstfd \000"
  /* 4232 */ "vnegd \000"
  /* 4239 */ "maddhd \000"
  /* 4247 */ "mulhd \000"
  /* 4254 */ "fcfid \000"
  /* 4261 */ "efdcfsid \000"
  /* 4271 */ "fctid \000"
  /* 4278 */ "efdcfuid \000"
  /* 4288 */ "tlbld \000"
  /* 4295 */ "maddld \000"
  /* 4303 */ "vmulld \000"
  /* 4311 */ "cmpld \000"
  /* 4318 */ "mfvsrld \000"
  /* 4327 */ "vrld \000"
  /* 4333 */ "vsld \000"
  /* 4339 */ "vbpermd \000"
  /* 4348 */ "vpmsumd \000"
  /* 4357 */ "xxland \000"
  /* 4365 */ "xxlnand \000"
  /* 4374 */ "crnand \000"
  /* 4382 */ "evnand \000"
  /* 4390 */ "crand \000"
  /* 4397 */ "evand \000"
  /* 4404 */ "drrnd \000"
  /* 4411 */ "ddedpd \000"
  /* 4419 */ "vpdepd \000"
  /* 4427 */ "cmpd \000"
  /* 4433 */ "xxbrd \000"
  /* 4440 */ "mtmsrd \000"
  /* 4448 */ "mfvsrd \000"
  /* 4456 */ "mtvsrd \000"
  /* 4464 */ "vmodsd \000"
  /* 4472 */ "vmulesd \000"
  /* 4481 */ "vdivesd \000"
  /* 4490 */ "vmulhsd \000"
  /* 4499 */ "vminsd \000"
  /* 4507 */ "vinsd \000"
  /* 4514 */ "vmulosd \000"
  /* 4523 */ "vcmpgtsd \000"
  /* 4533 */ "vdivsd \000"
  /* 4541 */ "vmaxsd \000"
  /* 4549 */ "plxsd \000"
  /* 4556 */ "pstxsd \000"
  /* 4564 */ "vextractd \000"
  /* 4575 */ "cbcdtd \000"
  /* 4583 */ "vpopcntd \000"
  /* 4593 */ "vinsertd \000"
  /* 4603 */ "pstd \000"
  /* 4609 */ "vpextd \000"
  /* 4617 */ "vmsumcud \000"
  /* 4627 */ "vmodud \000"
  /* 4635 */ "vmuleud \000"
  /* 4644 */ "vdiveud \000"
  /* 4653 */ "vmulhud \000"
  /* 4662 */ "vminud \000"
  /* 4670 */ "vmuloud \000"
  /* 4679 */ "vcmpequd \000"
  /* 4689 */ "vcmpgtud \000"
  /* 4699 */ "vdivud \000"
  /* 4707 */ "vmaxud \000"
  /* 4715 */ "xxblendvd \000"
  /* 4726 */ "divd \000"
  /* 4732 */ "vclzd \000"
  /* 4739 */ "cntlzd \000"
  /* 4747 */ "vctzd \000"
  /* 4754 */ "cnttzd \000"
  /* 4762 */ "mfbhrbe \000"
  /* 4771 */ "mffsce \000"
  /* 4779 */ "adde \000"
  /* 4785 */ "divde \000"
  /* 4792 */ "slbmfee \000"
  /* 4801 */ "wrtee \000"
  /* 4808 */ "subfe \000"
  /* 4815 */ "evlwhe \000"
  /* 4823 */ "evstwhe \000"
  /* 4832 */ "slbie \000"
  /* 4839 */ "tlbie \000"
  /* 4846 */ "addme \000"
  /* 4853 */ "subfme \000"
  /* 4861 */ "tlbre \000"
  /* 4868 */ "fre \000"
  /* 4873 */ "slbmte \000"
  /* 4881 */ "frsqrte \000"
  /* 4890 */ "tlbwe \000"
  /* 4897 */ "divwe \000"
  /* 4904 */ "evstwwe \000"
  /* 4913 */ "addze \000"
  /* 4920 */ "subfze \000"
  /* 4928 */ "dcbf \000"
  /* 4934 */ "subf \000"
  /* 4940 */ "evmhesmf \000"
  /* 4950 */ "evmwhsmf \000"
  /* 4960 */ "evmhosmf \000"
  /* 4970 */ "evmwsmf \000"
  /* 4979 */ "mcrf \000"
  /* 4985 */ "mfocrf \000"
  /* 4993 */ "mtocrf \000"
  /* 5001 */ "mtcrf \000"
  /* 5008 */ "efdcfsf \000"
  /* 5017 */ "efscfsf \000"
  /* 5026 */ "evfscfsf \000"
  /* 5036 */ "mtfsf \000"
  /* 5043 */ "evmhessf \000"
  /* 5053 */ "evmwhssf \000"
  /* 5063 */ "evmhossf \000"
  /* 5073 */ "evmwssf \000"
  /* 5082 */ "efdctsf \000"
  /* 5091 */ "efsctsf \000"
  /* 5100 */ "evfsctsf \000"
  /* 5110 */ "dtstsf \000"
  /* 5118 */ "efdcfuf \000"
  /* 5127 */ "efscfuf \000"
  /* 5136 */ "evfscfuf \000"
  /* 5146 */ "efdctuf \000"
  /* 5155 */ "efsctuf \000"
  /* 5164 */ "dtstdg \000"
  /* 5172 */ "slbieg \000"
  /* 5180 */ "efdneg \000"
  /* 5188 */ "fneg \000"
  /* 5194 */ "efsneg \000"
  /* 5202 */ "evfsneg \000"
  /* 5211 */ "evneg \000"
  /* 5218 */ "vsrah \000"
  /* 5225 */ "vcntmbh \000"
  /* 5234 */ "evldh \000"
  /* 5241 */ "evstdh \000"
  /* 5249 */ "vcmpneh \000"
  /* 5258 */ "vmrghh \000"
  /* 5266 */ "vucmprhh \000"
  /* 5276 */ "vmrglh \000"
  /* 5284 */ "vucmprlh \000"
  /* 5294 */ "vrlh \000"
  /* 5300 */ "vslh \000"
  /* 5306 */ "vpmsumh \000"
  /* 5315 */ "xxbrh \000"
  /* 5322 */ "vsrh \000"
  /* 5328 */ "dmsha2hash \000"
  /* 5340 */ "dmsha3hash \000"
  /* 5352 */ "vmulesh \000"
  /* 5361 */ "vavgsh \000"
  /* 5369 */ "vupkhsh \000"
  /* 5378 */ "xvmulhsh \000"
  /* 5388 */ "vspltish \000"
  /* 5398 */ "vupklsh \000"
  /* 5407 */ "vminsh \000"
  /* 5415 */ "vmulosh \000"
  /* 5424 */ "vcmpgtsh \000"
  /* 5434 */ "evextsh \000"
  /* 5443 */ "vmaxsh \000"
  /* 5451 */ "vsplth \000"
  /* 5459 */ "vpopcnth \000"
  /* 5469 */ "vinserth \000"
  /* 5479 */ "psth \000"
  /* 5485 */ "vabsduh \000"
  /* 5494 */ "vmuleuh \000"
  /* 5503 */ "vavguh \000"
  /* 5511 */ "xvmulhuh \000"
  /* 5521 */ "vminuh \000"
  /* 5529 */ "vmulouh \000"
  /* 5538 */ "vcmpequh \000"
  /* 5548 */ "vextractuh \000"
  /* 5560 */ "vcmpgtuh \000"
  /* 5570 */ "vmaxuh \000"
  /* 5578 */ "xxblendvh \000"
  /* 5589 */ "vcmpnezh \000"
  /* 5599 */ "vclzh \000"
  /* 5606 */ "vctzh \000"
  /* 5613 */ "dquai \000"
  /* 5620 */ "dcbi \000"
  /* 5626 */ "icbi \000"
  /* 5632 */ "vsldbi \000"
  /* 5640 */ "vsrdbi \000"
  /* 5648 */ "psubi \000"
  /* 5655 */ "dccci \000"
  /* 5662 */ "iccci \000"
  /* 5669 */ "sradi \000"
  /* 5676 */ "paddi \000"
  /* 5683 */ "cmpldi \000"
  /* 5691 */ "clrlsldi \000"
  /* 5701 */ "extldi \000"
  /* 5709 */ "xxpermdi \000"
  /* 5719 */ "cmpdi \000"
  /* 5726 */ "clrrdi \000"
  /* 5734 */ "insrdi \000"
  /* 5742 */ "rotrdi \000"
  /* 5750 */ "extrdi \000"
  /* 5758 */ "tdi \000"
  /* 5763 */ "wrteei \000"
  /* 5771 */ "mtfsfi \000"
  /* 5779 */ "dtstsfi \000"
  /* 5788 */ "evsplatfi \000"
  /* 5799 */ "evmergehi \000"
  /* 5810 */ "evmergelohi \000"
  /* 5823 */ "tlbli \000"
  /* 5830 */ "dscli \000"
  /* 5837 */ "mulli \000"
  /* 5844 */ "pli \000"
  /* 5849 */ "extswsli \000"
  /* 5859 */ "mtvsrbmi \000"
  /* 5869 */ "vrldmi \000"
  /* 5877 */ "rldimi \000"
  /* 5885 */ "rlwimi \000"
  /* 5893 */ "vrlqmi \000"
  /* 5901 */ "evmhesmi \000"
  /* 5911 */ "evmwhsmi \000"
  /* 5921 */ "evmhosmi \000"
  /* 5931 */ "evmwsmi \000"
  /* 5940 */ "evmheumi \000"
  /* 5950 */ "evmwhumi \000"
  /* 5960 */ "evmwlumi \000"
  /* 5970 */ "evmhoumi \000"
  /* 5980 */ "evmwumi \000"
  /* 5989 */ "vrlwmi \000"
  /* 5997 */ "mffscrni \000"
  /* 6007 */ "mffscdrni \000"
  /* 6018 */ "vsldoi \000"
  /* 6026 */ "xsrdpi \000"
  /* 6034 */ "xvrdpi \000"
  /* 6042 */ "xsrqpi \000"
  /* 6050 */ "xvrspi \000"
  /* 6058 */ "dscri \000"
  /* 6065 */ "xori \000"
  /* 6071 */ "efdcfsi \000"
  /* 6080 */ "efscfsi \000"
  /* 6089 */ "evfscfsi \000"
  /* 6099 */ "efdctsi \000"
  /* 6108 */ "efsctsi \000"
  /* 6117 */ "evfsctsi \000"
  /* 6127 */ "evsplati \000"
  /* 6137 */ "efdcfui \000"
  /* 6146 */ "efscfui \000"
  /* 6155 */ "evfscfui \000"
  /* 6165 */ "efdctui \000"
  /* 6174 */ "efsctui \000"
  /* 6183 */ "evfsctui \000"
  /* 6193 */ "srawi \000"
  /* 6200 */ "xxsldwi \000"
  /* 6209 */ "cmplwi \000"
  /* 6217 */ "evrlwi \000"
  /* 6225 */ "clrlslwi \000"
  /* 6235 */ "inslwi \000"
  /* 6243 */ "evslwi \000"
  /* 6251 */ "extlwi \000"
  /* 6259 */ "cmpwi \000"
  /* 6266 */ "clrrwi \000"
  /* 6274 */ "insrwi \000"
  /* 6282 */ "rotrwi \000"
  /* 6290 */ "extrwi \000"
  /* 6298 */ "lswi \000"
  /* 6304 */ "stswi \000"
  /* 6311 */ "twi \000"
  /* 6316 */ "tcheck \000"
  /* 6324 */ "hashchk \000"
  /* 6333 */ "xxeval \000"
  /* 6341 */ "vstribl \000"
  /* 6350 */ "bcl \000"
  /* 6355 */ "rldcl \000"
  /* 6362 */ "rldicl \000"
  /* 6370 */ "tlbiel \000"
  /* 6378 */ "fsel \000"
  /* 6384 */ "isel \000"
  /* 6390 */ "vsel \000"
  /* 6396 */ "xxsel \000"
  /* 6403 */ "dcbfl \000"
  /* 6410 */ "vstrihl \000"
  /* 6419 */ "lxvprll \000"
  /* 6428 */ "stxvprll \000"
  /* 6438 */ "lxvrll \000"
  /* 6446 */ "stxvrll \000"
  /* 6455 */ "lxvll \000"
  /* 6462 */ "stxvll \000"
  /* 6470 */ "mtlpl \000"
  /* 6477 */ "bclrl \000"
  /* 6484 */ "lxvprl \000"
  /* 6492 */ "stxvprl \000"
  /* 6501 */ "bcctrl \000"
  /* 6509 */ "lxvrl \000"
  /* 6516 */ "stxvrl \000"
  /* 6524 */ "mffsl \000"
  /* 6531 */ "lvsl \000"
  /* 6537 */ "efdmul \000"
  /* 6545 */ "fmul \000"
  /* 6551 */ "xxmulmul \000"
  /* 6561 */ "efsmul \000"
  /* 6569 */ "evfsmul \000"
  /* 6578 */ "lxvl \000"
  /* 6584 */ "stxvl \000"
  /* 6591 */ "lvxl \000"
  /* 6597 */ "stvxl \000"
  /* 6604 */ "dcbzl \000"
  /* 6611 */ "bdzl \000"
  /* 6617 */ "bdnzl \000"
  /* 6624 */ "vexpandbm \000"
  /* 6635 */ "vmsummbm \000"
  /* 6645 */ "mtvsrbm \000"
  /* 6654 */ "vextractbm \000"
  /* 6666 */ "vsububm \000"
  /* 6675 */ "vaddubm \000"
  /* 6684 */ "vmsumubm \000"
  /* 6694 */ "xxgenpcvbm \000"
  /* 6706 */ "vexpanddm \000"
  /* 6717 */ "mtvsrdm \000"
  /* 6726 */ "vextractdm \000"
  /* 6738 */ "vsubudm \000"
  /* 6747 */ "vaddudm \000"
  /* 6756 */ "vmsumudm \000"
  /* 6766 */ "xxssumudm \000"
  /* 6777 */ "xxgenpcvdm \000"
  /* 6789 */ "vclzdm \000"
  /* 6797 */ "cntlzdm \000"
  /* 6806 */ "vctzdm \000"
  /* 6814 */ "cnttzdm \000"
  /* 6823 */ "vexpandhm \000"
  /* 6834 */ "mtvsrhm \000"
  /* 6843 */ "vmsumshm \000"
  /* 6853 */ "vextracthm \000"
  /* 6865 */ "xvsubuhm \000"
  /* 6875 */ "vmladduhm \000"
  /* 6886 */ "xvadduhm \000"
  /* 6896 */ "xvmuluhm \000"
  /* 6906 */ "vmsumuhm \000"
  /* 6916 */ "xxgenpcvhm \000"
  /* 6928 */ "vrfim \000"
  /* 6935 */ "xsrdpim \000"
  /* 6944 */ "xvrdpim \000"
  /* 6953 */ "xvrspim \000"
  /* 6962 */ "frim \000"
  /* 6968 */ "vrldnm \000"
  /* 6976 */ "rlwinm \000"
  /* 6984 */ "vrlqnm \000"
  /* 6992 */ "vrlwnm \000"
  /* 7000 */ "vexpandqm \000"
  /* 7011 */ "mtvsrqm \000"
  /* 7020 */ "vextractqm \000"
  /* 7032 */ "xsmerge2t1uqm \000"
  /* 7047 */ "xsrebase2t1uqm \000"
  /* 7063 */ "xsmerge3t1uqm \000"
  /* 7078 */ "xsrebase3t1uqm \000"
  /* 7094 */ "xsmerge2t2uqm \000"
  /* 7109 */ "xsrebase2t2uqm \000"
  /* 7125 */ "xsrebase3t2uqm \000"
  /* 7141 */ "xsmerge2t3uqm \000"
  /* 7156 */ "xsrebase2t3uqm \000"
  /* 7172 */ "xsrebase3t3uqm \000"
  /* 7188 */ "xsrebase2t4uqm \000"
  /* 7204 */ "xsaddsubuqm \000"
  /* 7217 */ "vsubuqm \000"
  /* 7226 */ "xsaddadduqm \000"
  /* 7239 */ "vadduqm \000"
  /* 7248 */ "vsubeuqm \000"
  /* 7258 */ "vaddeuqm \000"
  /* 7268 */ "xsaddsubsuqm \000"
  /* 7282 */ "xsaddaddsuqm \000"
  /* 7296 */ "vperm \000"
  /* 7303 */ "xxperm \000"
  /* 7311 */ "vpkudum \000"
  /* 7320 */ "vpkuhum \000"
  /* 7329 */ "vpkuwum \000"
  /* 7338 */ "vexpandwm \000"
  /* 7349 */ "mtvsrwm \000"
  /* 7358 */ "vextractwm \000"
  /* 7370 */ "xvsubuwm \000"
  /* 7380 */ "xvadduwm \000"
  /* 7390 */ "xvmuluwm \000"
  /* 7400 */ "xxgenpcvwm \000"
  /* 7412 */ "evmhegsmfan \000"
  /* 7425 */ "evmhogsmfan \000"
  /* 7438 */ "evmwsmfan \000"
  /* 7449 */ "evmwssfan \000"
  /* 7460 */ "evmhegsmian \000"
  /* 7473 */ "evmhogsmian \000"
  /* 7486 */ "evmwsmian \000"
  /* 7497 */ "evmhegumian \000"
  /* 7510 */ "evmhogumian \000"
  /* 7523 */ "evmwumian \000"
  /* 7534 */ "fcpsgn \000"
  /* 7542 */ "vucmprhn \000"
  /* 7552 */ "vrfin \000"
  /* 7559 */ "frin \000"
  /* 7565 */ "mfsrin \000"
  /* 7573 */ "mtsrin \000"
  /* 7581 */ "vucmprln \000"
  /* 7591 */ "pmxvbf16ger2nn \000"
  /* 7607 */ "pmxvf16ger2nn \000"
  /* 7622 */ "pmdmxvbf16gerx2nn \000"
  /* 7641 */ "pmdmxvf16gerx2nn \000"
  /* 7659 */ "pmxvf32gernn \000"
  /* 7673 */ "pmxvf64gernn \000"
  /* 7687 */ "pmxvbf16ger2pn \000"
  /* 7703 */ "pmxvf16ger2pn \000"
  /* 7718 */ "pmdmxvbf16gerx2pn \000"
  /* 7737 */ "pmdmxvf16gerx2pn \000"
  /* 7755 */ "xscvspdpn \000"
  /* 7766 */ "pmxvf32gerpn \000"
  /* 7780 */ "pmxvf64gerpn \000"
  /* 7794 */ "xvcvbf16spn \000"
  /* 7807 */ "xscvdpspn \000"
  /* 7818 */ "darn \000"
  /* 7824 */ "mffscrn \000"
  /* 7833 */ "mffscdrn \000"
  /* 7843 */ "drintn \000"
  /* 7851 */ "addco \000"
  /* 7858 */ "subfco \000"
  /* 7866 */ "addo \000"
  /* 7872 */ "mulldo \000"
  /* 7880 */ "divdo \000"
  /* 7887 */ "addeo \000"
  /* 7894 */ "divdeo \000"
  /* 7902 */ "subfeo \000"
  /* 7910 */ "addmeo \000"
  /* 7918 */ "subfmeo \000"
  /* 7927 */ "divweo \000"
  /* 7935 */ "addzeo \000"
  /* 7943 */ "subfzeo \000"
  /* 7952 */ "subfo \000"
  /* 7959 */ "nego \000"
  /* 7965 */ "evstwho \000"
  /* 7974 */ "tlbsyncio \000"
  /* 7985 */ "ptesyncio \000"
  /* 7996 */ "tlbieio \000"
  /* 8005 */ "evmergelo \000"
  /* 8016 */ "evmergehilo \000"
  /* 8029 */ "vslo \000"
  /* 8035 */ "xscvqpdpo \000"
  /* 8046 */ "dcmpo \000"
  /* 8053 */ "fcmpo \000"
  /* 8060 */ "xsnmsubqpo \000"
  /* 8072 */ "xsmsubqpo \000"
  /* 8083 */ "xssubqpo \000"
  /* 8093 */ "xsnmaddqpo \000"
  /* 8105 */ "xsmaddqpo \000"
  /* 8116 */ "xsaddqpo \000"
  /* 8126 */ "xsmulqpo \000"
  /* 8136 */ "xssqrtqpo \000"
  /* 8147 */ "xsdivqpo \000"
  /* 8157 */ "vsro \000"
  /* 8163 */ "divduo \000"
  /* 8171 */ "divdeuo \000"
  /* 8180 */ "divweuo \000"
  /* 8189 */ "divwuo \000"
  /* 8197 */ "mullwo \000"
  /* 8205 */ "divwo \000"
  /* 8212 */ "evstwwo \000"
  /* 8221 */ "xxaesdecp \000"
  /* 8232 */ "xxaesencp \000"
  /* 8243 */ "xsnmsubadp \000"
  /* 8255 */ "xvnmsubadp \000"
  /* 8267 */ "xsmsubadp \000"
  /* 8278 */ "xvmsubadp \000"
  /* 8289 */ "xsnmaddadp \000"
  /* 8301 */ "xvnmaddadp \000"
  /* 8313 */ "xsmaddadp \000"
  /* 8324 */ "xvmaddadp \000"
  /* 8335 */ "xssubdp \000"
  /* 8344 */ "xvsubdp \000"
  /* 8353 */ "xststdcdp \000"
  /* 8364 */ "xvtstdcdp \000"
  /* 8375 */ "xsmincdp \000"
  /* 8385 */ "xsmaxcdp \000"
  /* 8395 */ "xsadddp \000"
  /* 8404 */ "xvadddp \000"
  /* 8413 */ "xscvsxddp \000"
  /* 8424 */ "xvcvsxddp \000"
  /* 8435 */ "xscvuxddp \000"
  /* 8446 */ "xvcvuxddp \000"
  /* 8457 */ "xscmpgedp \000"
  /* 8468 */ "xvcmpgedp \000"
  /* 8479 */ "xsredp \000"
  /* 8487 */ "xvredp \000"
  /* 8495 */ "xsrsqrtedp \000"
  /* 8507 */ "xvrsqrtedp \000"
  /* 8519 */ "xsnegdp \000"
  /* 8528 */ "xvnegdp \000"
  /* 8537 */ "xsxsigdp \000"
  /* 8547 */ "xvxsigdp \000"
  /* 8557 */ "xxspltidp \000"
  /* 8568 */ "xsminjdp \000"
  /* 8578 */ "xsmaxjdp \000"
  /* 8588 */ "xsmuldp \000"
  /* 8597 */ "xvmuldp \000"
  /* 8606 */ "xsnmsubmdp \000"
  /* 8618 */ "xvnmsubmdp \000"
  /* 8630 */ "xsmsubmdp \000"
  /* 8641 */ "xvmsubmdp \000"
  /* 8652 */ "xsnmaddmdp \000"
  /* 8664 */ "xvnmaddmdp \000"
  /* 8676 */ "xsmaddmdp \000"
  /* 8687 */ "xvmaddmdp \000"
  /* 8698 */ "xscpsgndp \000"
  /* 8709 */ "xvcpsgndp \000"
  /* 8720 */ "xsmindp \000"
  /* 8729 */ "xvmindp \000"
  /* 8738 */ "xscmpodp \000"
  /* 8748 */ "xscvhpdp \000"
  /* 8758 */ "xscvqpdp \000"
  /* 8768 */ "xscvspdp \000"
  /* 8778 */ "xvcvspdp \000"
  /* 8788 */ "xsiexpdp \000"
  /* 8798 */ "xviexpdp \000"
  /* 8808 */ "xscmpexpdp \000"
  /* 8820 */ "xsxexpdp \000"
  /* 8830 */ "xvxexpdp \000"
  /* 8840 */ "xscmpeqdp \000"
  /* 8851 */ "xvcmpeqdp \000"
  /* 8862 */ "xsnabsdp \000"
  /* 8872 */ "xvnabsdp \000"
  /* 8882 */ "xsabsdp \000"
  /* 8891 */ "xvabsdp \000"
  /* 8900 */ "dctdp \000"
  /* 8907 */ "xscmpgtdp \000"
  /* 8918 */ "xvcmpgtdp \000"
  /* 8929 */ "xssqrtdp \000"
  /* 8939 */ "xstsqrtdp \000"
  /* 8950 */ "xvtsqrtdp \000"
  /* 8961 */ "xvsqrtdp \000"
  /* 8971 */ "xscmpudp \000"
  /* 8981 */ "xsdivdp \000"
  /* 8990 */ "xstdivdp \000"
  /* 9000 */ "xvtdivdp \000"
  /* 9010 */ "xvdivdp \000"
  /* 9019 */ "xvcvsxwdp \000"
  /* 9030 */ "xvcvuxwdp \000"
  /* 9041 */ "xsmaxdp \000"
  /* 9050 */ "xvmaxdp \000"
  /* 9059 */ "dcbfep \000"
  /* 9067 */ "icbiep \000"
  /* 9075 */ "tlbiep \000"
  /* 9083 */ "dcbzlep \000"
  /* 9092 */ "dcbtep \000"
  /* 9100 */ "dcbstep \000"
  /* 9109 */ "dcbtstep \000"
  /* 9119 */ "dcbzep \000"
  /* 9127 */ "vcmpbfp \000"
  /* 9136 */ "vnmsubfp \000"
  /* 9146 */ "vsubfp \000"
  /* 9154 */ "vmaddfp \000"
  /* 9163 */ "vaddfp \000"
  /* 9171 */ "vlogefp \000"
  /* 9180 */ "vcmpgefp \000"
  /* 9190 */ "vrefp \000"
  /* 9197 */ "vexptefp \000"
  /* 9207 */ "vrsqrtefp \000"
  /* 9218 */ "vminfp \000"
  /* 9226 */ "vcmpeqfp \000"
  /* 9236 */ "vcmpgtfp \000"
  /* 9246 */ "vmaxfp \000"
  /* 9254 */ "xscvdphp \000"
  /* 9264 */ "xvcvsphp \000"
  /* 9274 */ "vrfip \000"
  /* 9281 */ "xsrdpip \000"
  /* 9290 */ "xvrdpip \000"
  /* 9299 */ "xvrspip \000"
  /* 9308 */ "frip \000"
  /* 9314 */ "hashchkp \000"
  /* 9324 */ "xxaesgenlkp \000"
  /* 9337 */ "dcbflp \000"
  /* 9345 */ "pmxvbf16ger2np \000"
  /* 9361 */ "pmxvf16ger2np \000"
  /* 9376 */ "pmdmxvbf16gerx2np \000"
  /* 9395 */ "pmdmxvf16gerx2np \000"
  /* 9413 */ "pmxvf32gernp \000"
  /* 9427 */ "pmxvf64gernp \000"
  /* 9441 */ "pmxvbf16ger2pp \000"
  /* 9457 */ "pmxvf16ger2pp \000"
  /* 9472 */ "pmxvi16ger2pp \000"
  /* 9487 */ "pmdmxvbf16gerx2pp \000"
  /* 9506 */ "pmdmxvf16gerx2pp \000"
  /* 9524 */ "pmxvi8ger4pp \000"
  /* 9538 */ "pmdmxvi8gerx4pp \000"
  /* 9555 */ "pmxvi4ger8pp \000"
  /* 9569 */ "pmxvf32gerpp \000"
  /* 9583 */ "pmxvf64gerpp \000"
  /* 9597 */ "pmxvi16ger2spp \000"
  /* 9613 */ "pmxvi8ger4spp \000"
  /* 9628 */ "pmdmxvi8gerx4spp \000"
  /* 9646 */ "xsnmsubqp \000"
  /* 9657 */ "xsmsubqp \000"
  /* 9667 */ "xssubqp \000"
  /* 9676 */ "xststdcqp \000"
  /* 9687 */ "xsmincqp \000"
  /* 9697 */ "xsmaxcqp \000"
  /* 9707 */ "xsnmaddqp \000"
  /* 9718 */ "xsmaddqp \000"
  /* 9728 */ "xsaddqp \000"
  /* 9737 */ "xscvsdqp \000"
  /* 9747 */ "xscvudqp \000"
  /* 9757 */ "xscmpgeqp \000"
  /* 9768 */ "xsnegqp \000"
  /* 9777 */ "xsxsigqp \000"
  /* 9787 */ "xsmulqp \000"
  /* 9796 */ "xscpsgnqp \000"
  /* 9807 */ "xscmpoqp \000"
  /* 9817 */ "xscvdpqp \000"
  /* 9827 */ "xsiexpqp \000"
  /* 9837 */ "xscmpexpqp \000"
  /* 9849 */ "xsxexpqp \000"
  /* 9859 */ "xscmpeqqp \000"
  /* 9870 */ "xscvsqqp \000"
  /* 9880 */ "xscvuqqp \000"
  /* 9890 */ "xsnabsqp \000"
  /* 9900 */ "xsabsqp \000"
  /* 9909 */ "xscmpgtqp \000"
  /* 9920 */ "xssqrtqp \000"
  /* 9930 */ "xscmpuqp \000"
  /* 9940 */ "xsdivqp \000"
  /* 9949 */ "xsnmsubasp \000"
  /* 9961 */ "xvnmsubasp \000"
  /* 9973 */ "xsmsubasp \000"
  /* 9984 */ "xvmsubasp \000"
  /* 9995 */ "xsnmaddasp \000"
  /* 10007 */ "xvnmaddasp \000"
  /* 10019 */ "xsmaddasp \000"
  /* 10030 */ "xvmaddasp \000"
  /* 10041 */ "xssubsp \000"
  /* 10050 */ "xvsubsp \000"
  /* 10059 */ "xststdcsp \000"
  /* 10070 */ "xvtstdcsp \000"
  /* 10081 */ "xsaddsp \000"
  /* 10090 */ "xvaddsp \000"
  /* 10099 */ "xscvsxdsp \000"
  /* 10110 */ "xvcvsxdsp \000"
  /* 10121 */ "xscvuxdsp \000"
  /* 10132 */ "xvcvuxdsp \000"
  /* 10143 */ "xvcmpgesp \000"
  /* 10154 */ "xsresp \000"
  /* 10162 */ "xvresp \000"
  /* 10170 */ "xsrsqrtesp \000"
  /* 10182 */ "xvrsqrtesp \000"
  /* 10194 */ "xvnegsp \000"
  /* 10203 */ "xvxsigsp \000"
  /* 10213 */ "xsmulsp \000"
  /* 10222 */ "xvmulsp \000"
  /* 10231 */ "xsnmsubmsp \000"
  /* 10243 */ "xvnmsubmsp \000"
  /* 10255 */ "xsmsubmsp \000"
  /* 10266 */ "xvmsubmsp \000"
  /* 10277 */ "xsnmaddmsp \000"
  /* 10289 */ "xvnmaddmsp \000"
  /* 10301 */ "xsmaddmsp \000"
  /* 10312 */ "xvmaddmsp \000"
  /* 10323 */ "xvcpsgnsp \000"
  /* 10334 */ "xvminsp \000"
  /* 10343 */ "xscvdpsp \000"
  /* 10353 */ "xvcvdpsp \000"
  /* 10363 */ "xvcvhpsp \000"
  /* 10373 */ "xviexpsp \000"
  /* 10383 */ "xvxexpsp \000"
  /* 10393 */ "xvcmpeqsp \000"
  /* 10404 */ "drsp \000"
  /* 10410 */ "frsp \000"
  /* 10416 */ "xsrsp \000"
  /* 10423 */ "xvnabssp \000"
  /* 10433 */ "xvabssp \000"
  /* 10442 */ "plxssp \000"
  /* 10450 */ "pstxssp \000"
  /* 10459 */ "xvcmpgtsp \000"
  /* 10470 */ "xssqrtsp \000"
  /* 10480 */ "xvtsqrtsp \000"
  /* 10491 */ "xvsqrtsp \000"
  /* 10501 */ "xsdivsp \000"
  /* 10510 */ "xvtdivsp \000"
  /* 10520 */ "xvdivsp \000"
  /* 10529 */ "xvcvsxwsp \000"
  /* 10540 */ "xvcvuxwsp \000"
  /* 10551 */ "xvmaxsp \000"
  /* 10560 */ "hashstp \000"
  /* 10569 */ "plxvp \000"
  /* 10576 */ "pstxvp \000"
  /* 10584 */ "xsrqpxp \000"
  /* 10593 */ "vextsd2q \000"
  /* 10603 */ "vsraq \000"
  /* 10610 */ "dquaq \000"
  /* 10617 */ "dsubq \000"
  /* 10624 */ "vprtybq \000"
  /* 10633 */ "dtstdcq \000"
  /* 10642 */ "denbcdq \000"
  /* 10651 */ "daddq \000"
  /* 10658 */ "drrndq \000"
  /* 10666 */ "ddedpdq \000"
  /* 10675 */ "efdcmpeq \000"
  /* 10685 */ "efscmpeq \000"
  /* 10695 */ "evfscmpeq \000"
  /* 10706 */ "evcmpeq \000"
  /* 10715 */ "efdtsteq \000"
  /* 10725 */ "efststeq \000"
  /* 10735 */ "evfststeq \000"
  /* 10746 */ "dtstsfq \000"
  /* 10755 */ "dtstdgq \000"
  /* 10764 */ "dquaiq \000"
  /* 10772 */ "dtstsfiq \000"
  /* 10782 */ "dscliq \000"
  /* 10790 */ "dscriq \000"
  /* 10798 */ "lxvkq \000"
  /* 10805 */ "vrlq \000"
  /* 10811 */ "vslq \000"
  /* 10817 */ "dmulq \000"
  /* 10824 */ "vbpermq \000"
  /* 10833 */ "drintnq \000"
  /* 10842 */ "dcmpoq \000"
  /* 10850 */ "drdpq \000"
  /* 10857 */ "dctqpq \000"
  /* 10865 */ "dcffixqq \000"
  /* 10875 */ "dctfixqq \000"
  /* 10885 */ "xxbrq \000"
  /* 10892 */ "vsrq \000"
  /* 10898 */ "vmodsq \000"
  /* 10906 */ "vdivesq \000"
  /* 10915 */ "vcmpsq \000"
  /* 10923 */ "vcmpgtsq \000"
  /* 10933 */ "vdivsq \000"
  /* 10941 */ "stq \000"
  /* 10946 */ "vmul10uq \000"
  /* 10956 */ "vmul10cuq \000"
  /* 10967 */ "vsubcuq \000"
  /* 10976 */ "vaddcuq \000"
  /* 10985 */ "vmul10ecuq \000"
  /* 10997 */ "vsubecuq \000"
  /* 11007 */ "vaddecuq \000"
  /* 11017 */ "vmoduq \000"
  /* 11025 */ "vmul10euq \000"
  /* 11036 */ "vdiveuq \000"
  /* 11045 */ "dcmpuq \000"
  /* 11053 */ "vcmpuq \000"
  /* 11061 */ "vcmpequq \000"
  /* 11071 */ "vcmpgtuq \000"
  /* 11081 */ "vdivuq \000"
  /* 11089 */ "ddivq \000"
  /* 11096 */ "diexq \000"
  /* 11103 */ "dtstexq \000"
  /* 11112 */ "dxexq \000"
  /* 11119 */ "dcffixq \000"
  /* 11128 */ "dctfixq \000"
  /* 11137 */ "drintxq \000"
  /* 11146 */ "#TC_RETURNr \000"
  /* 11159 */ "mbar \000"
  /* 11165 */ "vstribr \000"
  /* 11174 */ "setnbcr \000"
  /* 11183 */ "setbcr \000"
  /* 11191 */ "mfdcr \000"
  /* 11198 */ "rldcr \000"
  /* 11205 */ "mtdcr \000"
  /* 11212 */ "mfcr \000"
  /* 11218 */ "rldicr \000"
  /* 11226 */ "mfvscr \000"
  /* 11234 */ "mtvscr \000"
  /* 11242 */ "pmxvf32ger \000"
  /* 11254 */ "pmxvf64ger \000"
  /* 11266 */ "vncipher \000"
  /* 11276 */ "vcipher \000"
  /* 11285 */ "vstrihr \000"
  /* 11294 */ "bclr \000"
  /* 11300 */ "mflr \000"
  /* 11306 */ "mtlr \000"
  /* 11312 */ "fmr \000"
  /* 11317 */ "dmmr \000"
  /* 11323 */ "mfpmr \000"
  /* 11330 */ "mtpmr \000"
  /* 11337 */ "vpermr \000"
  /* 11345 */ "xxpermr \000"
  /* 11354 */ "xxlor \000"
  /* 11361 */ "xxlnor \000"
  /* 11369 */ "crnor \000"
  /* 11376 */ "evnor \000"
  /* 11383 */ "cror \000"
  /* 11389 */ "evor \000"
  /* 11395 */ "xxlxor \000"
  /* 11403 */ "dmxor \000"
  /* 11410 */ "vpermxor \000"
  /* 11420 */ "crxor \000"
  /* 11427 */ "evxor \000"
  /* 11434 */ "mfspr \000"
  /* 11441 */ "mtspr \000"
  /* 11448 */ "mfsr \000"
  /* 11454 */ "mfmsr \000"
  /* 11461 */ "mtmsr \000"
  /* 11468 */ "mtsr \000"
  /* 11474 */ "lvsr \000"
  /* 11480 */ "bcctr \000"
  /* 11487 */ "mfctr \000"
  /* 11494 */ "mtctr \000"
  /* 11501 */ "pmxvi16ger2s \000"
  /* 11515 */ "addg6s \000"
  /* 11523 */ "efdabs \000"
  /* 11531 */ "fabs \000"
  /* 11537 */ "efdnabs \000"
  /* 11546 */ "fnabs \000"
  /* 11553 */ "efsnabs \000"
  /* 11562 */ "evfsnabs \000"
  /* 11572 */ "efsabs \000"
  /* 11580 */ "evfsabs \000"
  /* 11589 */ "evabs \000"
  /* 11596 */ "vsum4sbs \000"
  /* 11606 */ "vsubsbs \000"
  /* 11615 */ "vaddsbs \000"
  /* 11624 */ "vsum4ubs \000"
  /* 11634 */ "vsububs \000"
  /* 11643 */ "vaddubs \000"
  /* 11652 */ "fsubs \000"
  /* 11659 */ "fmsubs \000"
  /* 11667 */ "fnmsubs \000"
  /* 11676 */ "fadds \000"
  /* 11683 */ "fmadds \000"
  /* 11691 */ "fnmadds \000"
  /* 11700 */ "fcfids \000"
  /* 11708 */ "dcbtds \000"
  /* 11716 */ "dcbtstds \000"
  /* 11726 */ "xscvdpsxds \000"
  /* 11738 */ "xvcvdpsxds \000"
  /* 11750 */ "xvcvspsxds \000"
  /* 11762 */ "xscvdpuxds \000"
  /* 11774 */ "xvcvdpuxds \000"
  /* 11786 */ "xvcvspuxds \000"
  /* 11798 */ "fres \000"
  /* 11804 */ "frsqrtes \000"
  /* 11814 */ "efdcfs \000"
  /* 11822 */ "mffs \000"
  /* 11828 */ "plfs \000"
  /* 11834 */ "mcrfs \000"
  /* 11841 */ "pstfs \000"
  /* 11848 */ "vsum4shs \000"
  /* 11858 */ "vsubshs \000"
  /* 11867 */ "vmhaddshs \000"
  /* 11878 */ "vmhraddshs \000"
  /* 11890 */ "vaddshs \000"
  /* 11899 */ "vmsumshs \000"
  /* 11909 */ "vsubuhs \000"
  /* 11918 */ "vadduhs \000"
  /* 11927 */ "vmsumuhs \000"
  /* 11937 */ "subis \000"
  /* 11944 */ "subpcis \000"
  /* 11953 */ "addpcis \000"
  /* 11962 */ "paddis \000"
  /* 11970 */ "lis \000"
  /* 11975 */ "xoris \000"
  /* 11982 */ "evsrwis \000"
  /* 11991 */ "icbtls \000"
  /* 11999 */ "fmuls \000"
  /* 12006 */ "evlwhos \000"
  /* 12015 */ "dcbfps \000"
  /* 12023 */ "dcbstps \000"
  /* 12032 */ "vpksdss \000"
  /* 12041 */ "vpkshss \000"
  /* 12050 */ "vpkswss \000"
  /* 12059 */ "evcmpgts \000"
  /* 12069 */ "evcmplts \000"
  /* 12079 */ "fsqrts \000"
  /* 12087 */ "fcfidus \000"
  /* 12096 */ "vpksdus \000"
  /* 12105 */ "vpkudus \000"
  /* 12114 */ "subfus \000"
  /* 12122 */ "vpkshus \000"
  /* 12131 */ "vpkuhus \000"
  /* 12140 */ "vpkswus \000"
  /* 12149 */ "vpkuwus \000"
  /* 12158 */ "fdivs \000"
  /* 12165 */ "evsrws \000"
  /* 12173 */ "mtvsrws \000"
  /* 12182 */ "vsum2sws \000"
  /* 12192 */ "vsubsws \000"
  /* 12201 */ "vaddsws \000"
  /* 12210 */ "vsumsws \000"
  /* 12219 */ "vsubuws \000"
  /* 12228 */ "vadduws \000"
  /* 12237 */ "evdivws \000"
  /* 12246 */ "xscvdpsxws \000"
  /* 12258 */ "xvcvdpsxws \000"
  /* 12270 */ "xvcvspsxws \000"
  /* 12282 */ "xscvdpuxws \000"
  /* 12294 */ "xvcvdpuxws \000"
  /* 12306 */ "xvcvspuxws \000"
  /* 12318 */ "vctsxs \000"
  /* 12326 */ "vctuxs \000"
  /* 12334 */ "ldat \000"
  /* 12340 */ "stdat \000"
  /* 12347 */ "evlhhesplat \000"
  /* 12360 */ "evlwhsplat \000"
  /* 12372 */ "evlhhossplat \000"
  /* 12386 */ "evlhhousplat \000"
  /* 12400 */ "evlwwsplat \000"
  /* 12412 */ "lwat \000"
  /* 12418 */ "stwat \000"
  /* 12425 */ "dcbt \000"
  /* 12431 */ "icbt \000"
  /* 12437 */ "dcbtct \000"
  /* 12445 */ "dcbtstct \000"
  /* 12455 */ "efdcmpgt \000"
  /* 12465 */ "efscmpgt \000"
  /* 12475 */ "evfscmpgt \000"
  /* 12486 */ "efdtstgt \000"
  /* 12496 */ "efststgt \000"
  /* 12506 */ "evfststgt \000"
  /* 12517 */ "wait \000"
  /* 12523 */ "efdcmplt \000"
  /* 12533 */ "efscmplt \000"
  /* 12543 */ "evfscmplt \000"
  /* 12554 */ "efdtstlt \000"
  /* 12564 */ "efststlt \000"
  /* 12574 */ "evfststlt \000"
  /* 12585 */ "crnot \000"
  /* 12592 */ "fsqrt \000"
  /* 12599 */ "ftsqrt \000"
  /* 12607 */ "vncipherlast \000"
  /* 12621 */ "vcipherlast \000"
  /* 12634 */ "dcbst \000"
  /* 12641 */ "dst \000"
  /* 12646 */ "hashst \000"
  /* 12654 */ "dcbtst \000"
  /* 12662 */ "dstst \000"
  /* 12669 */ "dcbtt \000"
  /* 12676 */ "dstt \000"
  /* 12682 */ "dcbtstt \000"
  /* 12691 */ "dststt \000"
  /* 12699 */ "xxssumudmcext \000"
  /* 12714 */ "lhau \000"
  /* 12720 */ "stbu \000"
  /* 12726 */ "lfdu \000"
  /* 12732 */ "stfdu \000"
  /* 12739 */ "maddhdu \000"
  /* 12748 */ "mulhdu \000"
  /* 12756 */ "fcfidu \000"
  /* 12764 */ "fctidu \000"
  /* 12772 */ "ldu \000"
  /* 12777 */ "stdu \000"
  /* 12783 */ "divdu \000"
  /* 12790 */ "divdeu \000"
  /* 12798 */ "divweu \000"
  /* 12806 */ "sthu \000"
  /* 12812 */ "evsrwiu \000"
  /* 12821 */ "evlwhou \000"
  /* 12830 */ "dcmpu \000"
  /* 12837 */ "fcmpu \000"
  /* 12844 */ "lfsu \000"
  /* 12850 */ "stfsu \000"
  /* 12857 */ "evcmpgtu \000"
  /* 12867 */ "evcmpltu \000"
  /* 12877 */ "mulhwu \000"
  /* 12885 */ "fctiwu \000"
  /* 12893 */ "evsrwu \000"
  /* 12901 */ "stwu \000"
  /* 12907 */ "evdivwu \000"
  /* 12916 */ "lbzu \000"
  /* 12922 */ "lhzu \000"
  /* 12928 */ "lwzu \000"
  /* 12934 */ "scv \000"
  /* 12939 */ "slbmfev \000"
  /* 12948 */ "efddiv \000"
  /* 12956 */ "fdiv \000"
  /* 12962 */ "efsdiv \000"
  /* 12970 */ "evfsdiv \000"
  /* 12979 */ "ftdiv \000"
  /* 12986 */ "vslv \000"
  /* 12992 */ "xxleqv \000"
  /* 13000 */ "creqv \000"
  /* 13007 */ "eveqv \000"
  /* 13014 */ "vsrv \000"
  /* 13020 */ "plxv \000"
  /* 13026 */ "pstxv \000"
  /* 13033 */ "vextsb2w \000"
  /* 13043 */ "vextsh2w \000"
  /* 13053 */ "evmhesmfaaw \000"
  /* 13066 */ "evmhosmfaaw \000"
  /* 13079 */ "evmhessfaaw \000"
  /* 13092 */ "evmhossfaaw \000"
  /* 13105 */ "evaddsmiaaw \000"
  /* 13118 */ "evmhesmiaaw \000"
  /* 13131 */ "evsubfsmiaaw \000"
  /* 13145 */ "evmwlsmiaaw \000"
  /* 13158 */ "evmhosmiaaw \000"
  /* 13171 */ "evaddumiaaw \000"
  /* 13184 */ "evmheumiaaw \000"
  /* 13197 */ "evsubfumiaaw \000"
  /* 13211 */ "evmwlumiaaw \000"
  /* 13224 */ "evmhoumiaaw \000"
  /* 13237 */ "evaddssiaaw \000"
  /* 13250 */ "evmhessiaaw \000"
  /* 13263 */ "evsubfssiaaw \000"
  /* 13277 */ "evmwlssiaaw \000"
  /* 13290 */ "evmhossiaaw \000"
  /* 13303 */ "evaddusiaaw \000"
  /* 13316 */ "evmheusiaaw \000"
  /* 13329 */ "evsubfusiaaw \000"
  /* 13343 */ "evmwlusiaaw \000"
  /* 13356 */ "evmhousiaaw \000"
  /* 13369 */ "vshasigmaw \000"
  /* 13381 */ "vsraw \000"
  /* 13388 */ "vcntmbw \000"
  /* 13397 */ "vprtybw \000"
  /* 13406 */ "evaddw \000"
  /* 13414 */ "evldw \000"
  /* 13421 */ "evrndw \000"
  /* 13429 */ "evstdw \000"
  /* 13437 */ "vmrgew \000"
  /* 13445 */ "vcmpnew \000"
  /* 13454 */ "evsubfw \000"
  /* 13463 */ "evsubifw \000"
  /* 13473 */ "vnegw \000"
  /* 13480 */ "vmrghw \000"
  /* 13488 */ "xxmrghw \000"
  /* 13497 */ "mulhw \000"
  /* 13504 */ "evaddiw \000"
  /* 13513 */ "fctiw \000"
  /* 13520 */ "xxspltiw \000"
  /* 13530 */ "vmrglw \000"
  /* 13538 */ "xxmrglw \000"
  /* 13547 */ "mullw \000"
  /* 13554 */ "cmplw \000"
  /* 13561 */ "evrlw \000"
  /* 13568 */ "xvrlw \000"
  /* 13575 */ "evslw \000"
  /* 13582 */ "lmw \000"
  /* 13587 */ "stmw \000"
  /* 13593 */ "vpmsumw \000"
  /* 13602 */ "evmhesmfanw \000"
  /* 13615 */ "evmhosmfanw \000"
  /* 13628 */ "evmhessfanw \000"
  /* 13641 */ "evmhossfanw \000"
  /* 13654 */ "evmhesmianw \000"
  /* 13667 */ "evmwlsmianw \000"
  /* 13680 */ "evmhosmianw \000"
  /* 13693 */ "evmheumianw \000"
  /* 13706 */ "evmwlumianw \000"
  /* 13719 */ "evmhoumianw \000"
  /* 13732 */ "evmhessianw \000"
  /* 13745 */ "evmwlssianw \000"
  /* 13758 */ "evmhossianw \000"
  /* 13771 */ "evmheusianw \000"
  /* 13784 */ "evmwlusianw \000"
  /* 13797 */ "evmhousianw \000"
  /* 13810 */ "vmrgow \000"
  /* 13818 */ "cmpw \000"
  /* 13824 */ "xxbrw \000"
  /* 13831 */ "vsrw \000"
  /* 13837 */ "vmodsw \000"
  /* 13845 */ "vmulesw \000"
  /* 13854 */ "vdivesw \000"
  /* 13863 */ "vavgsw \000"
  /* 13871 */ "vupkhsw \000"
  /* 13880 */ "xvmulhsw \000"
  /* 13890 */ "vspltisw \000"
  /* 13900 */ "vupklsw \000"
  /* 13909 */ "evcntlsw \000"
  /* 13919 */ "vminsw \000"
  /* 13927 */ "vinsw \000"
  /* 13934 */ "vmulosw \000"
  /* 13943 */ "vcmpgtsw \000"
  /* 13953 */ "extsw \000"
  /* 13960 */ "vdivsw \000"
  /* 13968 */ "vmaxsw \000"
  /* 13976 */ "vspltw \000"
  /* 13984 */ "xxspltw \000"
  /* 13993 */ "vpopcntw \000"
  /* 14003 */ "vinsertw \000"
  /* 14013 */ "xxinsertw \000"
  /* 14024 */ "pstw \000"
  /* 14030 */ "vsubcuw \000"
  /* 14039 */ "vaddcuw \000"
  /* 14048 */ "vmoduw \000"
  /* 14056 */ "vabsduw \000"
  /* 14065 */ "vmuleuw \000"
  /* 14074 */ "vdiveuw \000"
  /* 14083 */ "vavguw \000"
  /* 14091 */ "xvmulhuw \000"
  /* 14101 */ "vminuw \000"
  /* 14109 */ "vmulouw \000"
  /* 14118 */ "vcmpequw \000"
  /* 14128 */ "vextractuw \000"
  /* 14140 */ "xxextractuw \000"
  /* 14153 */ "vcmpgtuw \000"
  /* 14163 */ "vdivuw \000"
  /* 14171 */ "vmaxuw \000"
  /* 14179 */ "xxblendvw \000"
  /* 14190 */ "divw \000"
  /* 14196 */ "vcmpnezw \000"
  /* 14206 */ "vclzw \000"
  /* 14213 */ "evcntlzw \000"
  /* 14223 */ "vctzw \000"
  /* 14230 */ "cnttzw \000"
  /* 14238 */ "lxvpb32x \000"
  /* 14248 */ "stxvpb32x \000"
  /* 14259 */ "lxvd2x \000"
  /* 14267 */ "stxvd2x \000"
  /* 14276 */ "lxvw4x \000"
  /* 14284 */ "stxvw4x \000"
  /* 14293 */ "lxvb16x \000"
  /* 14302 */ "stxvb16x \000"
  /* 14312 */ "lxvh8x \000"
  /* 14320 */ "stxvh8x \000"
  /* 14329 */ "lhax \000"
  /* 14335 */ "tlbivax \000"
  /* 14344 */ "lfiwax \000"
  /* 14352 */ "lxsiwax \000"
  /* 14361 */ "lwax \000"
  /* 14367 */ "lvebx \000"
  /* 14374 */ "stvebx \000"
  /* 14382 */ "stxsibx \000"
  /* 14391 */ "lxvrbx \000"
  /* 14399 */ "stxvrbx \000"
  /* 14408 */ "stbx \000"
  /* 14414 */ "xxsplti32dx \000"
  /* 14427 */ "evlddx \000"
  /* 14435 */ "evstddx \000"
  /* 14444 */ "lfdx \000"
  /* 14450 */ "stfdx \000"
  /* 14457 */ "ldx \000"
  /* 14462 */ "lxvrdx \000"
  /* 14470 */ "stxvrdx \000"
  /* 14479 */ "lxsdx \000"
  /* 14486 */ "stxsdx \000"
  /* 14494 */ "stdx \000"
  /* 14500 */ "addex \000"
  /* 14507 */ "evlwhex \000"
  /* 14516 */ "evstwhex \000"
  /* 14526 */ "diex \000"
  /* 14532 */ "dtstex \000"
  /* 14540 */ "evstwwex \000"
  /* 14550 */ "dxex \000"
  /* 14556 */ "evldhx \000"
  /* 14564 */ "evstdhx \000"
  /* 14573 */ "lvehx \000"
  /* 14580 */ "stvehx \000"
  /* 14588 */ "stxsihx \000"
  /* 14597 */ "lxvrhx \000"
  /* 14605 */ "stxvrhx \000"
  /* 14614 */ "sthx \000"
  /* 14620 */ "stbcix \000"
  /* 14628 */ "ldcix \000"
  /* 14635 */ "stdcix \000"
  /* 14643 */ "sthcix \000"
  /* 14651 */ "stwcix \000"
  /* 14659 */ "lbzcix \000"
  /* 14667 */ "lhzcix \000"
  /* 14675 */ "lwzcix \000"
  /* 14683 */ "dcffix \000"
  /* 14691 */ "dctfix \000"
  /* 14699 */ "xsrqpix \000"
  /* 14708 */ "vinsblx \000"
  /* 14717 */ "vextublx \000"
  /* 14727 */ "vinsdlx \000"
  /* 14736 */ "vinshlx \000"
  /* 14745 */ "vextuhlx \000"
  /* 14755 */ "tlbilx \000"
  /* 14763 */ "vinsbvlx \000"
  /* 14773 */ "vextdubvlx \000"
  /* 14785 */ "vextddvlx \000"
  /* 14796 */ "vinshvlx \000"
  /* 14806 */ "vextduhvlx \000"
  /* 14818 */ "vinswvlx \000"
  /* 14828 */ "vextduwvlx \000"
  /* 14840 */ "vinswlx \000"
  /* 14849 */ "vextuwlx \000"
  /* 14859 */ "xxpermx \000"
  /* 14868 */ "vsbox \000"
  /* 14875 */ "evstwhox \000"
  /* 14885 */ "evstwwox \000"
  /* 14895 */ "lbepx \000"
  /* 14902 */ "stbepx \000"
  /* 14910 */ "lfdepx \000"
  /* 14918 */ "stfdepx \000"
  /* 14927 */ "lhepx \000"
  /* 14934 */ "sthepx \000"
  /* 14942 */ "lwepx \000"
  /* 14949 */ "stwepx \000"
  /* 14957 */ "vupkhpx \000"
  /* 14966 */ "vpkpx \000"
  /* 14973 */ "vupklpx \000"
  /* 14982 */ "lxsspx \000"
  /* 14990 */ "stxsspx \000"
  /* 14999 */ "lxvpx \000"
  /* 15006 */ "stxvpx \000"
  /* 15014 */ "lbarx \000"
  /* 15021 */ "ldarx \000"
  /* 15028 */ "lharx \000"
  /* 15035 */ "lqarx \000"
  /* 15042 */ "lwarx \000"
  /* 15049 */ "ldbrx \000"
  /* 15056 */ "stdbrx \000"
  /* 15064 */ "lhbrx \000"
  /* 15071 */ "sthbrx \000"
  /* 15079 */ "vinsbrx \000"
  /* 15088 */ "vextubrx \000"
  /* 15098 */ "lwbrx \000"
  /* 15105 */ "stwbrx \000"
  /* 15113 */ "vinsdrx \000"
  /* 15122 */ "vinshrx \000"
  /* 15131 */ "vextuhrx \000"
  /* 15141 */ "vinsbvrx \000"
  /* 15151 */ "vextdubvrx \000"
  /* 15163 */ "vextddvrx \000"
  /* 15174 */ "vinshvrx \000"
  /* 15184 */ "vextduhvrx \000"
  /* 15196 */ "vinswvrx \000"
  /* 15206 */ "vextduwvrx \000"
  /* 15218 */ "vinswrx \000"
  /* 15227 */ "vextuwrx \000"
  /* 15237 */ "mcrxrx \000"
  /* 15245 */ "tlbsx \000"
  /* 15252 */ "lxvdsx \000"
  /* 15260 */ "vcfsx \000"
  /* 15267 */ "lfsx \000"
  /* 15273 */ "stfsx \000"
  /* 15280 */ "evlwhosx \000"
  /* 15290 */ "lxvwsx \000"
  /* 15298 */ "evlhhesplatx \000"
  /* 15312 */ "evlwhsplatx \000"
  /* 15325 */ "evlhhossplatx \000"
  /* 15340 */ "evlhhousplatx \000"
  /* 15355 */ "evlwwsplatx \000"
  /* 15368 */ "drintx \000"
  /* 15376 */ "lhaux \000"
  /* 15383 */ "lwaux \000"
  /* 15390 */ "stbux \000"
  /* 15397 */ "lfdux \000"
  /* 15404 */ "stfdux \000"
  /* 15412 */ "ldux \000"
  /* 15418 */ "stdux \000"
  /* 15425 */ "vcfux \000"
  /* 15432 */ "sthux \000"
  /* 15439 */ "evlwhoux \000"
  /* 15449 */ "lfsux \000"
  /* 15456 */ "stfsux \000"
  /* 15464 */ "stwux \000"
  /* 15471 */ "lbzux \000"
  /* 15478 */ "lhzux \000"
  /* 15485 */ "lwzux \000"
  /* 15492 */ "lvx \000"
  /* 15497 */ "stvx \000"
  /* 15503 */ "lxvx \000"
  /* 15509 */ "stxvx \000"
  /* 15516 */ "evldwx \000"
  /* 15524 */ "evstdwx \000"
  /* 15533 */ "lvewx \000"
  /* 15540 */ "stvewx \000"
  /* 15548 */ "stfiwx \000"
  /* 15556 */ "stxsiwx \000"
  /* 15565 */ "lxvrwx \000"
  /* 15573 */ "stxvrwx \000"
  /* 15582 */ "stwx \000"
  /* 15588 */ "lxsibzx \000"
  /* 15597 */ "lbzx \000"
  /* 15603 */ "lxsihzx \000"
  /* 15612 */ "lhzx \000"
  /* 15618 */ "lfiwzx \000"
  /* 15626 */ "lxsiwzx \000"
  /* 15635 */ "lwzx \000"
  /* 15641 */ "copy \000"
  /* 15647 */ "dcbz \000"
  /* 15653 */ "plbz \000"
  /* 15659 */ "dmxxsetaccz \000"
  /* 15672 */ "bdz \000"
  /* 15677 */ "efdctsidz \000"
  /* 15688 */ "fctidz \000"
  /* 15696 */ "efdctuidz \000"
  /* 15707 */ "xscvqpsdz \000"
  /* 15718 */ "xscvqpudz \000"
  /* 15729 */ "plhz \000"
  /* 15735 */ "vrfiz \000"
  /* 15742 */ "xsrdpiz \000"
  /* 15751 */ "xvrdpiz \000"
  /* 15760 */ "xvrspiz \000"
  /* 15769 */ "friz \000"
  /* 15775 */ "efdctsiz \000"
  /* 15785 */ "efsctsiz \000"
  /* 15795 */ "evfsctsiz \000"
  /* 15806 */ "efdctuiz \000"
  /* 15816 */ "efsctuiz \000"
  /* 15826 */ "bdnz \000"
  /* 15832 */ "xscvqpsqz \000"
  /* 15843 */ "xscvqpuqz \000"
  /* 15854 */ "dmsetdmrz \000"
  /* 15865 */ "fctiduz \000"
  /* 15874 */ "fctiwuz \000"
  /* 15883 */ "fctiwz \000"
  /* 15891 */ "plwz \000"
  /* 15897 */ "mfvsrwz \000"
  /* 15906 */ "mtvsrwz \000"
  /* 15915 */ "xscvqpswz \000"
  /* 15926 */ "xscvqpuwz \000"
  /* 15937 */ "bdzlrl+\000"
  /* 15945 */ "bdnzlrl+\000"
  /* 15954 */ "bdzlr+\000"
  /* 15961 */ "bdnzlr+\000"
  /* 15969 */ "evsel crD,\000"
  /* 15980 */ "bdzlrl-\000"
  /* 15988 */ "bdnzlrl-\000"
  /* 15997 */ "bdzlr-\000"
  /* 16004 */ "bdnzlr-\000"
  /* 16012 */ "# XRay Function Patchable RET.\000"
  /* 16043 */ "# XRay Typed Event Log.\000"
  /* 16067 */ "# XRay Custom Event Log.\000"
  /* 16092 */ "# XRay Function Enter.\000"
  /* 16115 */ "# XRay Tail Call Exit.\000"
  /* 16138 */ "# XRay Function Exit.\000"
  /* 16160 */ "trechkpt.\000"
  /* 16170 */ "ori 1, 1, 0\000"
  /* 16182 */ "ori 2, 2, 0\000"
  /* 16194 */ "#ADDISdtprelHA32\000"
  /* 16211 */ "#ATOMIC_LOAD_SUB_I32\000"
  /* 16232 */ "#ATOMIC_LOAD_ADD_I32\000"
  /* 16253 */ "#ATOMIC_LOAD_NAND_I32\000"
  /* 16275 */ "#ATOMIC_LOAD_AND_I32\000"
  /* 16296 */ "#ATOMIC_LOAD_UMIN_I32\000"
  /* 16318 */ "#ATOMIC_LOAD_MIN_I32\000"
  /* 16339 */ "#ATOMIC_SWAP_I32\000"
  /* 16356 */ "#ATOMIC_LOAD_XOR_I32\000"
  /* 16377 */ "#ATOMIC_LOAD_OR_I32\000"
  /* 16397 */ "#ATOMIC_LOAD_UMAX_I32\000"
  /* 16419 */ "#ATOMIC_LOAD_MAX_I32\000"
  /* 16440 */ "#ADDItlsgdL32\000"
  /* 16454 */ "#ADDItlsldL32\000"
  /* 16468 */ "#LDgotTprelL32\000"
  /* 16483 */ "#ADDIdtprelL32\000"
  /* 16498 */ "#EH_SJLJ_LONGJMP32\000"
  /* 16517 */ "#EH_SJLJ_SETJMP32\000"
  /* 16535 */ "#ADDItlsgdLADDR32\000"
  /* 16553 */ "#ADDItlsldLADDR32\000"
  /* 16571 */ "GETtlsldADDR32\000"
  /* 16586 */ "GETtlsADDR32\000"
  /* 16599 */ "#PROBED_ALLOCA_32\000"
  /* 16617 */ "#PREPARE_PROBED_ALLOCA_32\000"
  /* 16643 */ "#PROBED_STACKALLOC_32\000"
  /* 16665 */ "#PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32\000"
  /* 16708 */ "#DFLOADf32\000"
  /* 16719 */ "#XFLOADf32\000"
  /* 16730 */ "#DFSTOREf32\000"
  /* 16742 */ "#XFSTOREf32\000"
  /* 16754 */ "#ATOMIC_LOAD_SUB_I64\000"
  /* 16775 */ "#ATOMIC_LOAD_ADD_I64\000"
  /* 16796 */ "#ATOMIC_LOAD_NAND_I64\000"
  /* 16818 */ "#ATOMIC_LOAD_UMIN_I64\000"
  /* 16840 */ "#ATOMIC_LOAD_MIN_I64\000"
  /* 16861 */ "#ATOMIC_SWAP_I64\000"
  /* 16878 */ "#ATOMIC_CMP_SWAP_I64\000"
  /* 16899 */ "#ATOMIC_LOAD_XOR_I64\000"
  /* 16920 */ "#ATOMIC_LOAD_OR_I64\000"
  /* 16940 */ "#ATOMIC_LOAD_UMAX_I64\000"
  /* 16962 */ "#ATOMIC_LOAD_MAX_I64\000"
  /* 16983 */ "#EH_SJLJ_LONGJMP64\000"
  /* 17002 */ "#EH_SJLJ_SETJMP64\000"
  /* 17020 */ "#PROBED_ALLOCA_64\000"
  /* 17038 */ "#PREPARE_PROBED_ALLOCA_64\000"
  /* 17064 */ "#PROBED_STACKALLOC_64\000"
  /* 17086 */ "#PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64\000"
  /* 17129 */ "#DFLOADf64\000"
  /* 17140 */ "#XFLOADf64\000"
  /* 17151 */ "#DFSTOREf64\000"
  /* 17163 */ "#XFSTOREf64\000"
  /* 17175 */ "#ATOMIC_LOAD_AND_i64\000"
  /* 17196 */ "#SELECT_CC_SPE4\000"
  /* 17212 */ "#SELECT_SPE4\000"
  /* 17225 */ "#SELECT_CC_F4\000"
  /* 17239 */ "#SELECT_F4\000"
  /* 17250 */ "#SELECT_CC_I4\000"
  /* 17264 */ "#SELECT_I4\000"
  /* 17275 */ "crxor 6, 6, 6\000"
  /* 17289 */ "creqv 6, 6, 6\000"
  /* 17303 */ "#SELECT_CC_F16\000"
  /* 17318 */ "#SELECT_F16\000"
  /* 17330 */ "#ATOMIC_LOAD_SUB_I16\000"
  /* 17351 */ "#ATOMIC_LOAD_ADD_I16\000"
  /* 17372 */ "#ATOMIC_LOAD_NAND_I16\000"
  /* 17394 */ "#ATOMIC_LOAD_AND_I16\000"
  /* 17415 */ "#ATOMIC_LOAD_UMIN_I16\000"
  /* 17437 */ "#ATOMIC_LOAD_MIN_I16\000"
  /* 17458 */ "#ATOMIC_SWAP_I16\000"
  /* 17475 */ "#ATOMIC_LOAD_XOR_I16\000"
  /* 17496 */ "#ATOMIC_LOAD_OR_I16\000"
  /* 17516 */ "#ATOMIC_LOAD_UMAX_I16\000"
  /* 17538 */ "#ATOMIC_LOAD_MAX_I16\000"
  /* 17559 */ "#ATOMIC_LOAD_SUB_I128\000"
  /* 17581 */ "#ATOMIC_LOAD_ADD_I128\000"
  /* 17603 */ "#ATOMIC_LOAD_NAND_I128\000"
  /* 17626 */ "#ATOMIC_LOAD_AND_I128\000"
  /* 17648 */ "#ATOMIC_SWAP_I128\000"
  /* 17666 */ "#ATOMIC_CMP_SWAP_I128\000"
  /* 17688 */ "#ATOMIC_LOAD_XOR_I128\000"
  /* 17710 */ "#ATOMIC_LOAD_OR_I128\000"
  /* 17731 */ "#ADDIStocHA8\000"
  /* 17744 */ "#DYNALLOC8\000"
  /* 17755 */ "#CFENCE8\000"
  /* 17764 */ "#SELECT_CC_F8\000"
  /* 17778 */ "#SELECT_F8\000"
  /* 17789 */ "#ATOMIC_LOAD_SUB_I8\000"
  /* 17809 */ "#SELECT_CC_I8\000"
  /* 17823 */ "#ATOMIC_LOAD_ADD_I8\000"
  /* 17843 */ "#ATOMIC_LOAD_NAND_I8\000"
  /* 17864 */ "#ATOMIC_LOAD_AND_I8\000"
  /* 17884 */ "#ATOMIC_LOAD_UMIN_I8\000"
  /* 17905 */ "#ATOMIC_LOAD_MIN_I8\000"
  /* 17925 */ "#ATOMIC_CMP_SWAP_I8\000"
  /* 17945 */ "ATOMIC_LOAD_XOR_I8\000"
  /* 17964 */ "#ATOMIC_LOAD_OR_I8\000"
  /* 17983 */ "#SELECT_I8\000"
  /* 17994 */ "#ATOMIC_LOAD_UMAX_I8\000"
  /* 18015 */ "#ATOMIC_LOAD_MAX_I8\000"
  /* 18035 */ "#ADDItocL8\000"
  /* 18046 */ "#MovePCtoLR8\000"
  /* 18059 */ "#DYNAREAOFFSET8\000"
  /* 18075 */ "#ANDI_rec_1_EQ_BIT8\000"
  /* 18095 */ "#ANDI_rec_1_GT_BIT8\000"
  /* 18115 */ "#TLSGDAIX8\000"
  /* 18126 */ "#TLSLDAIX8\000"
  /* 18137 */ "#ADDItoc8\000"
  /* 18147 */ "#ATOMIC_SWAP_i8\000"
  /* 18163 */ "#ADDIStocHA\000"
  /* 18175 */ "#ADDIStlsgdHA\000"
  /* 18189 */ "#ADDIStlsldHA\000"
  /* 18203 */ "#ADDISgotTprelHA\000"
  /* 18220 */ "#ADDISdtprelHA\000"
  /* 18235 */ "#ReadTB\000"
  /* 18243 */ "#RESTORE_UACC\000"
  /* 18257 */ "#SPILL_UACC\000"
  /* 18269 */ "#RESTORE_WACC\000"
  /* 18283 */ "#SPILL_WACC\000"
  /* 18295 */ "#RESTORE_ACC\000"
  /* 18308 */ "#SPILL_ACC\000"
  /* 18319 */ "#DYNALLOC\000"
  /* 18329 */ "#SELECT_CC_VSFRC\000"
  /* 18346 */ "#SELECT_VSFRC\000"
  /* 18360 */ "#SELECT_CC_VRRC\000"
  /* 18376 */ "#SELECT_VRRC\000"
  /* 18389 */ "#SELECT_CC_VSSRC\000"
  /* 18406 */ "#SELECT_VSSRC\000"
  /* 18420 */ "#SELECT_CC_VSRC\000"
  /* 18436 */ "#SELECT_VSRC\000"
  /* 18449 */ "#FA_LOAD\000"
  /* 18458 */ "#SPILLTOVSR_LD\000"
  /* 18473 */ "LIFETIME_END\000"
  /* 18486 */ "#SETRND\000"
  /* 18494 */ "#BUILD_QUADWORD\000"
  /* 18510 */ "#RESTORE_QUADWORD\000"
  /* 18528 */ "#SPILL_QUADWORD\000"
  /* 18544 */ "#SPLIT_QUADWORD\000"
  /* 18560 */ "PSEUDO_PROBE\000"
  /* 18573 */ "#FENCE\000"
  /* 18580 */ "#CFENCE\000"
  /* 18588 */ "BUNDLE\000"
  /* 18595 */ "#SELECT_CC_SPE\000"
  /* 18610 */ "#SELECT_SPE\000"
  /* 18622 */ "FAKE_USE\000"
  /* 18631 */ "DBG_VALUE\000"
  /* 18641 */ "DBG_INSTR_REF\000"
  /* 18655 */ "DBG_PHI\000"
  /* 18663 */ "#LDtocJTI\000"
  /* 18673 */ "DBG_LABEL\000"
  /* 18683 */ "#GETtlsldADDRPCREL\000"
  /* 18702 */ "#GETtlsADDRPCREL\000"
  /* 18719 */ "#LDtocL\000"
  /* 18727 */ "#ADDItocL\000"
  /* 18737 */ "#LWZtocL\000"
  /* 18746 */ "#ADDItlsgdL\000"
  /* 18758 */ "#ADDItlsldL\000"
  /* 18770 */ "#LDgotTprelL\000"
  /* 18783 */ "#ADDIdtprelL\000"
  /* 18796 */ "#SETFLM\000"
  /* 18804 */ "#LDAT_PSEUDO\000"
  /* 18817 */ "#LWAT_PSEUDO\000"
  /* 18830 */ "#LQX_PSEUDO\000"
  /* 18842 */ "#STQX_PSEUDO\000"
  /* 18855 */ "#PPCEIEIO\000"
  /* 18865 */ "#UNENCODED_NOP\000"
  /* 18880 */ "#RESTORE_DMRP\000"
  /* 18894 */ "#SPILL_DMRP\000"
  /* 18906 */ "#UpdateGBR\000"
  /* 18917 */ "#RESTORE_CR\000"
  /* 18929 */ "#SPILL_CR\000"
  /* 18939 */ "#ADDItlsgdLADDR\000"
  /* 18955 */ "#ADDItlsldLADDR\000"
  /* 18971 */ "#GETtlsldADDR\000"
  /* 18985 */ "#GETtlsADDR\000"
  /* 18997 */ "#KILL_PAIR\000"
  /* 19008 */ "#MovePCtoLR\000"
  /* 19020 */ "#MoveGOTtoLR\000"
  /* 19033 */ "#RESTORE_DMR\000"
  /* 19046 */ "#SPILL_DMR\000"
  /* 19057 */ "#TCHECK_RET\000"
  /* 19069 */ "#TBEGIN_RET\000"
  /* 19081 */ "#DYNAREAOFFSET\000"
  /* 19096 */ "#RESTORE_CRBIT\000"
  /* 19111 */ "#SPILL_CRBIT\000"
  /* 19124 */ "#ANDI_rec_1_EQ_BIT\000"
  /* 19143 */ "#ANDI_rec_1_GT_BIT\000"
  /* 19162 */ "#PPC32GOT\000"
  /* 19172 */ "#PPC32PICGOT\000"
  /* 19185 */ "#LDtocCPT\000"
  /* 19195 */ "LIFETIME_START\000"
  /* 19210 */ "DBG_VALUE_LIST\000"
  /* 19225 */ "#SPILLTOVSR_ST\000"
  /* 19240 */ "#LIWAX\000"
  /* 19247 */ "#SPILLTOVSR_LDX\000"
  /* 19263 */ "GETtlsMOD32AIX\000"
  /* 19278 */ "GETtlsADDR32AIX\000"
  /* 19294 */ "GETtlsTpointer32AIX\000"
  /* 19314 */ "GETtlsMOD64AIX\000"
  /* 19329 */ "GETtlsADDR64AIX\000"
  /* 19345 */ "#TLSGDAIX\000"
  /* 19355 */ "#TLSLDAIX\000"
  /* 19365 */ "#SPILLTOVSR_STX\000"
  /* 19381 */ "#STIWX\000"
  /* 19388 */ "#LIWZX\000"
  /* 19395 */ "bca\000"
  /* 19399 */ "slbia\000"
  /* 19405 */ "tlbia\000"
  /* 19411 */ "bcla\000"
  /* 19416 */ "clrbhrb\000"
  /* 19424 */ "bc\000"
  /* 19427 */ "slbsync\000"
  /* 19435 */ "tlbsync\000"
  /* 19443 */ "msgsync\000"
  /* 19451 */ "isync\000"
  /* 19457 */ "msync\000"
  /* 19463 */ "#LDtoc\000"
  /* 19470 */ "#ADDItoc\000"
  /* 19479 */ "#LWZtoc\000"
  /* 19487 */ "hrfid\000"
  /* 19493 */ "tlbre\000"
  /* 19499 */ "tlbwe\000"
  /* 19505 */ "#SETRNDi\000"
  /* 19514 */ "rfci\000"
  /* 19519 */ "rfmci\000"
  /* 19525 */ "rfdi\000"
  /* 19530 */ "rfi\000"
  /* 19534 */ "bcl\000"
  /* 19538 */ "#PADDIdtprel\000"
  /* 19551 */ "# FEntry call\000"
  /* 19565 */ "dssall\000"
  /* 19572 */ "blrl\000"
  /* 19577 */ "bdzlrl\000"
  /* 19584 */ "bdnzlrl\000"
  /* 19592 */ "bctrl\000"
  /* 19598 */ "attn\000"
  /* 19603 */ "eieio\000"
  /* 19609 */ "nap\000"
  /* 19613 */ "trap\000"
  /* 19618 */ "nop\000"
  /* 19622 */ "#DecreaseCTR8loop\000"
  /* 19640 */ "#DecreaseCTRloop\000"
  /* 19657 */ "stop\000"
  /* 19662 */ "blr\000"
  /* 19666 */ "bdzlr\000"
  /* 19672 */ "bdnzlr\000"
  /* 19679 */ "bctr\000"
  /* 19684 */ "cpabort\000"
};
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif

  static const uint32_t OpInfo0[] = {
    0U,	// PHI
    0U,	// INLINEASM
    0U,	// INLINEASM_BR
    0U,	// CFI_INSTRUCTION
    0U,	// EH_LABEL
    0U,	// GC_LABEL
    0U,	// ANNOTATION_LABEL
    0U,	// KILL
    0U,	// EXTRACT_SUBREG
    0U,	// INSERT_SUBREG
    0U,	// IMPLICIT_DEF
    0U,	// INIT_UNDEF
    0U,	// SUBREG_TO_REG
    0U,	// COPY_TO_REGCLASS
    18632U,	// DBG_VALUE
    19211U,	// DBG_VALUE_LIST
    18642U,	// DBG_INSTR_REF
    18656U,	// DBG_PHI
    18674U,	// DBG_LABEL
    0U,	// REG_SEQUENCE
    0U,	// COPY
    0U,	// COPY_LANEMASK
    18589U,	// BUNDLE
    19196U,	// LIFETIME_START
    18474U,	// LIFETIME_END
    18561U,	// PSEUDO_PROBE
    0U,	// ARITH_FENCE
    0U,	// STACKMAP
    19552U,	// FENTRY_CALL
    0U,	// PATCHPOINT
    0U,	// LOAD_STACK_GUARD
    0U,	// PREALLOCATED_SETUP
    0U,	// PREALLOCATED_ARG
    0U,	// STATEPOINT
    0U,	// LOCAL_ESCAPE
    0U,	// FAULTING_OP
    0U,	// PATCHABLE_OP
    16093U,	// PATCHABLE_FUNCTION_ENTER
    16013U,	// PATCHABLE_RET
    16139U,	// PATCHABLE_FUNCTION_EXIT
    16116U,	// PATCHABLE_TAIL_CALL
    16068U,	// PATCHABLE_EVENT_CALL
    16044U,	// PATCHABLE_TYPED_EVENT_CALL
    0U,	// ICALL_BRANCH_FUNNEL
    18623U,	// FAKE_USE
    0U,	// MEMBARRIER
    0U,	// JUMP_TABLE_DEBUG_INFO
    0U,	// RELOC_NONE
    0U,	// CONVERGENCECTRL_ENTRY
    0U,	// CONVERGENCECTRL_ANCHOR
    0U,	// CONVERGENCECTRL_LOOP
    0U,	// CONVERGENCECTRL_GLUE
    0U,	// G_ASSERT_SEXT
    0U,	// G_ASSERT_ZEXT
    0U,	// G_ASSERT_ALIGN
    0U,	// G_ADD
    0U,	// G_SUB
    0U,	// G_MUL
    0U,	// G_SDIV
    0U,	// G_UDIV
    0U,	// G_SREM
    0U,	// G_UREM
    0U,	// G_SDIVREM
    0U,	// G_UDIVREM
    0U,	// G_AND
    0U,	// G_OR
    0U,	// G_XOR
    0U,	// G_ABDS
    0U,	// G_ABDU
    0U,	// G_UAVGFLOOR
    0U,	// G_UAVGCEIL
    0U,	// G_SAVGFLOOR
    0U,	// G_SAVGCEIL
    0U,	// G_IMPLICIT_DEF
    0U,	// G_PHI
    0U,	// G_FRAME_INDEX
    0U,	// G_GLOBAL_VALUE
    0U,	// G_PTRAUTH_GLOBAL_VALUE
    0U,	// G_CONSTANT_POOL
    0U,	// G_EXTRACT
    0U,	// G_UNMERGE_VALUES
    0U,	// G_INSERT
    0U,	// G_MERGE_VALUES
    0U,	// G_BUILD_VECTOR
    0U,	// G_BUILD_VECTOR_TRUNC
    0U,	// G_CONCAT_VECTORS
    0U,	// G_PTRTOINT
    0U,	// G_INTTOPTR
    0U,	// G_BITCAST
    0U,	// G_FREEZE
    0U,	// G_CONSTANT_FOLD_BARRIER
    0U,	// G_INTRINSIC_FPTRUNC_ROUND
    0U,	// G_INTRINSIC_TRUNC
    0U,	// G_INTRINSIC_ROUND
    0U,	// G_INTRINSIC_LRINT
    0U,	// G_INTRINSIC_LLRINT
    0U,	// G_INTRINSIC_ROUNDEVEN
    0U,	// G_READCYCLECOUNTER
    0U,	// G_READSTEADYCOUNTER
    0U,	// G_LOAD
    0U,	// G_SEXTLOAD
    0U,	// G_ZEXTLOAD
    0U,	// G_INDEXED_LOAD
    0U,	// G_INDEXED_SEXTLOAD
    0U,	// G_INDEXED_ZEXTLOAD
    0U,	// G_STORE
    0U,	// G_INDEXED_STORE
    0U,	// G_ATOMIC_CMPXCHG_WITH_SUCCESS
    0U,	// G_ATOMIC_CMPXCHG
    0U,	// G_ATOMICRMW_XCHG
    0U,	// G_ATOMICRMW_ADD
    0U,	// G_ATOMICRMW_SUB
    0U,	// G_ATOMICRMW_AND
    0U,	// G_ATOMICRMW_NAND
    0U,	// G_ATOMICRMW_OR
    0U,	// G_ATOMICRMW_XOR
    0U,	// G_ATOMICRMW_MAX
    0U,	// G_ATOMICRMW_MIN
    0U,	// G_ATOMICRMW_UMAX
    0U,	// G_ATOMICRMW_UMIN
    0U,	// G_ATOMICRMW_FADD
    0U,	// G_ATOMICRMW_FSUB
    0U,	// G_ATOMICRMW_FMAX
    0U,	// G_ATOMICRMW_FMIN
    0U,	// G_ATOMICRMW_FMAXIMUM
    0U,	// G_ATOMICRMW_FMINIMUM
    0U,	// G_ATOMICRMW_UINC_WRAP
    0U,	// G_ATOMICRMW_UDEC_WRAP
    0U,	// G_ATOMICRMW_USUB_COND
    0U,	// G_ATOMICRMW_USUB_SAT
    0U,	// G_FENCE
    0U,	// G_PREFETCH
    0U,	// G_BRCOND
    0U,	// G_BRINDIRECT
    0U,	// G_INVOKE_REGION_START
    0U,	// G_INTRINSIC
    0U,	// G_INTRINSIC_W_SIDE_EFFECTS
    0U,	// G_INTRINSIC_CONVERGENT
    0U,	// G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
    0U,	// G_ANYEXT
    0U,	// G_TRUNC
    0U,	// G_TRUNC_SSAT_S
    0U,	// G_TRUNC_SSAT_U
    0U,	// G_TRUNC_USAT_U
    0U,	// G_CONSTANT
    0U,	// G_FCONSTANT
    0U,	// G_VASTART
    0U,	// G_VAARG
    0U,	// G_SEXT
    0U,	// G_SEXT_INREG
    0U,	// G_ZEXT
    0U,	// G_SHL
    0U,	// G_LSHR
    0U,	// G_ASHR
    0U,	// G_FSHL
    0U,	// G_FSHR
    0U,	// G_ROTR
    0U,	// G_ROTL
    0U,	// G_ICMP
    0U,	// G_FCMP
    0U,	// G_SCMP
    0U,	// G_UCMP
    0U,	// G_SELECT
    0U,	// G_UADDO
    0U,	// G_UADDE
    0U,	// G_USUBO
    0U,	// G_USUBE
    0U,	// G_SADDO
    0U,	// G_SADDE
    0U,	// G_SSUBO
    0U,	// G_SSUBE
    0U,	// G_UMULO
    0U,	// G_SMULO
    0U,	// G_UMULH
    0U,	// G_SMULH
    0U,	// G_UADDSAT
    0U,	// G_SADDSAT
    0U,	// G_USUBSAT
    0U,	// G_SSUBSAT
    0U,	// G_USHLSAT
    0U,	// G_SSHLSAT
    0U,	// G_SMULFIX
    0U,	// G_UMULFIX
    0U,	// G_SMULFIXSAT
    0U,	// G_UMULFIXSAT
    0U,	// G_SDIVFIX
    0U,	// G_UDIVFIX
    0U,	// G_SDIVFIXSAT
    0U,	// G_UDIVFIXSAT
    0U,	// G_FADD
    0U,	// G_FSUB
    0U,	// G_FMUL
    0U,	// G_FMA
    0U,	// G_FMAD
    0U,	// G_FDIV
    0U,	// G_FREM
    0U,	// G_FMODF
    0U,	// G_FPOW
    0U,	// G_FPOWI
    0U,	// G_FEXP
    0U,	// G_FEXP2
    0U,	// G_FEXP10
    0U,	// G_FLOG
    0U,	// G_FLOG2
    0U,	// G_FLOG10
    0U,	// G_FLDEXP
    0U,	// G_FFREXP
    0U,	// G_FNEG
    0U,	// G_FPEXT
    0U,	// G_FPTRUNC
    0U,	// G_FPTOSI
    0U,	// G_FPTOUI
    0U,	// G_SITOFP
    0U,	// G_UITOFP
    0U,	// G_FPTOSI_SAT
    0U,	// G_FPTOUI_SAT
    0U,	// G_FABS
    0U,	// G_FCOPYSIGN
    0U,	// G_IS_FPCLASS
    0U,	// G_FCANONICALIZE
    0U,	// G_FMINNUM
    0U,	// G_FMAXNUM
    0U,	// G_FMINNUM_IEEE
    0U,	// G_FMAXNUM_IEEE
    0U,	// G_FMINIMUM
    0U,	// G_FMAXIMUM
    0U,	// G_FMINIMUMNUM
    0U,	// G_FMAXIMUMNUM
    0U,	// G_GET_FPENV
    0U,	// G_SET_FPENV
    0U,	// G_RESET_FPENV
    0U,	// G_GET_FPMODE
    0U,	// G_SET_FPMODE
    0U,	// G_RESET_FPMODE
    0U,	// G_GET_ROUNDING
    0U,	// G_SET_ROUNDING
    0U,	// G_PTR_ADD
    0U,	// G_PTRMASK
    0U,	// G_SMIN
    0U,	// G_SMAX
    0U,	// G_UMIN
    0U,	// G_UMAX
    0U,	// G_ABS
    0U,	// G_LROUND
    0U,	// G_LLROUND
    0U,	// G_BR
    0U,	// G_BRJT
    0U,	// G_VSCALE
    0U,	// G_INSERT_SUBVECTOR
    0U,	// G_EXTRACT_SUBVECTOR
    0U,	// G_INSERT_VECTOR_ELT
    0U,	// G_EXTRACT_VECTOR_ELT
    0U,	// G_SHUFFLE_VECTOR
    0U,	// G_SPLAT_VECTOR
    0U,	// G_STEP_VECTOR
    0U,	// G_VECTOR_COMPRESS
    0U,	// G_CTTZ
    0U,	// G_CTTZ_ZERO_UNDEF
    0U,	// G_CTLZ
    0U,	// G_CTLZ_ZERO_UNDEF
    0U,	// G_CTPOP
    0U,	// G_BSWAP
    0U,	// G_BITREVERSE
    0U,	// G_FCEIL
    0U,	// G_FCOS
    0U,	// G_FSIN
    0U,	// G_FSINCOS
    0U,	// G_FTAN
    0U,	// G_FACOS
    0U,	// G_FASIN
    0U,	// G_FATAN
    0U,	// G_FATAN2
    0U,	// G_FCOSH
    0U,	// G_FSINH
    0U,	// G_FTANH
    0U,	// G_FSQRT
    0U,	// G_FFLOOR
    0U,	// G_FRINT
    0U,	// G_FNEARBYINT
    0U,	// G_ADDRSPACE_CAST
    0U,	// G_BLOCK_ADDR
    0U,	// G_JUMP_TABLE
    0U,	// G_DYN_STACKALLOC
    0U,	// G_STACKSAVE
    0U,	// G_STACKRESTORE
    0U,	// G_STRICT_FADD
    0U,	// G_STRICT_FSUB
    0U,	// G_STRICT_FMUL
    0U,	// G_STRICT_FDIV
    0U,	// G_STRICT_FREM
    0U,	// G_STRICT_FMA
    0U,	// G_STRICT_FSQRT
    0U,	// G_STRICT_FLDEXP
    0U,	// G_READ_REGISTER
    0U,	// G_WRITE_REGISTER
    0U,	// G_MEMCPY
    0U,	// G_MEMCPY_INLINE
    0U,	// G_MEMMOVE
    0U,	// G_MEMSET
    0U,	// G_BZERO
    0U,	// G_TRAP
    0U,	// G_DEBUGTRAP
    0U,	// G_UBSANTRAP
    0U,	// G_VECREDUCE_SEQ_FADD
    0U,	// G_VECREDUCE_SEQ_FMUL
    0U,	// G_VECREDUCE_FADD
    0U,	// G_VECREDUCE_FMUL
    0U,	// G_VECREDUCE_FMAX
    0U,	// G_VECREDUCE_FMIN
    0U,	// G_VECREDUCE_FMAXIMUM
    0U,	// G_VECREDUCE_FMINIMUM
    0U,	// G_VECREDUCE_ADD
    0U,	// G_VECREDUCE_MUL
    0U,	// G_VECREDUCE_AND
    0U,	// G_VECREDUCE_OR
    0U,	// G_VECREDUCE_XOR
    0U,	// G_VECREDUCE_SMAX
    0U,	// G_VECREDUCE_SMIN
    0U,	// G_VECREDUCE_UMAX
    0U,	// G_VECREDUCE_UMIN
    0U,	// G_SBFX
    0U,	// G_UBFX
    17667U,	// ATOMIC_CMP_SWAP_I128
    17582U,	// ATOMIC_LOAD_ADD_I128
    17627U,	// ATOMIC_LOAD_AND_I128
    17604U,	// ATOMIC_LOAD_NAND_I128
    17711U,	// ATOMIC_LOAD_OR_I128
    17560U,	// ATOMIC_LOAD_SUB_I128
    17689U,	// ATOMIC_LOAD_XOR_I128
    17649U,	// ATOMIC_SWAP_I128
    18495U,	// BUILD_QUADWORD
    35607U,	// BUILD_UACC
    18581U,	// CFENCE
    17756U,	// CFENCE8
    2147522108U,	// CLRLSLDI
    2147517336U,	// CLRLSLDI_rec
    2147522642U,	// CLRLSLWI
    2147517461U,	// CLRLSLWI_rec
    2147522143U,	// CLRRDI
    2147517363U,	// CLRRDI_rec
    2147522683U,	// CLRRWI
    2147517490U,	// CLRRWI_rec
    1120516U,	// DCBFL
    1123450U,	// DCBFLP
    1126128U,	// DCBFPS
    1119041U,	// DCBFx
    1126136U,	// DCBSTPS
    33632406U,	// DCBTCT
    33631677U,	// DCBTDS
    33632414U,	// DCBTSTCT
    33631685U,	// DCBTSTDS
    1126795U,	// DCBTSTT
    1126767U,	// DCBTSTx
    1126782U,	// DCBTT
    1126538U,	// DCBTx
    16709U,	// DFLOADf32
    17130U,	// DFLOADf64
    16731U,	// DFSTOREf32
    17152U,	// DFSTOREf64
    2147522118U,	// EXTLDI
    2147517347U,	// EXTLDI_rec
    2147522668U,	// EXTLWI
    2147517481U,	// EXTLWI_rec
    2147522167U,	// EXTRDI
    2147517390U,	// EXTRDI_rec
    2147522707U,	// EXTRWI
    2147517517U,	// EXTRWI_rec
    2147522652U,	// INSLWI
    2147517472U,	// INSLWI_rec
    2147522151U,	// INSRDI
    2147517372U,	// INSRDI_rec
    2147522691U,	// INSRWI
    2147517499U,	// INSRWI_rec
    18998U,	// KILL_PAIR
    67144856U,	// LAx
    19241U,	// LIWAX
    19389U,	// LIWZX
    18450U,	// PPCLdFixedAddr
    2147522065U,	// PSUBI
    2147522302U,	// RLWIMIbm
    2147517436U,	// RLWIMIbm_rec
    2147523393U,	// RLWINMbm
    2147517602U,	// RLWINMbm_rec
    2147523410U,	// RLWNMbm
    2147517611U,	// RLWNMbm_rec
    2147522159U,	// ROTRDI
    2147517381U,	// ROTRDI_rec
    2147522699U,	// ROTRWI
    2147517508U,	// ROTRWI_rec
    2147522112U,	// SLDI
    2147517340U,	// SLDI_rec
    2147522646U,	// SLWI
    2147517465U,	// SLWI_rec
    18459U,	// SPILLTOVSR_LD
    19248U,	// SPILLTOVSR_LDX
    19226U,	// SPILLTOVSR_ST
    19366U,	// SPILLTOVSR_STX
    2147522153U,	// SRDI
    2147517374U,	// SRDI_rec
    2147522693U,	// SRWI
    2147517501U,	// SRWI_rec
    19382U,	// STIWX
    2147522066U,	// SUBI
    2147520290U,	// SUBIC
    2147516868U,	// SUBIC_rec
    2147528354U,	// SUBIS
    100708009U,	// SUBPCIS
    16720U,	// XFLOADf32
    17141U,	// XFLOADf64
    16743U,	// XFSTOREf32
    17164U,	// XFSTOREf64
    2147520522U,	// ADD4
    2147524283U,	// ADD4O
    2147517711U,	// ADD4O_rec
    2147520522U,	// ADD4TLS
    2147516951U,	// ADD4_rec
    2147520522U,	// ADD8
    2147524283U,	// ADD8O
    2147517711U,	// ADD8O_rec
    2147520522U,	// ADD8TLS
    2147520522U,	// ADD8TLS_
    2147516951U,	// ADD8_rec
    2147520244U,	// ADDC
    2147520244U,	// ADDC8
    2147524268U,	// ADDC8O
    2147517694U,	// ADDC8O_rec
    2147516835U,	// ADDC8_rec
    2147524268U,	// ADDCO
    2147517694U,	// ADDCO_rec
    2147516835U,	// ADDC_rec
    2147521196U,	// ADDE
    2147521196U,	// ADDE8
    2147524304U,	// ADDE8O
    2147517735U,	// ADDE8O_rec
    2147517114U,	// ADDE8_rec
    2147524304U,	// ADDEO
    2147517735U,	// ADDEO_rec
    2147530917U,	// ADDEX
    2147530917U,	// ADDEX8
    2147517114U,	// ADDE_rec
    2147527932U,	// ADDG6S
    2147527932U,	// ADDG6S8
    2147522094U,	// ADDI
    2147522094U,	// ADDI8
    2147520297U,	// ADDIC
    2147520297U,	// ADDIC8
    2147516876U,	// ADDIC_rec
    2147528380U,	// ADDIS
    2147528380U,	// ADDIS8
    18221U,	// ADDISdtprelHA
    16195U,	// ADDISdtprelHA32
    18204U,	// ADDISgotTprelHA
    18176U,	// ADDIStlsgdHA
    18190U,	// ADDIStlsldHA
    18164U,	// ADDIStocHA
    17732U,	// ADDIStocHA8
    18784U,	// ADDIdtprelL
    16484U,	// ADDIdtprelL32
    18747U,	// ADDItlsgdL
    16441U,	// ADDItlsgdL32
    18940U,	// ADDItlsgdLADDR
    16536U,	// ADDItlsgdLADDR32
    18759U,	// ADDItlsldL
    16455U,	// ADDItlsldL32
    18956U,	// ADDItlsldLADDR
    16554U,	// ADDItlsldLADDR32
    19471U,	// ADDItoc
    18138U,	// ADDItoc8
    18728U,	// ADDItocL
    18036U,	// ADDItocL8
    37615U,	// ADDME
    37615U,	// ADDME8
    40679U,	// ADDME8O
    34113U,	// ADDME8O_rec
    33498U,	// ADDME8_rec
    40679U,	// ADDMEO
    34113U,	// ADDMEO_rec
    33498U,	// ADDME_rec
    44722U,	// ADDPCIS
    37682U,	// ADDZE
    37682U,	// ADDZE8
    40704U,	// ADDZE8O
    34141U,	// ADDZE8O_rec
    33547U,	// ADDZE8_rec
    40704U,	// ADDZEO
    34141U,	// ADDZEO_rec
    33547U,	// ADDZE_rec
    101156U,	// ADJCALLSTACKDOWN
    101175U,	// ADJCALLSTACKUP
    2147520777U,	// AND
    2147520777U,	// AND8
    2147517020U,	// AND8_rec
    2147520253U,	// ANDC
    2147520253U,	// ANDC8
    2147516842U,	// ANDC8_rec
    2147516842U,	// ANDC_rec
    2147517356U,	// ANDI8_rec
    2147518431U,	// ANDIS8_rec
    2147518431U,	// ANDIS_rec
    2147517356U,	// ANDI_rec
    19125U,	// ANDI_rec_1_EQ_BIT
    18076U,	// ANDI_rec_1_EQ_BIT8
    19144U,	// ANDI_rec_1_GT_BIT
    18096U,	// ANDI_rec_1_GT_BIT8
    2147517020U,	// AND_rec
    136350323U,	// ATOMIC_CMP_SWAP_I16
    136350169U,	// ATOMIC_CMP_SWAP_I32
    16879U,	// ATOMIC_CMP_SWAP_I64
    17926U,	// ATOMIC_CMP_SWAP_I8
    17352U,	// ATOMIC_LOAD_ADD_I16
    16233U,	// ATOMIC_LOAD_ADD_I32
    16776U,	// ATOMIC_LOAD_ADD_I64
    17824U,	// ATOMIC_LOAD_ADD_I8
    17395U,	// ATOMIC_LOAD_AND_I16
    16276U,	// ATOMIC_LOAD_AND_I32
    17176U,	// ATOMIC_LOAD_AND_I64
    17865U,	// ATOMIC_LOAD_AND_I8
    17539U,	// ATOMIC_LOAD_MAX_I16
    16420U,	// ATOMIC_LOAD_MAX_I32
    16963U,	// ATOMIC_LOAD_MAX_I64
    18016U,	// ATOMIC_LOAD_MAX_I8
    17438U,	// ATOMIC_LOAD_MIN_I16
    16319U,	// ATOMIC_LOAD_MIN_I32
    16841U,	// ATOMIC_LOAD_MIN_I64
    17906U,	// ATOMIC_LOAD_MIN_I8
    17373U,	// ATOMIC_LOAD_NAND_I16
    16254U,	// ATOMIC_LOAD_NAND_I32
    16797U,	// ATOMIC_LOAD_NAND_I64
    17844U,	// ATOMIC_LOAD_NAND_I8
    17497U,	// ATOMIC_LOAD_OR_I16
    16378U,	// ATOMIC_LOAD_OR_I32
    16921U,	// ATOMIC_LOAD_OR_I64
    17965U,	// ATOMIC_LOAD_OR_I8
    17331U,	// ATOMIC_LOAD_SUB_I16
    16212U,	// ATOMIC_LOAD_SUB_I32
    16755U,	// ATOMIC_LOAD_SUB_I64
    17790U,	// ATOMIC_LOAD_SUB_I8
    17517U,	// ATOMIC_LOAD_UMAX_I16
    16398U,	// ATOMIC_LOAD_UMAX_I32
    16941U,	// ATOMIC_LOAD_UMAX_I64
    17995U,	// ATOMIC_LOAD_UMAX_I8
    17416U,	// ATOMIC_LOAD_UMIN_I16
    16297U,	// ATOMIC_LOAD_UMIN_I32
    16819U,	// ATOMIC_LOAD_UMIN_I64
    17885U,	// ATOMIC_LOAD_UMIN_I8
    17476U,	// ATOMIC_LOAD_XOR_I16
    16357U,	// ATOMIC_LOAD_XOR_I32
    16900U,	// ATOMIC_LOAD_XOR_I64
    17946U,	// ATOMIC_LOAD_XOR_I8
    17459U,	// ATOMIC_SWAP_I16
    16340U,	// ATOMIC_SWAP_I32
    16862U,	// ATOMIC_SWAP_I64
    18148U,	// ATOMIC_SWAP_I8
    19599U,	// ATTN
    1182947U,	// B
    1215441U,	// BA
    167805047U,	// BC
    3361759U,	// BCC
    4410335U,	// BCCA
    5458911U,	// BCCCTR
    5458911U,	// BCCCTR8
    6507487U,	// BCCCTRL
    6507487U,	// BCCCTRL8
    7556063U,	// BCCL
    8604639U,	// BCCLA
    9653215U,	// BCCLR
    10701791U,	// BCCLRL
    11567273U,	// BCCTR
    11567273U,	// BCCTR8
    11567339U,	// BCCTR8n
    11567251U,	// BCCTRL
    11567251U,	// BCCTRL8
    11567319U,	// BCCTRL8n
    11567319U,	// BCCTRLn
    11567339U,	// BCCTRn
    2147516948U,	// BCDADD_rec
    2147517619U,	// BCDCFN_rec
    2147518145U,	// BCDCFSQ_rec
    2147518835U,	// BCDCFZ_rec
    2147517628U,	// BCDCPSGN_rec
    34028U,	// BCDCTN_rec
    34507U,	// BCDCTSQ_rec
    2147518851U,	// BCDCTZ_rec
    2147517648U,	// BCDSETSGN_rec
    2147518307U,	// BCDSR_rec
    2147516780U,	// BCDSUB_rec
    2147518363U,	// BCDS_rec
    2147516892U,	// BCDTRUNC_rec
    2147518456U,	// BCDUS_rec
    2147516903U,	// BCDUTRUNC_rec
    167805055U,	// BCL
    11567263U,	// BCLR
    11567240U,	// BCLRL
    11567309U,	// BCLRLn
    11567330U,	// BCLRn
    1179725U,	// BCLalways
    167805125U,	// BCLn
    19680U,	// BCTR
    19680U,	// BCTR8
    19593U,	// BCTRL
    19593U,	// BCTRL8
    229466U,	// BCTRL8_LDinto_toc
    229466U,	// BCTRL8_LDinto_toc_RM
    19593U,	// BCTRL8_RM
    229480U,	// BCTRL_LWZinto_toc
    229480U,	// BCTRL_LWZinto_toc_RM
    19593U,	// BCTRL_RM
    167805118U,	// BCn
    1195475U,	// BDNZ
    1195475U,	// BDNZ8
    1215704U,	// BDNZA
    1212697U,	// BDNZAm
    1212457U,	// BDNZAp
    1186266U,	// BDNZL
    1215662U,	// BDNZLA
    1212681U,	// BDNZLAm
    1212441U,	// BDNZLAp
    19673U,	// BDNZLR
    19673U,	// BDNZLR8
    19585U,	// BDNZLRL
    15989U,	// BDNZLRLm
    15946U,	// BDNZLRLp
    16005U,	// BDNZLRm
    15962U,	// BDNZLRp
    1179944U,	// BDNZLm
    1179704U,	// BDNZLp
    1179958U,	// BDNZm
    1179718U,	// BDNZp
    1195321U,	// BDZ
    1195321U,	// BDZ8
    1215698U,	// BDZA
    1212690U,	// BDZAm
    1212450U,	// BDZAp
    1186260U,	// BDZL
    1215655U,	// BDZLA
    1212673U,	// BDZLAm
    1212433U,	// BDZLAp
    19667U,	// BDZLR
    19667U,	// BDZLR8
    19578U,	// BDZLRL
    15981U,	// BDZLRLm
    15938U,	// BDZLRLp
    15998U,	// BDZLRm
    15955U,	// BDZLRp
    1179937U,	// BDZLm
    1179697U,	// BDZLp
    1179952U,	// BDZm
    1179712U,	// BDZp
    1185995U,	// BL
    1185995U,	// BL8
    12720331U,	// BL8_NOP
    12720331U,	// BL8_NOP_RM
    12851403U,	// BL8_NOP_TLS
    1185995U,	// BL8_NOTOC
    1185995U,	// BL8_NOTOC_RM
    1317067U,	// BL8_NOTOC_TLS
    1185995U,	// BL8_RM
    1317067U,	// BL8_TLS
    1317067U,	// BL8_TLS_
    1215639U,	// BLA
    1215639U,	// BLA8
    12749975U,	// BLA8_NOP
    12749975U,	// BLA8_NOP_RM
    1215639U,	// BLA8_RM
    1215639U,	// BLA_RM
    19663U,	// BLR
    19663U,	// BLR8
    19573U,	// BLRL
    12720331U,	// BL_NOP
    12720331U,	// BL_NOP_RM
    1185995U,	// BL_RM
    1317067U,	// BL_TLS
    2147520757U,	// BPERMD
    37204U,	// BRD
    38086U,	// BRH
    38086U,	// BRH8
    2147520365U,	// BRINC
    46595U,	// BRW
    46595U,	// BRW8
    37344U,	// CBCDTD
    37344U,	// CBCDTD8
    36863U,	// CDTBCD
    36863U,	// CDTBCD8
    2147520620U,	// CFUGED
    19417U,	// CLRBHRB
    2147519877U,	// CMPB
    2147519877U,	// CMPB8
    2147520844U,	// CMPD
    2147522136U,	// CMPDI
    2147519883U,	// CMPEQB
    2147520728U,	// CMPLD
    2147522100U,	// CMPLDI
    2147529971U,	// CMPLW
    2147522626U,	// CMPLWI
    2348846483U,	// CMPRB
    2348846483U,	// CMPRB8
    2147530235U,	// CMPW
    2147522676U,	// CMPWI
    37508U,	// CNTLZD
    2147523214U,	// CNTLZDM
    33448U,	// CNTLZD_rec
    46984U,	// CNTLZW
    46984U,	// CNTLZW8
    35071U,	// CNTLZW8_rec
    35071U,	// CNTLZW_rec
    37523U,	// CNTTZD
    2147523231U,	// CNTTZDM
    33457U,	// CNTTZD_rec
    46999U,	// CNTTZW
    46999U,	// CNTTZW8
    35080U,	// CNTTZW8_rec
    35080U,	// CNTTZW_rec
    19685U,	// CP_ABORT
    48410U,	// CP_COPY
    48410U,	// CP_COPY8
    2147517179U,	// CP_PASTE8_rec
    2147517179U,	// CP_PASTE_rec
    17290U,	// CR6SET
    17276U,	// CR6UNSET
    2147520807U,	// CRAND
    2147520259U,	// CRANDC
    2147529417U,	// CREQV
    2147520791U,	// CRNAND
    2147527786U,	// CRNOR
    45354U,	// CRNOT
    2147527800U,	// CROR
    2147520386U,	// CRORC
    2382410441U,	// CRSET
    2382408861U,	// CRUNSET
    2147527837U,	// CRXOR
    3361759U,	// CTRL_DEP
    2147520521U,	// DADD
    2147527068U,	// DADDQ
    2147518048U,	// DADDQ_rec
    2147516950U,	// DADD_rec
    268476043U,	// DARN
    1117135U,	// DCBA
    13931329U,	// DCBF
    1123172U,	// DCBFEP
    1119733U,	// DCBI
    1126747U,	// DCBST
    1123213U,	// DCBSTEP
    14987402U,	// DCBT
    336773U,	// DCBTEP
    14987631U,	// DCBTST
    336790U,	// DCBTSTEP
    1129760U,	// DCBZ
    1123232U,	// DCBZEP
    1120717U,	// DCBZL
    1123196U,	// DCBZLEP
    38424U,	// DCCCI
    47452U,	// DCFFIX
    43888U,	// DCFFIXQ
    43634U,	// DCFFIXQQ
    34574U,	// DCFFIXQ_rec
    35143U,	// DCFFIX_rec
    2147524463U,	// DCMPO
    2147527259U,	// DCMPOQ
    2147529247U,	// DCMPU
    2147527462U,	// DCMPUQ
    41669U,	// DCTDP
    34254U,	// DCTDP_rec
    47460U,	// DCTFIX
    43897U,	// DCTFIXQ
    43644U,	// DCTFIXQQ
    34584U,	// DCTFIXQ_rec
    35152U,	// DCTFIX_rec
    43626U,	// DCTQPQ
    34488U,	// DCTQPQ_rec
    364860U,	// DDEDPD
    371115U,	// DDEDPDQ
    362097U,	// DDEDPDQ_rec
    361073U,	// DDEDPD_rec
    2147529367U,	// DDIV
    2147527506U,	// DDIVQ
    2147518198U,	// DDIVQ_rec
    2147518587U,	// DDIV_rec
    1445879U,	// DENBCD
    1452435U,	// DENBCDQ
    1443414U,	// DENBCDQ_rec
    1442315U,	// DENBCD_rec
    2147530943U,	// DIEX
    2147527513U,	// DIEXQ
    2147518206U,	// DIEXQ_rec
    2147518777U,	// DIEX_rec
    2147521143U,	// DIVD
    2147521202U,	// DIVDE
    2147524311U,	// DIVDEO
    2147517743U,	// DIVDEO_rec
    2147529207U,	// DIVDEU
    2147524588U,	// DIVDEUO
    2147517832U,	// DIVDEUO_rec
    2147518543U,	// DIVDEU_rec
    2147517121U,	// DIVDE_rec
    2147524297U,	// DIVDO
    2147517727U,	// DIVDO_rec
    2147529200U,	// DIVDU
    2147524580U,	// DIVDUO
    2147517823U,	// DIVDUO_rec
    2147518535U,	// DIVDU_rec
    2147517089U,	// DIVD_rec
    2147530607U,	// DIVW
    2147521314U,	// DIVWE
    2147524344U,	// DIVWEO
    2147517780U,	// DIVWEO_rec
    2147529215U,	// DIVWEU
    2147524597U,	// DIVWEUO
    2147517842U,	// DIVWEUO_rec
    2147518552U,	// DIVWEU_rec
    2147517187U,	// DIVWE_rec
    2147524622U,	// DIVWO
    2147517870U,	// DIVWO_rec
    2147529326U,	// DIVWU
    2147524606U,	// DIVWUO
    2147517852U,	// DIVWUO_rec
    2147518579U,	// DIVWU_rec
    2147518701U,	// DIVW_rec
    44086U,	// DMMR
    1097199U,	// DMSETDMRZ
    2449511633U,	// DMSHA2HASH
    33592541U,	// DMSHA3HASH
    2147522956U,	// DMUL
    2147527234U,	// DMULQ
    2147518110U,	// DMULQ_rec
    2147517570U,	// DMUL_rec
    302034060U,	// DMXOR
    2147519033U,	// DMXVBF16GERX2
    2449513929U,	// DMXVBF16GERX2NN
    2449515683U,	// DMXVBF16GERX2NP
    2449514025U,	// DMXVBF16GERX2PN
    2449515794U,	// DMXVBF16GERX2PP
    2147519050U,	// DMXVF16GERX2
    2449513948U,	// DMXVF16GERX2NN
    2449515702U,	// DMXVF16GERX2NP
    2449514044U,	// DMXVF16GERX2PN
    2449515813U,	// DMXVF16GERX2PP
    2147519078U,	// DMXVI8GERX4
    2449515845U,	// DMXVI8GERX4PP
    2449515935U,	// DMXVI8GERX4SPP
    2147519157U,	// DMXXEXTFDMR256
    2147518905U,	// DMXXEXTFDMR512
    2147518905U,	// DMXXEXTFDMR512_HI
    2147519173U,	// DMXXINSTDMR256
    2147518921U,	// DMXXINSTDMR512
    2147518921U,	// DMXXINSTDMR512_HI
    1097004U,	// DMXXSETACCZ
    2449510347U,	// DMXXSHAPAD
    2147519677U,	// DQUA
    431598U,	// DQUAI
    436749U,	// DQUAIQ
    427643U,	// DQUAIQ_rec
    426864U,	// DQUAI_rec
    2147527027U,	// DQUAQ
    2147518022U,	// DQUAQ_rec
    2147516733U,	// DQUA_rec
    43619U,	// DRDPQ
    34480U,	// DRDPQ_rec
    335945380U,	// DRINTN
    335948370U,	// DRINTNQ
    335939238U,	// DRINTNQ_rec
    335938805U,	// DRINTN_rec
    335952905U,	// DRINTX
    335948674U,	// DRINTXQ
    335939362U,	// DRINTXQ_rec
    335939937U,	// DRINTX_rec
    2147520821U,	// DRRND
    2147527075U,	// DRRNDQ
    2147518056U,	// DRRNDQ_rec
    2147517033U,	// DRRND_rec
    43173U,	// DRSP
    34348U,	// DRSP_rec
    2147522247U,	// DSCLI
    2147527199U,	// DSCLIQ
    2147518084U,	// DSCLIQ_rec
    2147517408U,	// DSCLI_rec
    2147522475U,	// DSCRI
    2147527207U,	// DSCRIQ
    2147518093U,	// DSCRIQ_rec
    2147517445U,	// DSCRI_rec
    1519365U,	// DSS
    19566U,	// DSSALL
    2449977698U,	// DST
    2449977698U,	// DST64
    2449977719U,	// DSTST
    2449977719U,	// DSTST64
    2449977748U,	// DSTSTT
    2449977748U,	// DSTSTT64
    2449977733U,	// DSTT
    2449977733U,	// DSTT64
    2147520102U,	// DSUB
    2147527034U,	// DSUBQ
    2147518030U,	// DSUBQ_rec
    2147516782U,	// DSUB_rec
    2147520275U,	// DTSTDC
    2147527050U,	// DTSTDCQ
    2147521581U,	// DTSTDG
    2147527172U,	// DTSTDGQ
    2147530949U,	// DTSTEX
    2147527520U,	// DTSTEXQ
    2147521527U,	// DTSTSF
    369137300U,	// DTSTSFI
    369142293U,	// DTSTSFIQ
    2147527163U,	// DTSTSFQ
    47319U,	// DXEX
    43881U,	// DXEXQ
    34566U,	// DXEXQ_rec
    35136U,	// DXEX_rec
    18320U,	// DYNALLOC
    17745U,	// DYNALLOC8
    19082U,	// DYNAREAOFFSET
    18060U,	// DYNAREAOFFSET8
    19623U,	// DecreaseCTR8loop
    19641U,	// DecreaseCTRloop
    44292U,	// EFDABS
    2147520519U,	// EFDADD
    44583U,	// EFDCFS
    37777U,	// EFDCFSF
    38840U,	// EFDCFSI
    37030U,	// EFDCFSID
    37887U,	// EFDCFUF
    38906U,	// EFDCFUI
    37047U,	// EFDCFUID
    2147527092U,	// EFDCMPEQ
    2147528872U,	// EFDCMPGT
    2147528940U,	// EFDCMPLT
    37851U,	// EFDCTSF
    38868U,	// EFDCTSI
    48446U,	// EFDCTSIDZ
    48544U,	// EFDCTSIZ
    37915U,	// EFDCTUF
    38934U,	// EFDCTUI
    48465U,	// EFDCTUIDZ
    48575U,	// EFDCTUIZ
    2147529365U,	// EFDDIV
    2147522954U,	// EFDMUL
    44306U,	// EFDNABS
    37949U,	// EFDNEG
    2147520100U,	// EFDSUB
    2147527132U,	// EFDTSTEQ
    2147528903U,	// EFDTSTGT
    2147528971U,	// EFDTSTLT
    44341U,	// EFSABS
    2147520578U,	// EFSADD
    36980U,	// EFSCFD
    37786U,	// EFSCFSF
    38849U,	// EFSCFSI
    37896U,	// EFSCFUF
    38915U,	// EFSCFUI
    2147527102U,	// EFSCMPEQ
    2147528882U,	// EFSCMPGT
    2147528950U,	// EFSCMPLT
    37860U,	// EFSCTSF
    38877U,	// EFSCTSI
    48554U,	// EFSCTSIZ
    37924U,	// EFSCTUF
    38943U,	// EFSCTUI
    48585U,	// EFSCTUIZ
    2147529379U,	// EFSDIV
    2147522978U,	// EFSMUL
    44322U,	// EFSNABS
    37963U,	// EFSNEG
    2147520129U,	// EFSSUB
    2147527142U,	// EFSTSTEQ
    2147528913U,	// EFSTSTGT
    2147528981U,	// EFSTSTLT
    16499U,	// EH_SjLj_LongJmp32
    16984U,	// EH_SjLj_LongJmp64
    16518U,	// EH_SjLj_SetJmp32
    17003U,	// EH_SjLj_SetJmp64
    1179649U,	// EH_SjLj_Setup
    2147529412U,	// EQV
    2147529412U,	// EQV8
    2147518601U,	// EQV8_rec
    2147518601U,	// EQV_rec
    44358U,	// EVABS
    2181084353U,	// EVADDIW
    45874U,	// EVADDSMIAAW
    46006U,	// EVADDSSIAAW
    45940U,	// EVADDUMIAAW
    46072U,	// EVADDUSIAAW
    2147529823U,	// EVADDW
    2147520814U,	// EVAND
    2147520267U,	// EVANDC
    2147527123U,	// EVCMPEQ
    2147528476U,	// EVCMPGTS
    2147529274U,	// EVCMPGTU
    2147528486U,	// EVCMPLTS
    2147529284U,	// EVCMPLTU
    46678U,	// EVCNTLSW
    46982U,	// EVCNTLZW
    2147528654U,	// EVDIVWS
    2147529324U,	// EVDIVWU
    2147529424U,	// EVEQV
    36336U,	// EVEXTSB
    38203U,	// EVEXTSH
    44349U,	// EVFSABS
    2147520586U,	// EVFSADD
    37795U,	// EVFSCFSF
    38858U,	// EVFSCFSI
    37905U,	// EVFSCFUF
    38924U,	// EVFSCFUI
    2147527112U,	// EVFSCMPEQ
    2147528892U,	// EVFSCMPGT
    2147528960U,	// EVFSCMPLT
    37869U,	// EVFSCTSF
    38886U,	// EVFSCTSI
    48564U,	// EVFSCTSIZ
    37869U,	// EVFSCTUF
    38952U,	// EVFSCTUI
    48564U,	// EVFSCTUIZ
    2147529387U,	// EVFSDIV
    2147522986U,	// EVFSMUL
    44331U,	// EVFSNABS
    37971U,	// EVFSNEG
    2147520137U,	// EVFSSUB
    2147527152U,	// EVFSTSTEQ
    2147528923U,	// EVFSTSTGT
    2147528991U,	// EVFSTSTLT
    67145811U,	// EVLDD
    134264924U,	// EVLDDX
    67146867U,	// EVLDH
    134265053U,	// EVLDHX
    67155047U,	// EVLDW
    134266013U,	// EVLDWX
    67153980U,	// EVLHHESPLAT
    134265795U,	// EVLHHESPLATX
    67154005U,	// EVLHHOSSPLAT
    134265822U,	// EVLHHOSSPLATX
    67154019U,	// EVLHHOUSPLAT
    134265837U,	// EVLHHOUSPLATX
    67146448U,	// EVLWHE
    134265004U,	// EVLWHEX
    67153639U,	// EVLWHOS
    134265777U,	// EVLWHOSX
    67154454U,	// EVLWHOU
    134265936U,	// EVLWHOUX
    67153993U,	// EVLWHSPLAT
    134265809U,	// EVLWHSPLATX
    67154033U,	// EVLWWSPLAT
    134265852U,	// EVLWWSPLATX
    2147522216U,	// EVMERGEHI
    2147524433U,	// EVMERGEHILO
    2147524422U,	// EVMERGELO
    2147522227U,	// EVMERGELOHI
    2147519317U,	// EVMHEGSMFAA
    2147523829U,	// EVMHEGSMFAN
    2147519365U,	// EVMHEGSMIAA
    2147523877U,	// EVMHEGSMIAN
    2147519402U,	// EVMHEGUMIAA
    2147523914U,	// EVMHEGUMIAN
    2147521357U,	// EVMHESMF
    2147519450U,	// EVMHESMFA
    2147529470U,	// EVMHESMFAAW
    2147530019U,	// EVMHESMFANW
    2147522318U,	// EVMHESMI
    2147519542U,	// EVMHESMIA
    2147529535U,	// EVMHESMIAAW
    2147530071U,	// EVMHESMIANW
    2147521460U,	// EVMHESSF
    2147519493U,	// EVMHESSFA
    2147529496U,	// EVMHESSFAAW
    2147530045U,	// EVMHESSFANW
    2147529667U,	// EVMHESSIAAW
    2147530149U,	// EVMHESSIANW
    2147522357U,	// EVMHEUMI
    2147519585U,	// EVMHEUMIA
    2147529601U,	// EVMHEUMIAAW
    2147530110U,	// EVMHEUMIANW
    2147529733U,	// EVMHEUSIAAW
    2147530188U,	// EVMHEUSIANW
    2147519330U,	// EVMHOGSMFAA
    2147523842U,	// EVMHOGSMFAN
    2147519378U,	// EVMHOGSMIAA
    2147523890U,	// EVMHOGSMIAN
    2147519415U,	// EVMHOGUMIAA
    2147523927U,	// EVMHOGUMIAN
    2147521377U,	// EVMHOSMF
    2147519472U,	// EVMHOSMFA
    2147529483U,	// EVMHOSMFAAW
    2147530032U,	// EVMHOSMFANW
    2147522338U,	// EVMHOSMI
    2147519564U,	// EVMHOSMIA
    2147529575U,	// EVMHOSMIAAW
    2147530097U,	// EVMHOSMIANW
    2147521480U,	// EVMHOSSF
    2147519515U,	// EVMHOSSFA
    2147529509U,	// EVMHOSSFAAW
    2147530058U,	// EVMHOSSFANW
    2147529707U,	// EVMHOSSIAAW
    2147530175U,	// EVMHOSSIANW
    2147522387U,	// EVMHOUMI
    2147519618U,	// EVMHOUMIA
    2147529641U,	// EVMHOUMIAAW
    2147530136U,	// EVMHOUMIANW
    2147529773U,	// EVMHOUSIAAW
    2147530214U,	// EVMHOUSIANW
    36022U,	// EVMRA
    2147521367U,	// EVMWHSMF
    2147519461U,	// EVMWHSMFA
    2147522328U,	// EVMWHSMI
    2147519553U,	// EVMWHSMIA
    2147521470U,	// EVMWHSSF
    2147519504U,	// EVMWHSSFA
    2147522367U,	// EVMWHUMI
    2147519596U,	// EVMWHUMIA
    2147529562U,	// EVMWLSMIAAW
    2147530084U,	// EVMWLSMIANW
    2147529694U,	// EVMWLSSIAAW
    2147530162U,	// EVMWLSSIANW
    2147522377U,	// EVMWLUMI
    2147519607U,	// EVMWLUMIA
    2147529628U,	// EVMWLUMIAAW
    2147530123U,	// EVMWLUMIANW
    2147529760U,	// EVMWLUSIAAW
    2147530201U,	// EVMWLUSIANW
    2147521387U,	// EVMWSMF
    2147519483U,	// EVMWSMFA
    2147519343U,	// EVMWSMFAA
    2147523855U,	// EVMWSMFAN
    2147522348U,	// EVMWSMI
    2147519575U,	// EVMWSMIA
    2147519391U,	// EVMWSMIAA
    2147523903U,	// EVMWSMIAN
    2147521490U,	// EVMWSSF
    2147519526U,	// EVMWSSFA
    2147519354U,	// EVMWSSFAA
    2147523866U,	// EVMWSSFAN
    2147522397U,	// EVMWUMI
    2147519629U,	// EVMWUMIA
    2147519428U,	// EVMWUMIAA
    2147523940U,	// EVMWUMIAN
    2147520799U,	// EVNAND
    37980U,	// EVNEG
    2147527793U,	// EVNOR
    2147527806U,	// EVOR
    2147520393U,	// EVORC
    2147529978U,	// EVRLW
    2147522634U,	// EVRLWI
    46190U,	// EVRNDW
    15777378U,	// EVSEL
    2147529992U,	// EVSLW
    2147522660U,	// EVSLWI
    402691741U,	// EVSPLATFI
    402692080U,	// EVSPLATI
    2147528399U,	// EVSRWIS
    2147529229U,	// EVSRWIU
    2147528582U,	// EVSRWS
    2147529310U,	// EVSRWU
    67145827U,	// EVSTDD
    134264932U,	// EVSTDDX
    67146874U,	// EVSTDH
    134265061U,	// EVSTDHX
    67155062U,	// EVSTDW
    134266021U,	// EVSTDWX
    67146456U,	// EVSTWHE
    134265013U,	// EVSTWHEX
    67149598U,	// EVSTWHO
    134265372U,	// EVSTWHOX
    67146537U,	// EVSTWWE
    134265037U,	// EVSTWWEX
    67149845U,	// EVSTWWO
    134265382U,	// EVSTWWOX
    45900U,	// EVSUBFSMIAAW
    46032U,	// EVSUBFSSIAAW
    45966U,	// EVSUBFUMIAAW
    46098U,	// EVSUBFUSIAAW
    2147529871U,	// EVSUBFW
    2583737496U,	// EVSUBIFW
    2147527844U,	// EVXOR
    36338U,	// EXTSB
    36338U,	// EXTSB8
    36338U,	// EXTSB8_32_64
    33113U,	// EXTSB8_rec
    33113U,	// EXTSB_rec
    38205U,	// EXTSH
    38205U,	// EXTSH8
    38205U,	// EXTSH8_32_64
    33607U,	// EXTSH8_rec
    33607U,	// EXTSH_rec
    46722U,	// EXTSW
    2147522266U,	// EXTSWSLI
    2147522266U,	// EXTSWSLI_32_64
    2147517416U,	// EXTSWSLI_32_64_rec
    2147517416U,	// EXTSWSLI_rec
    46722U,	// EXTSW_32
    46722U,	// EXTSW_32_64
    35023U,	// EXTSW_32_64_rec
    35023U,	// EXTSW_rec
    19604U,	// EnforceIEIO
    44300U,	// FABSD
    34673U,	// FABSD_rec
    44300U,	// FABSS
    34673U,	// FABSS_rec
    2147520527U,	// FADD
    2147528093U,	// FADDS
    2147518370U,	// FADDS_rec
    2147516957U,	// FADD_rec
    0U,	// FADDrtz
    37023U,	// FCFID
    44469U,	// FCFIDS
    34749U,	// FCFIDS_rec
    45525U,	// FCFIDU
    44856U,	// FCFIDUS
    34816U,	// FCFIDUS_rec
    34869U,	// FCFIDU_rec
    33341U,	// FCFID_rec
    2147524470U,	// FCMPOD
    2147524470U,	// FCMPOS
    2147529254U,	// FCMPUD
    2147529254U,	// FCMPUS
    2147523951U,	// FCPSGND
    2147517639U,	// FCPSGND_rec
    2147523951U,	// FCPSGNS
    2147517639U,	// FCPSGNS_rec
    37040U,	// FCTID
    45533U,	// FCTIDU
    48634U,	// FCTIDUZ
    35212U,	// FCTIDUZ_rec
    34878U,	// FCTIDU_rec
    48457U,	// FCTIDZ
    35178U,	// FCTIDZ_rec
    33349U,	// FCTID_rec
    46282U,	// FCTIW
    45654U,	// FCTIWU
    48643U,	// FCTIWUZ
    35222U,	// FCTIWUZ_rec
    34922U,	// FCTIWU_rec
    48652U,	// FCTIWZ
    35232U,	// FCTIWZ_rec
    34984U,	// FCTIW_rec
    2147529373U,	// FDIV
    2147528575U,	// FDIVS
    2147518483U,	// FDIVS_rec
    2147518594U,	// FDIV_rec
    18574U,	// FENCE
    2147520548U,	// FMADD
    2147528100U,	// FMADDS
    2147518378U,	// FMADDS_rec
    2147516964U,	// FMADD_rec
    44081U,	// FMR
    34641U,	// FMR_rec
    2147520114U,	// FMSUB
    2147528076U,	// FMSUBS
    2147518344U,	// FMSUBS_rec
    2147516796U,	// FMSUB_rec
    2147522962U,	// FMUL
    2147528416U,	// FMULS
    2147518439U,	// FMULS_rec
    2147517577U,	// FMUL_rec
    44315U,	// FNABSD
    34680U,	// FNABSD_rec
    44315U,	// FNABSS
    34680U,	// FNABSS_rec
    37957U,	// FNEGD
    33579U,	// FNEGD_rec
    37957U,	// FNEGS
    33579U,	// FNEGS_rec
    2147520555U,	// FNMADD
    2147528108U,	// FNMADDS
    2147518387U,	// FNMADDS_rec
    2147516972U,	// FNMADD_rec
    2147520121U,	// FNMSUB
    2147528084U,	// FNMSUBS
    2147518353U,	// FNMSUBS_rec
    2147516804U,	// FNMSUB_rec
    37637U,	// FRE
    44567U,	// FRES
    34758U,	// FRES_rec
    33515U,	// FRE_rec
    39731U,	// FRIMD
    33947U,	// FRIMD_rec
    39731U,	// FRIMS
    33947U,	// FRIMS_rec
    40328U,	// FRIND
    34021U,	// FRIND_rec
    40328U,	// FRINS
    34021U,	// FRINS_rec
    42077U,	// FRIPD
    34317U,	// FRIPD_rec
    42077U,	// FRIPS
    34317U,	// FRIPS_rec
    48538U,	// FRIZD
    35196U,	// FRIZD_rec
    48538U,	// FRIZS
    35196U,	// FRIZS_rec
    43179U,	// FRSP
    34355U,	// FRSP_rec
    37650U,	// FRSQRTE
    44573U,	// FRSQRTES
    34765U,	// FRSQRTES_rec
    33521U,	// FRSQRTE_rec
    2147522795U,	// FSELD
    2147517553U,	// FSELD_rec
    2147522795U,	// FSELS
    2147517553U,	// FSELS_rec
    45361U,	// FSQRT
    44848U,	// FSQRTS
    34799U,	// FSQRTS_rec
    34852U,	// FSQRT_rec
    2147520108U,	// FSUB
    2147528069U,	// FSUBS
    2147518336U,	// FSUBS_rec
    2147516789U,	// FSUB_rec
    2147529396U,	// FTDIV
    45368U,	// FTSQRT
    18986U,	// GETtlsADDR
    16587U,	// GETtlsADDR32
    19279U,	// GETtlsADDR32AIX
    19330U,	// GETtlsADDR64AIX
    18703U,	// GETtlsADDRPCREL
    19264U,	// GETtlsMOD32AIX
    19315U,	// GETtlsMOD64AIX
    19295U,	// GETtlsTpointer32AIX
    18972U,	// GETtlsldADDR
    16572U,	// GETtlsldADDR32
    18684U,	// GETtlsldADDRPCREL
    469801141U,	// HASHCHK
    469801141U,	// HASHCHK8
    469804131U,	// HASHCHKP
    469804131U,	// HASHCHKP8
    469807463U,	// HASHST
    469807463U,	// HASHST8
    469805377U,	// HASHSTP
    469805377U,	// HASHSTP8
    19488U,	// HRFID
    1119739U,	// ICBI
    1123180U,	// ICBIEP
    528218U,	// ICBLC
    525974U,	// ICBLQ
    536720U,	// ICBT
    536280U,	// ICBTLS
    38431U,	// ICCCI
    2147522801U,	// ISEL
    2147522801U,	// ISEL8
    19452U,	// ISYNC
    503352472U,	// LA
    503352472U,	// LA8
    134265511U,	// LBARX
    2281749159U,	// LBARXL
    134265392U,	// LBEPX
    67157287U,	// LBZ
    67157287U,	// LBZ8
    2147531076U,	// LBZCIX
    536916597U,	// LBZU
    536916597U,	// LBZU8
    570473584U,	// LBZUX
    570473584U,	// LBZUX8
    134266094U,	// LBZX
    134266094U,	// LBZX8
    2147532014U,	// LBZXTLS
    2147532014U,	// LBZXTLS_
    2147532014U,	// LBZXTLS_32
    67145924U,	// LD
    134265518U,	// LDARX
    2281749166U,	// LDARXL
    2449518639U,	// LDAT
    18805U,	// LDAT_PSEUDO
    134265546U,	// LDBRX
    2147531045U,	// LDCIX
    536916453U,	// LDU
    570473525U,	// LDUX
    134264954U,	// LDX
    2147530874U,	// LDXTLS
    2147530874U,	// LDXTLS_
    18771U,	// LDgotTprelL
    16469U,	// LDgotTprelL32
    19464U,	// LDtoc
    19186U,	// LDtocBA
    19186U,	// LDtocCPT
    18664U,	// LDtocJTI
    18720U,	// LDtocL
    67145853U,	// LFD
    134265407U,	// LFDEPX
    536916407U,	// LFDU
    570473510U,	// LFDUX
    134264941U,	// LFDX
    2147530861U,	// LFDXTLS
    2147530861U,	// LFDXTLS_
    134264841U,	// LFIWAX
    134266115U,	// LFIWZX
    67153462U,	// LFS
    536916525U,	// LFSU
    570473562U,	// LFSUX
    134265764U,	// LFSX
    2147531684U,	// LFSXTLS
    2147531684U,	// LFSXTLS_
    67144753U,	// LHA
    67144753U,	// LHA8
    134265525U,	// LHARX
    2281749173U,	// LHARXL
    536916395U,	// LHAU
    536916395U,	// LHAU8
    570473489U,	// LHAUX
    570473489U,	// LHAUX8
    134264826U,	// LHAX
    134264826U,	// LHAX8
    2147530746U,	// LHAXTLS
    2147530746U,	// LHAXTLS_
    2147530746U,	// LHAXTLS_32
    134265561U,	// LHBRX
    134265561U,	// LHBRX8
    134265424U,	// LHEPX
    67157363U,	// LHZ
    67157363U,	// LHZ8
    2147531084U,	// LHZCIX
    536916603U,	// LHZU
    536916603U,	// LHZU8
    570473591U,	// LHZUX
    570473591U,	// LHZUX8
    134266109U,	// LHZX
    134266109U,	// LHZX8
    2147532029U,	// LHZXTLS
    2147532029U,	// LHZXTLS_
    2147532029U,	// LHZXTLS_32
    100701891U,	// LI
    100701891U,	// LI8
    100708035U,	// LIS
    100708035U,	// LIS8
    67155215U,	// LMW
    67152440U,	// LQ
    134265532U,	// LQARX
    2281749180U,	// LQARXL
    18831U,	// LQX_PSEUDO
    2147522715U,	// LSWI
    134264864U,	// LVEBX
    134265070U,	// LVEHX
    134266030U,	// LVEWX
    134257028U,	// LVSL
    134261971U,	// LVSR
    134265989U,	// LVX
    134257088U,	// LVXL
    67144900U,	// LWA
    134265539U,	// LWARX
    2281749187U,	// LWARXL
    2449518717U,	// LWAT
    18818U,	// LWAT_PSEUDO
    570473496U,	// LWAUX
    134264858U,	// LWAX
    2147530778U,	// LWAXTLS
    2147530778U,	// LWAXTLS_
    2147530778U,	// LWAXTLS_32
    134264858U,	// LWAX_32
    67144900U,	// LWA_32
    134265595U,	// LWBRX
    134265595U,	// LWBRX8
    134265439U,	// LWEPX
    67157525U,	// LWZ
    67157525U,	// LWZ8
    2147531092U,	// LWZCIX
    536916609U,	// LWZU
    536916609U,	// LWZU8
    570473598U,	// LWZUX
    570473598U,	// LWZUX8
    134266132U,	// LWZX
    134266132U,	// LWZX8
    2147532052U,	// LWZXTLS
    2147532052U,	// LWZXTLS_
    2147532052U,	// LWZXTLS_32
    19480U,	// LWZtoc
    18738U,	// LWZtocL
    67146183U,	// LXSD
    134264976U,	// LXSDX
    134266085U,	// LXSIBZX
    134266100U,	// LXSIHZX
    134264849U,	// LXSIWAX
    134266123U,	// LXSIWZX
    67152076U,	// LXSSP
    134265479U,	// LXSSPX
    67154654U,	// LXV
    134264790U,	// LXVB16X
    134264756U,	// LXVD2X
    134265749U,	// LXVDSX
    134264809U,	// LXVH8X
    436251183U,	// LXVKQ
    2147522995U,	// LXVL
    2147522872U,	// LXVLL
    67152203U,	// LXVP
    2147530655U,	// LXVPB32X
    2147522901U,	// LXVPRL
    2147522836U,	// LXVPRLL
    134265496U,	// LXVPX
    134264888U,	// LXVRBX
    134264959U,	// LXVRDX
    134265094U,	// LXVRHX
    2147522926U,	// LXVRL
    2147522855U,	// LXVRLL
    134266062U,	// LXVRWX
    134264773U,	// LXVW4X
    134265787U,	// LXVWSX
    134266000U,	// LXVX
    2147520656U,	// MADDHD
    2147529156U,	// MADDHDU
    2147520712U,	// MADDLD
    2147520712U,	// MADDLD8
    1518488U,	// MBAR
    37748U,	// MCRF
    44603U,	// MCRFS
    1096582U,	// MCRXRX
    604017307U,	// MFBHRBE
    1092557U,	// MFCR
    1092557U,	// MFCR8
    1092832U,	// MFCTR
    1092832U,	// MFCTR8
    43960U,	// MFDCR
    1093167U,	// MFFS
    40602U,	// MFFSCDRN
    637572984U,	// MFFSCDRNI
    1086116U,	// MFFSCE
    40593U,	// MFFSCRN
    268474222U,	// MFFSCRNI
    1087869U,	// MFFSL
    1083352U,	// MFFS_rec
    1092645U,	// MFLR
    1092645U,	// MFLR8
    1092799U,	// MFMSR
    671126394U,	// MFOCRF
    671126394U,	// MFOCRF8
    44092U,	// MFPMR
    44203U,	// MFSPR
    44203U,	// MFSPR8
    704687289U,	// MFSR
    40334U,	// MFSRIN
    36359U,	// MFTB
    16821419U,	// MFTB8
    17869995U,	// MFUDSCR
    37217U,	// MFVRD
    18918571U,	// MFVRSAVE
    18918571U,	// MFVRSAVEv
    48666U,	// MFVRWZ
    1092571U,	// MFVSCR
    37217U,	// MFVSRD
    37087U,	// MFVSRLD
    48666U,	// MFVSRWZ
    2147520882U,	// MODSD
    2147530255U,	// MODSW
    2147521045U,	// MODUD
    2147530466U,	// MODUW
    19444U,	// MSGSYNC
    19458U,	// MSYNC
    37770U,	// MTCRF
    37770U,	// MTCRF8
    1092839U,	// MTCTR
    1092839U,	// MTCTR8
    1092839U,	// MTCTR8loop
    1092839U,	// MTCTRloop
    235383750U,	// MTDCR
    1509801U,	// MTFSB0
    1509809U,	// MTFSB1
    2147521453U,	// MTFSF
    758683276U,	// MTFSFI
    2906162135U,	// MTFSFI_rec
    792237708U,	// MTFSFIb
    2147517219U,	// MTFSF_rec
    37805U,	// MTFSFb
    39239U,	// MTLPL
    39239U,	// MTLPL8
    1092651U,	// MTLR
    1092651U,	// MTLR8
    201370822U,	// MTMSR
    201363801U,	// MTMSRD
    594818U,	// MTOCRF
    594818U,	// MTOCRF8
    44099U,	// MTPMR
    44210U,	// MTSPR
    44210U,	// MTSPR8
    634061U,	// MTSR
    40342U,	// MTSRIN
    1081524U,	// MTUDSCR
    37225U,	// MTVRD
    1081589U,	// MTVRSAVE
    1540341U,	// MTVRSAVEv
    36041U,	// MTVRWA
    48675U,	// MTVRWZ
    1092579U,	// MTVSCR
    39414U,	// MTVSRBM
    805344996U,	// MTVSRBMI
    37225U,	// MTVSRD
    2147520602U,	// MTVSRDD
    39486U,	// MTVSRDM
    39603U,	// MTVSRHM
    39780U,	// MTVSRQM
    36041U,	// MTVSRWA
    40118U,	// MTVSRWM
    44942U,	// MTVSRWS
    48675U,	// MTVSRWZ
    2147520664U,	// MULHD
    2147529165U,	// MULHDU
    2147518508U,	// MULHDU_rec
    2147516981U,	// MULHD_rec
    2147529914U,	// MULHW
    2147529294U,	// MULHWU
    2147518561U,	// MULHWU_rec
    2147518624U,	// MULHW_rec
    2147520721U,	// MULLD
    2147524289U,	// MULLDO
    2147517718U,	// MULLDO_rec
    2147517005U,	// MULLD_rec
    2147522254U,	// MULLI
    2147522254U,	// MULLI8
    2147529964U,	// MULLW
    2147524614U,	// MULLWO
    2147517861U,	// MULLWO_rec
    2147518640U,	// MULLW_rec
    19021U,	// MoveGOTtoLR
    19009U,	// MovePCtoLR
    18047U,	// MovePCtoLR8
    2147520785U,	// NAND
    2147520785U,	// NAND8
    2147517019U,	// NAND8_rec
    2147517019U,	// NAND_rec
    19610U,	// NAP
    37952U,	// NEG
    37952U,	// NEG8
    40728U,	// NEG8O
    34168U,	// NEG8O_rec
    33580U,	// NEG8_rec
    40728U,	// NEGO
    34168U,	// NEGO_rec
    33580U,	// NEG_rec
    19619U,	// NOP
    16171U,	// NOP_GT_PWR6
    16183U,	// NOP_GT_PWR7
    2147527781U,	// NOR
    2147527781U,	// NOR8
    2147518295U,	// NOR8_rec
    2147518295U,	// NOR_rec
    2147527774U,	// OR
    2147527774U,	// OR8
    2147518296U,	// OR8_rec
    2147520381U,	// ORC
    2147520381U,	// ORC8
    2147516915U,	// ORC8_rec
    2147516915U,	// ORC_rec
    2147522483U,	// ORI
    2147522483U,	// ORI8
    2147528393U,	// ORIS
    2147528393U,	// ORIS8
    2147518296U,	// OR_rec
    2147522093U,	// PADDI
    2147522093U,	// PADDI8
    838899245U,	// PADDI8pc
    2147528379U,	// PADDIS
    2147528379U,	// PADDIS8
    2986389179U,	// PADDIS8pc
    2986389179U,	// PADDISpc
    19539U,	// PADDIdtprel
    838899245U,	// PADDIpc
    2147520837U,	// PDEPD
    2147521027U,	// PEXTD
    872451234U,	// PLA
    872451234U,	// PLA8
    906005666U,	// PLA8pc
    906005666U,	// PLApc
    939572518U,	// PLBZ
    939572518U,	// PLBZ8
    939572518U,	// PLBZ8nopc
    906018086U,	// PLBZ8onlypc
    973126950U,	// PLBZ8pc
    939572518U,	// PLBZnopc
    906018086U,	// PLBZonlypc
    973126950U,	// PLBZpc
    939561178U,	// PLD
    939561178U,	// PLDnopc
    906006746U,	// PLDonlypc
    973115610U,	// PLDpc
    939561084U,	// PLFD
    939561084U,	// PLFDnopc
    906006652U,	// PLFDonlypc
    973115516U,	// PLFDpc
    939568693U,	// PLFS
    939568693U,	// PLFSnopc
    906014261U,	// PLFSonlypc
    973123125U,	// PLFSpc
    939559984U,	// PLHA
    939559984U,	// PLHA8
    939559984U,	// PLHA8nopc
    906005552U,	// PLHA8onlypc
    973114416U,	// PLHA8pc
    939559984U,	// PLHAnopc
    906005552U,	// PLHAonlypc
    973114416U,	// PLHApc
    939572594U,	// PLHZ
    939572594U,	// PLHZ8
    939572594U,	// PLHZ8nopc
    906018162U,	// PLHZ8onlypc
    973127026U,	// PLHZ8pc
    939572594U,	// PLHZnopc
    906018162U,	// PLHZonlypc
    973127026U,	// PLHZpc
    906008277U,	// PLI
    906008277U,	// PLI8
    939560131U,	// PLWA
    939560131U,	// PLWA8
    939560131U,	// PLWA8nopc
    906005699U,	// PLWA8onlypc
    973114563U,	// PLWA8pc
    939560131U,	// PLWAnopc
    906005699U,	// PLWAonlypc
    973114563U,	// PLWApc
    939572756U,	// PLWZ
    939572756U,	// PLWZ8
    939572756U,	// PLWZ8nopc
    906018324U,	// PLWZ8onlypc
    973127188U,	// PLWZ8pc
    939572756U,	// PLWZnopc
    906018324U,	// PLWZonlypc
    973127188U,	// PLWZpc
    939561414U,	// PLXSD
    939561414U,	// PLXSDnopc
    906006982U,	// PLXSDonlypc
    973115846U,	// PLXSDpc
    939567307U,	// PLXSSP
    939567307U,	// PLXSSPnopc
    906012875U,	// PLXSSPonlypc
    973121739U,	// PLXSSPpc
    939569885U,	// PLXV
    939567434U,	// PLXVP
    939567434U,	// PLXVPnopc
    906013002U,	// PLXVPonlypc
    973121866U,	// PLXVPpc
    939569885U,	// PLXVnopc
    906015453U,	// PLXVonlypc
    973124317U,	// PLXVpc
    2147519031U,	// PMDMXVBF16GERX2
    2449513927U,	// PMDMXVBF16GERX2NN
    2449515681U,	// PMDMXVBF16GERX2NP
    2449514023U,	// PMDMXVBF16GERX2PN
    2449515792U,	// PMDMXVBF16GERX2PP
    2147519048U,	// PMDMXVF16GERX2
    2449513946U,	// PMDMXVF16GERX2NN
    2449515700U,	// PMDMXVF16GERX2NP
    2449514042U,	// PMDMXVF16GERX2PN
    2449515811U,	// PMDMXVF16GERX2PP
    2147519076U,	// PMDMXVI8GERX4
    2449515843U,	// PMDMXVI8GERX4PP
    2449515933U,	// PMDMXVI8GERX4SPP
    2147518991U,	// PMXVBF16GER2
    2449513896U,	// PMXVBF16GER2NN
    2449515650U,	// PMXVBF16GER2NP
    2449513992U,	// PMXVBF16GER2PN
    2449515746U,	// PMXVBF16GER2PP
    2147518991U,	// PMXVBF16GER2W
    2449513896U,	// PMXVBF16GER2WNN
    2449515650U,	// PMXVBF16GER2WNP
    2449513992U,	// PMXVBF16GER2WPN
    2449515746U,	// PMXVBF16GER2WPP
    2147519005U,	// PMXVF16GER2
    2449513912U,	// PMXVF16GER2NN
    2449515666U,	// PMXVF16GER2NP
    2449514008U,	// PMXVF16GER2PN
    2449515762U,	// PMXVF16GER2PP
    2147519005U,	// PMXVF16GER2W
    2449513912U,	// PMXVF16GER2WNN
    2449515666U,	// PMXVF16GER2WNP
    2449514008U,	// PMXVF16GER2WPN
    2449515762U,	// PMXVF16GER2WPP
    2147527659U,	// PMXVF32GER
    2449513964U,	// PMXVF32GERNN
    2449515718U,	// PMXVF32GERNP
    2449514071U,	// PMXVF32GERPN
    2449515874U,	// PMXVF32GERPP
    2147527659U,	// PMXVF32GERW
    2449513964U,	// PMXVF32GERWNN
    2449515718U,	// PMXVF32GERWNP
    2449514071U,	// PMXVF32GERWPN
    2449515874U,	// PMXVF32GERWPP
    2147527671U,	// PMXVF64GER
    2449513978U,	// PMXVF64GERNN
    2449515732U,	// PMXVF64GERNP
    2449514085U,	// PMXVF64GERPN
    2449515888U,	// PMXVF64GERPP
    2147527671U,	// PMXVF64GERW
    2449513978U,	// PMXVF64GERWNN
    2449515732U,	// PMXVF64GERWNP
    2449514085U,	// PMXVF64GERWPN
    2449515888U,	// PMXVF64GERWPP
    2147519018U,	// PMXVI16GER2
    2449515777U,	// PMXVI16GER2PP
    2147527918U,	// PMXVI16GER2S
    2449515902U,	// PMXVI16GER2SPP
    2147527918U,	// PMXVI16GER2SW
    2449515902U,	// PMXVI16GER2SWPP
    2147519018U,	// PMXVI16GER2W
    2449515777U,	// PMXVI16GER2WPP
    2147519243U,	// PMXVI4GER8
    2449515860U,	// PMXVI4GER8PP
    2147519243U,	// PMXVI4GER8W
    2449515860U,	// PMXVI4GER8WPP
    2147519064U,	// PMXVI8GER4
    2449515829U,	// PMXVI8GER4PP
    2449515918U,	// PMXVI8GER4SPP
    2147519064U,	// PMXVI8GER4W
    2449515829U,	// PMXVI8GER4WPP
    2449515918U,	// PMXVI8GER4WSPP
    36374U,	// POPCNTB
    36374U,	// POPCNTB8
    37353U,	// POPCNTD
    46763U,	// POPCNTW
    19163U,	// PPC32GOT
    19173U,	// PPC32PICGOT
    16618U,	// PREPARE_PROBED_ALLOCA_32
    17039U,	// PREPARE_PROBED_ALLOCA_64
    16666U,	// PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32
    17087U,	// PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64
    16600U,	// PROBED_ALLOCA_32
    17021U,	// PROBED_ALLOCA_64
    16644U,	// PROBED_STACKALLOC_32
    17065U,	// PROBED_STACKALLOC_64
    939560489U,	// PSTB
    939560489U,	// PSTB8
    939560489U,	// PSTB8nopc
    906006057U,	// PSTB8onlypc
    973114921U,	// PSTB8pc
    939560489U,	// PSTBnopc
    906006057U,	// PSTBonlypc
    973114921U,	// PSTBpc
    939561468U,	// PSTD
    939561468U,	// PSTDnopc
    906007036U,	// PSTDonlypc
    973115900U,	// PSTDpc
    939561090U,	// PSTFD
    939561090U,	// PSTFDnopc
    906006658U,	// PSTFDonlypc
    973115522U,	// PSTFDpc
    939568706U,	// PSTFS
    939568706U,	// PSTFSnopc
    906014274U,	// PSTFSonlypc
    973123138U,	// PSTFSpc
    939562344U,	// PSTH
    939562344U,	// PSTH8
    939562344U,	// PSTH8nopc
    906007912U,	// PSTH8onlypc
    973116776U,	// PSTH8pc
    939562344U,	// PSTHnopc
    906007912U,	// PSTHonlypc
    973116776U,	// PSTHpc
    939570889U,	// PSTW
    939570889U,	// PSTW8
    939570889U,	// PSTW8nopc
    906016457U,	// PSTW8onlypc
    973125321U,	// PSTW8pc
    939570889U,	// PSTWnopc
    906016457U,	// PSTWonlypc
    973125321U,	// PSTWpc
    939561421U,	// PSTXSD
    939561421U,	// PSTXSDnopc
    906006989U,	// PSTXSDonlypc
    973115853U,	// PSTXSDpc
    939567315U,	// PSTXSSP
    939567315U,	// PSTXSSPnopc
    906012883U,	// PSTXSSPonlypc
    973121747U,	// PSTXSSPpc
    939569891U,	// PSTXV
    939567441U,	// PSTXVP
    939567441U,	// PSTXVPnopc
    906013009U,	// PSTXVPonlypc
    973121873U,	// PSTXVPpc
    939569891U,	// PSTXVnopc
    906015459U,	// PSTXVonlypc
    973124323U,	// PSTXVpc
    1089330U,	// PTESYNCIO
    18856U,	// PseudoEIEIO
    18296U,	// RESTORE_ACC
    18918U,	// RESTORE_CR
    19097U,	// RESTORE_CRBIT
    19034U,	// RESTORE_DMR
    18881U,	// RESTORE_DMRP
    18511U,	// RESTORE_QUADWORD
    18244U,	// RESTORE_UACC
    18270U,	// RESTORE_WACC
    19515U,	// RFCI
    19526U,	// RFDI
    658662U,	// RFEBB
    19531U,	// RFI
    19489U,	// RFID
    19520U,	// RFMCI
    2147522772U,	// RLDCL
    2147517536U,	// RLDCL_rec
    2147527615U,	// RLDCR
    2147518262U,	// RLDCR_rec
    2147520304U,	// RLDIC
    2147522779U,	// RLDICL
    2147522779U,	// RLDICL_32
    2147522779U,	// RLDICL_32_64
    2147517544U,	// RLDICL_32_rec
    2147517544U,	// RLDICL_rec
    2147527635U,	// RLDICR
    2147527635U,	// RLDICR_32
    2147518270U,	// RLDICR_rec
    2147516884U,	// RLDIC_rec
    2449512182U,	// RLDIMI
    2449507315U,	// RLDIMI_rec
    2449512190U,	// RLWIMI
    2449512190U,	// RLWIMI8
    2449507324U,	// RLWIMI8_rec
    2449507324U,	// RLWIMI_rec
    2147523393U,	// RLWINM
    2147523393U,	// RLWINM8
    2147517602U,	// RLWINM8_rec
    2147517602U,	// RLWINM_rec
    2147523410U,	// RLWNM
    2147523410U,	// RLWNM8
    2147517611U,	// RLWNM8_rec
    2147517611U,	// RLWNM_rec
    18236U,	// ReadTB
    1085328U,	// SC
    1094279U,	// SCV
    17304U,	// SELECT_CC_F16
    17226U,	// SELECT_CC_F4
    17765U,	// SELECT_CC_F8
    17251U,	// SELECT_CC_I4
    17810U,	// SELECT_CC_I8
    18596U,	// SELECT_CC_SPE
    17197U,	// SELECT_CC_SPE4
    18361U,	// SELECT_CC_VRRC
    18330U,	// SELECT_CC_VSFRC
    18421U,	// SELECT_CC_VSRC
    18390U,	// SELECT_CC_VSSRC
    17319U,	// SELECT_F16
    17240U,	// SELECT_F4
    17779U,	// SELECT_F8
    17265U,	// SELECT_I4
    17984U,	// SELECT_I8
    18611U,	// SELECT_SPE
    17213U,	// SELECT_SPE4
    18377U,	// SELECT_VRRC
    18347U,	// SELECT_VSFRC
    18437U,	// SELECT_VSRC
    18407U,	// SELECT_VSSRC
    36353U,	// SETB
    36353U,	// SETB8
    36571U,	// SETBC
    36571U,	// SETBC8
    43952U,	// SETBCR
    43952U,	// SETBCR8
    18797U,	// SETFLM
    36563U,	// SETNBC
    36563U,	// SETNBC8
    43943U,	// SETNBCR
    43943U,	// SETNBCR8
    18487U,	// SETRND
    19506U,	// SETRNDi
    33481U,	// SLBFEE_rec
    19400U,	// SLBIA
    1086177U,	// SLBIE
    37941U,	// SLBIEG
    37561U,	// SLBMFEE
    45708U,	// SLBMFEV
    37642U,	// SLBMTE
    19428U,	// SLBSYNC
    2147520751U,	// SLD
    2147517013U,	// SLD_rec
    2147529994U,	// SLW
    2147529994U,	// SLW8
    2147518648U,	// SLW8_rec
    2147518648U,	// SLW_rec
    67157525U,	// SPELWZ
    134266132U,	// SPELWZX
    67155658U,	// SPESTW
    134266079U,	// SPESTWX
    18309U,	// SPILL_ACC
    18930U,	// SPILL_CR
    19112U,	// SPILL_CRBIT
    19047U,	// SPILL_DMR
    18895U,	// SPILL_DMRP
    18529U,	// SPILL_QUADWORD
    18258U,	// SPILL_UACC
    18284U,	// SPILL_WACC
    18545U,	// SPLIT_QUADWORD
    2147520472U,	// SRAD
    2147522086U,	// SRADI
    2147522086U,	// SRADI_32
    2147517328U,	// SRADI_rec
    2147516932U,	// SRAD_rec
    2147529799U,	// SRAW
    2147529799U,	// SRAW8
    2147518607U,	// SRAW8_rec
    2147522610U,	// SRAWI
    2147522610U,	// SRAWI8
    2147517453U,	// SRAWI8_rec
    2147517453U,	// SRAWI_rec
    2147518607U,	// SRAW_rec
    2147520860U,	// SRD
    2147517050U,	// SRD_rec
    2147530249U,	// SRW
    2147530249U,	// SRW8
    2147518654U,	// SRW8_rec
    2147518654U,	// SRW_rec
    67145258U,	// STB
    67145258U,	// STB8
    2147531037U,	// STBCIX
    134252817U,	// STBCX
    134265399U,	// STBEPX
    537375153U,	// STBU
    537375153U,	// STBU8
    570932255U,	// STBUX
    570932255U,	// STBUX8
    134264905U,	// STBX
    134264905U,	// STBX8
    2147530825U,	// STBXTLS
    2147530825U,	// STBXTLS_
    2147530825U,	// STBXTLS_32
    67146237U,	// STD
    2147528757U,	// STDAT
    134265553U,	// STDBRX
    2147531052U,	// STDCIX
    134252825U,	// STDCX
    537375210U,	// STDU
    570932283U,	// STDUX
    134264991U,	// STDX
    2147530911U,	// STDXTLS
    2147530911U,	// STDXTLS_
    67145859U,	// STFD
    134265415U,	// STFDEPX
    537375165U,	// STFDU
    570932269U,	// STFDUX
    134264947U,	// STFDX
    2147530867U,	// STFDXTLS
    2147530867U,	// STFDXTLS_
    134266045U,	// STFIWX
    67153475U,	// STFS
    537375283U,	// STFSU
    570932321U,	// STFSUX
    134265770U,	// STFSX
    2147531690U,	// STFSXTLS
    2147531690U,	// STFSXTLS_
    67147113U,	// STH
    67147113U,	// STH8
    134265568U,	// STHBRX
    2147531060U,	// STHCIX
    134252833U,	// STHCX
    134265431U,	// STHEPX
    537375239U,	// STHU
    537375239U,	// STHU8
    570932297U,	// STHUX
    570932297U,	// STHUX8
    134265111U,	// STHX
    134265111U,	// STHX8
    2147531031U,	// STHXTLS
    2147531031U,	// STHXTLS_
    2147531031U,	// STHXTLS_32
    67155220U,	// STMW
    19658U,	// STOP
    67152574U,	// STQ
    134252841U,	// STQCX
    18843U,	// STQX_PSEUDO
    2147522721U,	// STSWI
    134264871U,	// STVEBX
    134265077U,	// STVEHX
    134266037U,	// STVEWX
    134265994U,	// STVX
    134257094U,	// STVXL
    67155658U,	// STW
    67155658U,	// STW8
    2147528835U,	// STWAT
    134265602U,	// STWBRX
    2147531068U,	// STWCIX
    134252849U,	// STWCX
    134265446U,	// STWEPX
    537375334U,	// STWU
    537375334U,	// STWU8
    570932329U,	// STWUX
    570932329U,	// STWUX8
    134266079U,	// STWX
    134266079U,	// STWX8
    2147531999U,	// STWXTLS
    2147531999U,	// STWXTLS_
    2147531999U,	// STWXTLS_32
    67146190U,	// STXSD
    134264983U,	// STXSDX
    134264879U,	// STXSIBX
    134264879U,	// STXSIBXv
    134265085U,	// STXSIHX
    134265085U,	// STXSIHXv
    134266053U,	// STXSIWX
    67152084U,	// STXSSP
    134265487U,	// STXSSPX
    67154660U,	// STXV
    134264799U,	// STXVB16X
    134264764U,	// STXVD2X
    134264817U,	// STXVH8X
    2147523001U,	// STXVL
    2147522879U,	// STXVLL
    67152210U,	// STXVP
    2147530665U,	// STXVPB32X
    2147522909U,	// STXVPRL
    2147522845U,	// STXVPRLL
    134265503U,	// STXVPX
    134264896U,	// STXVRBX
    134264967U,	// STXVRDX
    134265102U,	// STXVRHX
    2147522933U,	// STXVRL
    2147522863U,	// STXVRLL
    134266070U,	// STXVRWX
    134264781U,	// STXVW4X
    134266006U,	// STXVX
    2147521351U,	// SUBF
    2147521351U,	// SUBF8
    2147524369U,	// SUBF8O
    2147517808U,	// SUBF8O_rec
    2147517212U,	// SUBF8_rec
    2147520283U,	// SUBFC
    2147520283U,	// SUBFC8
    2147524275U,	// SUBFC8O
    2147517702U,	// SUBFC8O_rec
    2147516860U,	// SUBFC8_rec
    2147524275U,	// SUBFCO
    2147517702U,	// SUBFCO_rec
    2147516860U,	// SUBFC_rec
    2147521225U,	// SUBFE
    2147521225U,	// SUBFE8
    2147524319U,	// SUBFE8O
    2147517752U,	// SUBFE8O_rec
    2147517138U,	// SUBFE8_rec
    2147524319U,	// SUBFEO
    2147517752U,	// SUBFEO_rec
    2147517138U,	// SUBFE_rec
    2147520311U,	// SUBFIC
    2147520311U,	// SUBFIC8
    37622U,	// SUBFME
    37622U,	// SUBFME8
    40687U,	// SUBFME8O
    34122U,	// SUBFME8O_rec
    33506U,	// SUBFME8_rec
    40687U,	// SUBFMEO
    34122U,	// SUBFMEO_rec
    33506U,	// SUBFME_rec
    2147524369U,	// SUBFO
    2147517808U,	// SUBFO_rec
    1006677843U,	// SUBFUS
    1006667786U,	// SUBFUS_rec
    37689U,	// SUBFZE
    37689U,	// SUBFZE8
    40712U,	// SUBFZE8O
    34150U,	// SUBFZE8O_rec
    33555U,	// SUBFZE8_rec
    40712U,	// SUBFZEO
    34150U,	// SUBFZEO_rec
    33555U,	// SUBFZE_rec
    2147517212U,	// SUBF_rec
    1740660U,	// SYNC
    21532532U,	// SYNCP10
    1083419U,	// TABORT
    2147942833U,	// TABORTDC
    2147943288U,	// TABORTDCI
    2147942905U,	// TABORTWC
    2147943300U,	// TABORTWCI
    1182947U,	// TAILB
    1182947U,	// TAILB8
    1215441U,	// TAILBA
    1215441U,	// TAILBA8
    19680U,	// TAILBCTR
    19680U,	// TAILBCTR8
    656604U,	// TBEGIN
    19070U,	// TBEGIN_RET
    1087661U,	// TCHECK
    19058U,	// TCHECK_RET
    2263880U,	// TCRETURNai
    2263777U,	// TCRETURNai8
    2232242U,	// TCRETURNdi
    2231023U,	// TCRETURNdi8
    2141067U,	// TCRETURNri
    2132733U,	// TCRETURNri8
    2147946972U,	// TD
    2147948159U,	// TDI
    655970U,	// TEND
    19406U,	// TLBIA
    235377384U,	// TLBIE
    2147521256U,	// TLBIE8P9
    2147524413U,	// TLBIEIO
    1087715U,	// TLBIEL
    2147525492U,	// TLBIEP
    2147525492U,	// TLBIEP8
    2147521256U,	// TLBIEP9
    2148186532U,	// TLBILX
    47104U,	// TLBIVAX
    1085633U,	// TLBLD
    1087168U,	// TLBLI
    19494U,	// TLBRE
    2147521278U,	// TLBRE2
    48014U,	// TLBSX
    2147531662U,	// TLBSX2
    2147518809U,	// TLBSX2D
    19436U,	// TLBSYNC
    1089319U,	// TLBSYNCIO
    19500U,	// TLBWE
    2147521307U,	// TLBWE2
    19346U,	// TLSGDAIX
    18116U,	// TLSGDAIX8
    19356U,	// TLSLDAIX
    18127U,	// TLSLDAIX8
    19614U,	// TRAP
    16161U,	// TRECHKPT
    1082512U,	// TRECLAIM
    657259U,	// TSR
    2147956381U,	// TW
    2147948712U,	// TWI
    18866U,	// UNENCODED_NOP
    18907U,	// UpdateGBR
    2147520047U,	// VABSDUB
    2147521902U,	// VABSDUH
    2147530473U,	// VABSDUW
    2147527393U,	// VADDCUQ
    2147530456U,	// VADDCUW
    2147527424U,	// VADDECUQ
    2147523675U,	// VADDEUQM
    2147525580U,	// VADDFP
    2147528032U,	// VADDSBS
    2147528307U,	// VADDSHS
    2147528618U,	// VADDSWS
    2147523092U,	// VADDUBM
    2147528060U,	// VADDUBS
    2147523164U,	// VADDUDM
    2147523304U,	// VADDUHM
    2147528335U,	// VADDUHS
    2147523656U,	// VADDUQM
    2147523798U,	// VADDUWM
    2147528645U,	// VADDUWS
    2147520815U,	// VAND
    2147520268U,	// VANDC
    2147519921U,	// VAVGSB
    2147521778U,	// VAVGSH
    2147530280U,	// VAVGSW
    2147520065U,	// VAVGUB
    2147521920U,	// VAVGUH
    2147530500U,	// VAVGUW
    2147520756U,	// VBPERMD
    2147527241U,	// VBPERMQ
    2449521565U,	// VCFSX
    48029U,	// VCFSX_0
    2147520619U,	// VCFUGED
    2449521730U,	// VCFUX
    48194U,	// VCFUX_0
    2147527693U,	// VCIPHER
    2147529038U,	// VCIPHERLAST
    2147519808U,	// VCLRLB
    2147519898U,	// VCLRRB
    36549U,	// VCLZB
    37501U,	// VCLZD
    2147523206U,	// VCLZDM
    38368U,	// VCLZH
    36095U,	// VCLZLSBB
    46975U,	// VCLZW
    2147525544U,	// VCMPBFP
    2147517922U,	// VCMPBFP_rec
    2147525643U,	// VCMPEQFP
    2147517943U,	// VCMPEQFP_rec
    2147520090U,	// VCMPEQUB
    2147516769U,	// VCMPEQUB_rec
    2147521096U,	// VCMPEQUD
    2147517067U,	// VCMPEQUD_rec
    2147521955U,	// VCMPEQUH
    2147517263U,	// VCMPEQUH_rec
    2147527478U,	// VCMPEQUQ
    2147518176U,	// VCMPEQUQ_rec
    2147530535U,	// VCMPEQUW
    2147518679U,	// VCMPEQUW_rec
    2147525597U,	// VCMPGEFP
    2147517932U,	// VCMPGEFP_rec
    2147525653U,	// VCMPGTFP
    2147517954U,	// VCMPGTFP_rec
    2147519974U,	// VCMPGTSB
    2147516750U,	// VCMPGTSB_rec
    2147520940U,	// VCMPGTSD
    2147517056U,	// VCMPGTSD_rec
    2147521841U,	// VCMPGTSH
    2147517244U,	// VCMPGTSH_rec
    2147527340U,	// VCMPGTSQ
    2147518165U,	// VCMPGTSQ_rec
    2147530360U,	// VCMPGTSW
    2147518660U,	// VCMPGTSW_rec
    2147520158U,	// VCMPGTUB
    2147516813U,	// VCMPGTUB_rec
    2147521106U,	// VCMPGTUD
    2147517078U,	// VCMPGTUD_rec
    2147521977U,	// VCMPGTUH
    2147517274U,	// VCMPGTUH_rec
    2147527488U,	// VCMPGTUQ
    2147518187U,	// VCMPGTUQ_rec
    2147530570U,	// VCMPGTUW
    2147518690U,	// VCMPGTUW_rec
    2147519763U,	// VCMPNEB
    2147516740U,	// VCMPNEB_rec
    2147521666U,	// VCMPNEH
    2147517234U,	// VCMPNEH_rec
    2147529862U,	// VCMPNEW
    2147518614U,	// VCMPNEW_rec
    2147520187U,	// VCMPNEZB
    2147516824U,	// VCMPNEZB_rec
    2147522006U,	// VCMPNEZH
    2147517285U,	// VCMPNEZH_rec
    2147530613U,	// VCMPNEZW
    2147518708U,	// VCMPNEZW_rec
    2147527332U,	// VCMPSQ
    2147527470U,	// VCMPUQ
    2147519725U,	// VCNTMBB
    2147520485U,	// VCNTMBD
    2147521642U,	// VCNTMBH
    2147529805U,	// VCNTMBW
    2449518623U,	// VCTSXS
    45087U,	// VCTSXS_0
    2449518631U,	// VCTUXS
    45095U,	// VCTUXS_0
    36556U,	// VCTZB
    37516U,	// VCTZD
    2147523223U,	// VCTZDM
    38375U,	// VCTZH
    36105U,	// VCTZLSBB
    46992U,	// VCTZW
    2147520898U,	// VDIVESD
    2147527323U,	// VDIVESQ
    2147530271U,	// VDIVESW
    2147521061U,	// VDIVEUD
    2147527453U,	// VDIVEUQ
    2147530491U,	// VDIVEUW
    2147520950U,	// VDIVSD
    2147527350U,	// VDIVSQ
    2147530377U,	// VDIVSW
    2147521116U,	// VDIVUD
    2147527498U,	// VDIVUQ
    2147530580U,	// VDIVUW
    2147529425U,	// VEQV
    39393U,	// VEXPANDBM
    39475U,	// VEXPANDDM
    39592U,	// VEXPANDHM
    39769U,	// VEXPANDQM
    40107U,	// VEXPANDWM
    41966U,	// VEXPTEFP
    2147531202U,	// VEXTDDVLX
    2147531580U,	// VEXTDDVRX
    2147531190U,	// VEXTDUBVLX
    2147531568U,	// VEXTDUBVRX
    2147531223U,	// VEXTDUHVLX
    2147531601U,	// VEXTDUHVRX
    2147531245U,	// VEXTDUWVLX
    2147531623U,	// VEXTDUWVRX
    39423U,	// VEXTRACTBM
    2449510869U,	// VEXTRACTD
    39495U,	// VEXTRACTDM
    39622U,	// VEXTRACTHM
    39789U,	// VEXTRACTQM
    2449510034U,	// VEXTRACTUB
    2449511853U,	// VEXTRACTUH
    2449520433U,	// VEXTRACTUW
    40127U,	// VEXTRACTWM
    36756U,	// VEXTSB2D
    36756U,	// VEXTSB2Ds
    45802U,	// VEXTSB2W
    45802U,	// VEXTSB2Ws
    43362U,	// VEXTSD2Q
    36766U,	// VEXTSH2D
    36766U,	// VEXTSH2Ds
    45812U,	// VEXTSH2W
    45812U,	// VEXTSH2Ws
    36776U,	// VEXTSW2D
    36776U,	// VEXTSW2Ds
    2147531134U,	// VEXTUBLX
    2147531505U,	// VEXTUBRX
    2147531162U,	// VEXTUHLX
    2147531548U,	// VEXTUHRX
    2147531266U,	// VEXTUWLX
    2147531644U,	// VEXTUWRX
    36830U,	// VGBBD
    2147519847U,	// VGNB
    2449521013U,	// VINSBLX
    2449521384U,	// VINSBRX
    2449521068U,	// VINSBVLX
    2449521446U,	// VINSBVRX
    1040224668U,	// VINSD
    2449521032U,	// VINSDLX
    2449521418U,	// VINSDRX
    1040223775U,	// VINSERTB
    2449510898U,	// VINSERTD
    1040225630U,	// VINSERTH
    2449520308U,	// VINSERTW
    2449521041U,	// VINSHLX
    2449521427U,	// VINSHRX
    2449521101U,	// VINSHVLX
    2449521479U,	// VINSHVRX
    1040234088U,	// VINSW
    2449521145U,	// VINSWLX
    2449521523U,	// VINSWRX
    2449521123U,	// VINSWVLX
    2449521501U,	// VINSWVRX
    41940U,	// VLOGEFP
    2147525571U,	// VMADDFP
    2147525663U,	// VMAXFP
    2147519993U,	// VMAXSB
    2147520958U,	// VMAXSD
    2147521860U,	// VMAXSH
    2147530385U,	// VMAXSW
    2147520168U,	// VMAXUB
    2147521124U,	// VMAXUD
    2147521987U,	// VMAXUH
    2147530588U,	// VMAXUW
    2147528284U,	// VMHADDSHS
    2147528295U,	// VMHRADDSHS
    2147525635U,	// VMINFP
    2147519957U,	// VMINSB
    2147520916U,	// VMINSD
    2147521824U,	// VMINSH
    2147530336U,	// VMINSW
    2147520073U,	// VMINUB
    2147521079U,	// VMINUD
    2147521938U,	// VMINUH
    2147530518U,	// VMINUW
    2147523292U,	// VMLADDUHM
    2147520881U,	// VMODSD
    2147527315U,	// VMODSQ
    2147530254U,	// VMODSW
    2147521044U,	// VMODUD
    2147527434U,	// VMODUQ
    2147530465U,	// VMODUW
    2147529854U,	// VMRGEW
    2147519772U,	// VMRGHB
    2147521675U,	// VMRGHH
    2147529897U,	// VMRGHW
    2147519800U,	// VMRGLB
    2147521693U,	// VMRGLH
    2147529947U,	// VMRGLW
    2147530227U,	// VMRGOW
    2147521034U,	// VMSUMCUD
    2147523052U,	// VMSUMMBM
    2147523260U,	// VMSUMSHM
    2147528316U,	// VMSUMSHS
    2147523101U,	// VMSUMUBM
    2147523173U,	// VMSUMUDM
    2147523323U,	// VMSUMUHM
    2147528344U,	// VMSUMUHS
    43725U,	// VMUL10CUQ
    2147527402U,	// VMUL10ECUQ
    2147527442U,	// VMUL10EUQ
    43715U,	// VMUL10UQ
    2147519912U,	// VMULESB
    2147520889U,	// VMULESD
    2147521769U,	// VMULESH
    2147530262U,	// VMULESW
    2147520056U,	// VMULEUB
    2147521052U,	// VMULEUD
    2147521911U,	// VMULEUH
    2147530482U,	// VMULEUW
    2147520907U,	// VMULHSD
    2147530298U,	// VMULHSW
    2147521070U,	// VMULHUD
    2147530509U,	// VMULHUW
    2147520720U,	// VMULLD
    2147519965U,	// VMULOSB
    2147520931U,	// VMULOSD
    2147521832U,	// VMULOSH
    2147530351U,	// VMULOSW
    2147520081U,	// VMULOUB
    2147521087U,	// VMULOUD
    2147521946U,	// VMULOUH
    2147530526U,	// VMULOUW
    2147523808U,	// VMULUWM
    2147520800U,	// VNAND
    2147527683U,	// VNCIPHER
    2147529024U,	// VNCIPHERLAST
    37001U,	// VNEGD
    46242U,	// VNEGW
    2147525553U,	// VNMSUBFP
    2147527794U,	// VNOR
    2147527807U,	// VOR
    2147520394U,	// VORC
    2147520836U,	// VPDEPD
    2147523713U,	// VPERM
    2147527754U,	// VPERMR
    2147527827U,	// VPERMXOR
    2147521026U,	// VPEXTD
    2147531383U,	// VPKPX
    2147528449U,	// VPKSDSS
    2147528513U,	// VPKSDUS
    2147528458U,	// VPKSHSS
    2147528539U,	// VPKSHUS
    2147528467U,	// VPKSWSS
    2147528557U,	// VPKSWUS
    2147523728U,	// VPKUDUM
    2147528522U,	// VPKUDUS
    2147523737U,	// VPKUHUM
    2147528548U,	// VPKUHUS
    2147523746U,	// VPKUWUM
    2147528566U,	// VPKUWUS
    2147519838U,	// VPMSUMB
    2147520765U,	// VPMSUMD
    2147521723U,	// VPMSUMH
    2147530010U,	// VPMSUMW
    36373U,	// VPOPCNTB
    37352U,	// VPOPCNTD
    38228U,	// VPOPCNTH
    46762U,	// VPOPCNTW
    36846U,	// VPRTYBD
    43393U,	// VPRTYBQ
    46166U,	// VPRTYBW
    41959U,	// VREFP
    39697U,	// VRFIM
    40321U,	// VRFIN
    42043U,	// VRFIP
    48504U,	// VRFIZ
    2147519826U,	// VRLB
    2147520744U,	// VRLD
    2147522286U,	// VRLDMI
    2147523385U,	// VRLDNM
    2147521711U,	// VRLH
    2147527222U,	// VRLQ
    2147522310U,	// VRLQMI
    2147523401U,	// VRLQNM
    2147529979U,	// VRLW
    2147522406U,	// VRLWMI
    2147523409U,	// VRLWNM
    41976U,	// VRSQRTEFP
    47637U,	// VSBOX
    2147522807U,	// VSEL
    2147520447U,	// VSHASIGMAD
    2147529786U,	// VSHASIGMAW
    2147522949U,	// VSL
    2147519832U,	// VSLB
    2147520750U,	// VSLD
    2147522049U,	// VSLDBI
    2147522435U,	// VSLDOI
    2147521717U,	// VSLH
    2147524446U,	// VSLO
    2147527228U,	// VSLQ
    2147529403U,	// VSLV
    2147529993U,	// VSLW
    2449509901U,	// VSPLTB
    2449509901U,	// VSPLTBs
    2449511756U,	// VSPLTH
    2449511756U,	// VSPLTHs
    402689474U,	// VSPLTISB
    402691341U,	// VSPLTISH
    402699843U,	// VSPLTISW
    2449520281U,	// VSPLTW
    2147527892U,	// VSR
    2147519711U,	// VSRAB
    2147520471U,	// VSRAD
    2147521635U,	// VSRAH
    2147527020U,	// VSRAQ
    2147529798U,	// VSRAW
    2147519906U,	// VSRB
    2147520867U,	// VSRD
    2147522057U,	// VSRDBI
    2147521739U,	// VSRH
    2147524574U,	// VSRO
    2147527309U,	// VSRQ
    2147529431U,	// VSRV
    2147530248U,	// VSRW
    39110U,	// VSTRIBL
    33878U,	// VSTRIBL_rec
    43934U,	// VSTRIBR
    34604U,	// VSTRIBR_rec
    39179U,	// VSTRIHL
    33912U,	// VSTRIHL_rec
    44054U,	// VSTRIHR
    34631U,	// VSTRIHR_rec
    2147527384U,	// VSUBCUQ
    2147530447U,	// VSUBCUW
    2147527414U,	// VSUBECUQ
    2147523665U,	// VSUBEUQM
    2147525563U,	// VSUBFP
    2147528023U,	// VSUBSBS
    2147528275U,	// VSUBSHS
    2147528609U,	// VSUBSWS
    2147523083U,	// VSUBUBM
    2147528051U,	// VSUBUBS
    2147523155U,	// VSUBUDM
    2147523283U,	// VSUBUHM
    2147528326U,	// VSUBUHS
    2147523634U,	// VSUBUQM
    2147523788U,	// VSUBUWM
    2147528636U,	// VSUBUWS
    2147528599U,	// VSUM2SWS
    2147528013U,	// VSUM4SBS
    2147528265U,	// VSUM4SHS
    2147528041U,	// VSUM4UBS
    2147528627U,	// VSUMSWS
    2147519780U,	// VUCMPRHB
    2147521683U,	// VUCMPRHH
    2147523959U,	// VUCMPRHN
    2147519816U,	// VUCMPRLB
    2147521701U,	// VUCMPRLH
    2147523998U,	// VUCMPRLN
    47726U,	// VUPKHPX
    36281U,	// VUPKHSB
    38138U,	// VUPKHSH
    36205U,	// VUPKHSNTOB
    46640U,	// VUPKHSW
    2147519113U,	// VUPKINT4TOBF16
    2147518959U,	// VUPKINT4TOFP32
    2147519129U,	// VUPKINT8TOBF16
    2147518975U,	// VUPKINT8TOFP32
    47742U,	// VUPKLPX
    36300U,	// VUPKLSB
    38167U,	// VUPKLSH
    36217U,	// VUPKLSNTOB
    46669U,	// VUPKLSW
    2147527845U,	// VXOR
    2382408869U,	// V_SET0
    2382408869U,	// V_SET0B
    2382408869U,	// V_SET0H
    22066755U,	// V_SETALLONES
    22066755U,	// V_SETALLONESB
    22066755U,	// V_SETALLONESH
    1749222U,	// WAIT
    271233254U,	// WAITP10
    1086146U,	// WRTEE
    1087108U,	// WRTEEI
    2147527815U,	// XOR
    2147527815U,	// XOR8
    2147518301U,	// XOR8_rec
    2147522482U,	// XORI
    2147522482U,	// XORI8
    2147528392U,	// XORIS
    2147528392U,	// XORIS8
    2147518301U,	// XOR_rec
    41651U,	// XSABSDP
    42669U,	// XSABSQP
    2147523699U,	// XSADDADDSUQM
    2147523643U,	// XSADDADDUQM
    2147524812U,	// XSADDDP
    2147526145U,	// XSADDQP
    2147524533U,	// XSADDQPO
    2147526498U,	// XSADDSP
    2147523685U,	// XSADDSUBSUQM
    2147523621U,	// XSADDSUBUQM
    2147525257U,	// XSCMPEQDP
    2147526276U,	// XSCMPEQQP
    2147525225U,	// XSCMPEXPDP
    2147526254U,	// XSCMPEXPQP
    2147524874U,	// XSCMPGEDP
    2147526174U,	// XSCMPGEQP
    2147525324U,	// XSCMPGTDP
    2147526326U,	// XSCMPGTQP
    2147525155U,	// XSCMPODP
    2147526224U,	// XSCMPOQP
    2147525388U,	// XSCMPUDP
    2147526347U,	// XSCMPUQP
    2147525115U,	// XSCPSGNDP
    2147526213U,	// XSCPSGNQP
    42023U,	// XSCVDPHP
    42586U,	// XSCVDPQP
    43112U,	// XSCVDPSP
    40576U,	// XSCVDPSPN
    44495U,	// XSCVDPSXDS
    44495U,	// XSCVDPSXDSs
    45015U,	// XSCVDPSXWS
    45015U,	// XSCVDPSXWSs
    44531U,	// XSCVDPUXDS
    44531U,	// XSCVDPUXDSs
    45051U,	// XSCVDPUXWS
    45051U,	// XSCVDPUXWSs
    41517U,	// XSCVHPDP
    41527U,	// XSCVQPDP
    40804U,	// XSCVQPDPO
    48476U,	// XSCVQPSDZ
    48601U,	// XSCVQPSQZ
    48684U,	// XSCVQPSWZ
    48487U,	// XSCVQPUDZ
    48612U,	// XSCVQPUQZ
    48695U,	// XSCVQPUWZ
    42506U,	// XSCVSDQP
    41537U,	// XSCVSPDP
    40524U,	// XSCVSPDPN
    42639U,	// XSCVSQQP
    41182U,	// XSCVSXDDP
    42868U,	// XSCVSXDSP
    42516U,	// XSCVUDQP
    42649U,	// XSCVUQQP
    41204U,	// XSCVUXDDP
    42890U,	// XSCVUXDSP
    2147525398U,	// XSDIVDP
    2147526357U,	// XSDIVQP
    2147524564U,	// XSDIVQPO
    2147526918U,	// XSDIVSP
    2147525205U,	// XSIEXPDP
    2147526244U,	// XSIEXPQP
    2449514618U,	// XSMADDADP
    2449516324U,	// XSMADDASP
    2449514981U,	// XSMADDMDP
    2449516606U,	// XSMADDMSP
    2449516023U,	// XSMADDQP
    2449514410U,	// XSMADDQPO
    2147524802U,	// XSMAXCDP
    2147526114U,	// XSMAXCQP
    2147525458U,	// XSMAXDP
    2147524995U,	// XSMAXJDP
    2147523449U,	// XSMERGE2T1UQM
    2147523511U,	// XSMERGE2T2UQM
    2147523558U,	// XSMERGE2T3UQM
    2147523480U,	// XSMERGE3T1UQM
    2147524792U,	// XSMINCDP
    2147526104U,	// XSMINCQP
    2147525137U,	// XSMINDP
    2147524985U,	// XSMINJDP
    2449514572U,	// XSMSUBADP
    2449516278U,	// XSMSUBASP
    2449514935U,	// XSMSUBMDP
    2449516560U,	// XSMSUBMSP
    2449515962U,	// XSMSUBQP
    2449514377U,	// XSMSUBQPO
    2147525005U,	// XSMULDP
    2147526204U,	// XSMULQP
    2147524543U,	// XSMULQPO
    2147526630U,	// XSMULSP
    41631U,	// XSNABSDP
    41631U,	// XSNABSDPs
    42659U,	// XSNABSQP
    41288U,	// XSNEGDP
    42537U,	// XSNEGQP
    2449514594U,	// XSNMADDADP
    2449516300U,	// XSNMADDASP
    2449514957U,	// XSNMADDMDP
    2449516582U,	// XSNMADDMSP
    2449516012U,	// XSNMADDQP
    2449514398U,	// XSNMADDQPO
    2449514548U,	// XSNMSUBADP
    2449516254U,	// XSNMSUBASP
    2449514911U,	// XSNMSUBMDP
    2449516536U,	// XSNMSUBMSP
    2449515951U,	// XSNMSUBQP
    2449514365U,	// XSNMSUBQPO
    38795U,	// XSRDPI
    36671U,	// XSRDPIC
    39704U,	// XSRDPIM
    42050U,	// XSRDPIP
    48511U,	// XSRDPIZ
    2147523464U,	// XSREBASE2T1UQM
    2147523526U,	// XSREBASE2T2UQM
    2147523573U,	// XSREBASE2T3UQM
    2147523605U,	// XSREBASE2T4UQM
    2147523495U,	// XSREBASE3T1UQM
    2147523542U,	// XSREBASE3T2UQM
    2147523589U,	// XSREBASE3T3UQM
    41248U,	// XSREDP
    42923U,	// XSRESP
    335943579U,	// XSRQPI
    335952236U,	// XSRQPIX
    335948121U,	// XSRQPXP
    43185U,	// XSRSP
    41264U,	// XSRSQRTEDP
    42939U,	// XSRSQRTESP
    41698U,	// XSSQRTDP
    42689U,	// XSSQRTQP
    40905U,	// XSSQRTQPO
    43239U,	// XSSQRTSP
    2147524752U,	// XSSUBDP
    2147526084U,	// XSSUBQP
    2147524500U,	// XSSUBQPO
    2147526458U,	// XSSUBSP
    2147525407U,	// XSTDIVDP
    41708U,	// XSTSQRTDP
    2449514658U,	// XSTSTDCDP
    2449515981U,	// XSTSTDCQP
    2449516364U,	// XSTSTDCSP
    41589U,	// XSXEXPDP
    42618U,	// XSXEXPQP
    41306U,	// XSXSIGDP
    42546U,	// XSXSIGQP
    41660U,	// XVABSDP
    43202U,	// XVABSSP
    2147524821U,	// XVADDDP
    2147526507U,	// XVADDSP
    2147523303U,	// XVADDUHM
    2147523797U,	// XVADDUWM
    2147518993U,	// XVBF16GER2
    2449513898U,	// XVBF16GER2NN
    2449515652U,	// XVBF16GER2NP
    2449513994U,	// XVBF16GER2PN
    2449515748U,	// XVBF16GER2PP
    2147518993U,	// XVBF16GER2W
    2449513898U,	// XVBF16GER2WNN
    2449515652U,	// XVBF16GER2WNP
    2449513994U,	// XVBF16GER2WPN
    2449515748U,	// XVBF16GER2WPP
    2147525268U,	// XVCMPEQDP
    2147517890U,	// XVCMPEQDP_rec
    2147526810U,	// XVCMPEQSP
    2147517984U,	// XVCMPEQSP_rec
    2147524885U,	// XVCMPGEDP
    2147517878U,	// XVCMPGEDP_rec
    2147526560U,	// XVCMPGESP
    2147517972U,	// XVCMPGESP_rec
    2147525335U,	// XVCMPGTDP
    2147517910U,	// XVCMPGTDP_rec
    2147526876U,	// XVCMPGTSP
    2147518010U,	// XVCMPGTSP_rec
    2147525126U,	// XVCPSGNDP
    2147526740U,	// XVCPSGNSP
    40563U,	// XVCVBF16SPN
    43122U,	// XVCVDPSP
    44507U,	// XVCVDPSXDS
    45027U,	// XVCVDPSXWS
    44543U,	// XVCVDPUXDS
    45063U,	// XVCVDPUXWS
    43132U,	// XVCVHPSP
    35497U,	// XVCVSPBF16
    41547U,	// XVCVSPDP
    42033U,	// XVCVSPHP
    44519U,	// XVCVSPSXDS
    45039U,	// XVCVSPSXWS
    44555U,	// XVCVSPUXDS
    45075U,	// XVCVSPUXWS
    41193U,	// XVCVSXDDP
    42879U,	// XVCVSXDSP
    41788U,	// XVCVSXWDP
    43298U,	// XVCVSXWSP
    41215U,	// XVCVUXDDP
    42901U,	// XVCVUXDSP
    41799U,	// XVCVUXWDP
    43309U,	// XVCVUXWSP
    2147525427U,	// XVDIVDP
    2147526937U,	// XVDIVSP
    2147519007U,	// XVF16GER2
    2449513914U,	// XVF16GER2NN
    2449515668U,	// XVF16GER2NP
    2449514010U,	// XVF16GER2PN
    2449515764U,	// XVF16GER2PP
    2147519007U,	// XVF16GER2W
    2449513914U,	// XVF16GER2WNN
    2449515668U,	// XVF16GER2WNP
    2449514010U,	// XVF16GER2WPN
    2449515764U,	// XVF16GER2WPP
    2147527661U,	// XVF32GER
    2449513966U,	// XVF32GERNN
    2449515720U,	// XVF32GERNP
    2449514073U,	// XVF32GERPN
    2449515876U,	// XVF32GERPP
    2147527661U,	// XVF32GERW
    2449513966U,	// XVF32GERWNN
    2449515720U,	// XVF32GERWNP
    2449514073U,	// XVF32GERWPN
    2449515876U,	// XVF32GERWPP
    2147527673U,	// XVF64GER
    2449513980U,	// XVF64GERNN
    2449515734U,	// XVF64GERNP
    2449514087U,	// XVF64GERPN
    2449515890U,	// XVF64GERPP
    2147527673U,	// XVF64GERW
    2449513980U,	// XVF64GERWNN
    2449515734U,	// XVF64GERWNP
    2449514087U,	// XVF64GERWPN
    2449515890U,	// XVF64GERWPP
    2147519020U,	// XVI16GER2
    2449515779U,	// XVI16GER2PP
    2147527920U,	// XVI16GER2S
    2449515904U,	// XVI16GER2SPP
    2147527920U,	// XVI16GER2SW
    2449515904U,	// XVI16GER2SWPP
    2147519020U,	// XVI16GER2W
    2449515779U,	// XVI16GER2WPP
    2147519245U,	// XVI4GER8
    2449515862U,	// XVI4GER8PP
    2147519245U,	// XVI4GER8W
    2449515862U,	// XVI4GER8WPP
    2147519066U,	// XVI8GER4
    2449515831U,	// XVI8GER4PP
    2449515920U,	// XVI8GER4SPP
    2147519066U,	// XVI8GER4W
    2449515831U,	// XVI8GER4WPP
    2449515920U,	// XVI8GER4WSPP
    2147525215U,	// XVIEXPDP
    2147526790U,	// XVIEXPSP
    2449514629U,	// XVMADDADP
    2449516335U,	// XVMADDASP
    2449514992U,	// XVMADDMDP
    2449516617U,	// XVMADDMSP
    2147525467U,	// XVMAXDP
    2147526968U,	// XVMAXSP
    2147525146U,	// XVMINDP
    2147526751U,	// XVMINSP
    2449514583U,	// XVMSUBADP
    2449516289U,	// XVMSUBASP
    2449514946U,	// XVMSUBMDP
    2449516571U,	// XVMSUBMSP
    2147525014U,	// XVMULDP
    2147521795U,	// XVMULHSH
    2147530297U,	// XVMULHSW
    2147521928U,	// XVMULHUH
    2147530508U,	// XVMULHUW
    2147526639U,	// XVMULSP
    2147523313U,	// XVMULUHM
    2147523807U,	// XVMULUWM
    41641U,	// XVNABSDP
    43192U,	// XVNABSSP
    41297U,	// XVNEGDP
    42963U,	// XVNEGSP
    2449514606U,	// XVNMADDADP
    2449516312U,	// XVNMADDASP
    2449514969U,	// XVNMADDMDP
    2449516594U,	// XVNMADDMSP
    2449514560U,	// XVNMSUBADP
    2449516266U,	// XVNMSUBASP
    2449514923U,	// XVNMSUBMDP
    2449516548U,	// XVNMSUBMSP
    38803U,	// XVRDPI
    36680U,	// XVRDPIC
    39713U,	// XVRDPIM
    42059U,	// XVRDPIP
    48520U,	// XVRDPIZ
    41256U,	// XVREDP
    42931U,	// XVRESP
    2147529985U,	// XVRLW
    38819U,	// XVRSPI
    36689U,	// XVRSPIC
    39722U,	// XVRSPIM
    42068U,	// XVRSPIP
    48529U,	// XVRSPIZ
    41276U,	// XVRSQRTEDP
    42951U,	// XVRSQRTESP
    41730U,	// XVSQRTDP
    43260U,	// XVSQRTSP
    2147524761U,	// XVSUBDP
    2147526467U,	// XVSUBSP
    2147523282U,	// XVSUBUHM
    2147523787U,	// XVSUBUWM
    2147525417U,	// XVTDIVDP
    2147526927U,	// XVTDIVSP
    36086U,	// XVTLSBB
    41719U,	// XVTSQRTDP
    43249U,	// XVTSQRTSP
    2449514669U,	// XVTSTDCDP
    2449516375U,	// XVTSTDCSP
    41599U,	// XVXEXPDP
    43152U,	// XVXEXPSP
    41316U,	// XVXSIGDP
    42972U,	// XVXSIGSP
    2147524638U,	// XXAESDECP
    2147524649U,	// XXAESENCP
    2147525741U,	// XXAESGENLKP
    2147520176U,	// XXBLENDVB
    2147521132U,	// XXBLENDVD
    2147521995U,	// XXBLENDVH
    2147530596U,	// XXBLENDVW
    37202U,	// XXBRD
    38084U,	// XXBRH
    43654U,	// XXBRQ
    46593U,	// XXBRW
    2147522750U,	// XXEVAL
    2147530557U,	// XXEXTRACTUW
    2147523111U,	// XXGENPCVBM
    2147523194U,	// XXGENPCVDM
    2147523333U,	// XXGENPCVHM
    2147523817U,	// XXGENPCVWM
    2147519189U,	// XXGFMUL128
    2449520318U,	// XXINSERTW
    2147520774U,	// XXLAND
    2147520250U,	// XXLANDC
    2147529409U,	// XXLEQV
    2382410433U,	// XXLEQVOnes
    2147520782U,	// XXLNAND
    2147527778U,	// XXLNOR
    2147527771U,	// XXLOR
    2147520378U,	// XXLORC
    2147527771U,	// XXLORf
    2147527812U,	// XXLXOR
    2382408836U,	// XXLXORdpz
    2382408836U,	// XXLXORspz
    2382408836U,	// XXLXORz
    1543906U,	// XXMFACC
    1543906U,	// XXMFACCW
    2147529905U,	// XXMRGHW
    2147529955U,	// XXMRGLW
    1085163U,	// XXMTACC
    1085163U,	// XXMTACCW
    2147522968U,	// XXMULMUL
    2147520533U,	// XXMULMULHIADD
    2147520563U,	// XXMULMULLOADD
    2147523720U,	// XXPERM
    2147522126U,	// XXPERMDI
    2147522126U,	// XXPERMDIs
    2147527762U,	// XXPERMR
    2147531276U,	// XXPERMX
    2147522813U,	// XXSEL
    1097006U,	// XXSETACCZ
    2147522617U,	// XXSLDWI
    2147522617U,	// XXSLDWIs
    1073789007U,	// XXSPLTI32DX
    1107332398U,	// XXSPLTIB
    41326U,	// XXSPLTIDP
    46289U,	// XXSPLTIW
    2147530401U,	// XXSPLTW
    2147530401U,	// XXSPLTWs
    2147523183U,	// XXSSUMUDM
    2147520353U,	// XXSSUMUDMC
    2147529116U,	// XXSSUMUDMCEXT
    2147946199U,	// gBC
    2147945429U,	// gBCA
    23808964U,	// gBCAat
    2147953881U,	// gBCCTR
    2147948902U,	// gBCCTRL
    2147948751U,	// gBCL
    2147945628U,	// gBCLA
    23808980U,	// gBCLAat
    2147953695U,	// gBCLR
    2147948878U,	// gBCLRL
    24857679U,	// gBCLat
    24857569U,	// gBCat
  };

  static const uint32_t OpInfo1[] = {
    0U,	// PHI
    0U,	// INLINEASM
    0U,	// INLINEASM_BR
    0U,	// CFI_INSTRUCTION
    0U,	// EH_LABEL
    0U,	// GC_LABEL
    0U,	// ANNOTATION_LABEL
    0U,	// KILL
    0U,	// EXTRACT_SUBREG
    0U,	// INSERT_SUBREG
    0U,	// IMPLICIT_DEF
    0U,	// INIT_UNDEF
    0U,	// SUBREG_TO_REG
    0U,	// COPY_TO_REGCLASS
    0U,	// DBG_VALUE
    0U,	// DBG_VALUE_LIST
    0U,	// DBG_INSTR_REF
    0U,	// DBG_PHI
    0U,	// DBG_LABEL
    0U,	// REG_SEQUENCE
    0U,	// COPY
    0U,	// COPY_LANEMASK
    0U,	// BUNDLE
    0U,	// LIFETIME_START
    0U,	// LIFETIME_END
    0U,	// PSEUDO_PROBE
    0U,	// ARITH_FENCE
    0U,	// STACKMAP
    0U,	// FENTRY_CALL
    0U,	// PATCHPOINT
    0U,	// LOAD_STACK_GUARD
    0U,	// PREALLOCATED_SETUP
    0U,	// PREALLOCATED_ARG
    0U,	// STATEPOINT
    0U,	// LOCAL_ESCAPE
    0U,	// FAULTING_OP
    0U,	// PATCHABLE_OP
    0U,	// PATCHABLE_FUNCTION_ENTER
    0U,	// PATCHABLE_RET
    0U,	// PATCHABLE_FUNCTION_EXIT
    0U,	// PATCHABLE_TAIL_CALL
    0U,	// PATCHABLE_EVENT_CALL
    0U,	// PATCHABLE_TYPED_EVENT_CALL
    0U,	// ICALL_BRANCH_FUNNEL
    0U,	// FAKE_USE
    0U,	// MEMBARRIER
    0U,	// JUMP_TABLE_DEBUG_INFO
    0U,	// RELOC_NONE
    0U,	// CONVERGENCECTRL_ENTRY
    0U,	// CONVERGENCECTRL_ANCHOR
    0U,	// CONVERGENCECTRL_LOOP
    0U,	// CONVERGENCECTRL_GLUE
    0U,	// G_ASSERT_SEXT
    0U,	// G_ASSERT_ZEXT
    0U,	// G_ASSERT_ALIGN
    0U,	// G_ADD
    0U,	// G_SUB
    0U,	// G_MUL
    0U,	// G_SDIV
    0U,	// G_UDIV
    0U,	// G_SREM
    0U,	// G_UREM
    0U,	// G_SDIVREM
    0U,	// G_UDIVREM
    0U,	// G_AND
    0U,	// G_OR
    0U,	// G_XOR
    0U,	// G_ABDS
    0U,	// G_ABDU
    0U,	// G_UAVGFLOOR
    0U,	// G_UAVGCEIL
    0U,	// G_SAVGFLOOR
    0U,	// G_SAVGCEIL
    0U,	// G_IMPLICIT_DEF
    0U,	// G_PHI
    0U,	// G_FRAME_INDEX
    0U,	// G_GLOBAL_VALUE
    0U,	// G_PTRAUTH_GLOBAL_VALUE
    0U,	// G_CONSTANT_POOL
    0U,	// G_EXTRACT
    0U,	// G_UNMERGE_VALUES
    0U,	// G_INSERT
    0U,	// G_MERGE_VALUES
    0U,	// G_BUILD_VECTOR
    0U,	// G_BUILD_VECTOR_TRUNC
    0U,	// G_CONCAT_VECTORS
    0U,	// G_PTRTOINT
    0U,	// G_INTTOPTR
    0U,	// G_BITCAST
    0U,	// G_FREEZE
    0U,	// G_CONSTANT_FOLD_BARRIER
    0U,	// G_INTRINSIC_FPTRUNC_ROUND
    0U,	// G_INTRINSIC_TRUNC
    0U,	// G_INTRINSIC_ROUND
    0U,	// G_INTRINSIC_LRINT
    0U,	// G_INTRINSIC_LLRINT
    0U,	// G_INTRINSIC_ROUNDEVEN
    0U,	// G_READCYCLECOUNTER
    0U,	// G_READSTEADYCOUNTER
    0U,	// G_LOAD
    0U,	// G_SEXTLOAD
    0U,	// G_ZEXTLOAD
    0U,	// G_INDEXED_LOAD
    0U,	// G_INDEXED_SEXTLOAD
    0U,	// G_INDEXED_ZEXTLOAD
    0U,	// G_STORE
    0U,	// G_INDEXED_STORE
    0U,	// G_ATOMIC_CMPXCHG_WITH_SUCCESS
    0U,	// G_ATOMIC_CMPXCHG
    0U,	// G_ATOMICRMW_XCHG
    0U,	// G_ATOMICRMW_ADD
    0U,	// G_ATOMICRMW_SUB
    0U,	// G_ATOMICRMW_AND
    0U,	// G_ATOMICRMW_NAND
    0U,	// G_ATOMICRMW_OR
    0U,	// G_ATOMICRMW_XOR
    0U,	// G_ATOMICRMW_MAX
    0U,	// G_ATOMICRMW_MIN
    0U,	// G_ATOMICRMW_UMAX
    0U,	// G_ATOMICRMW_UMIN
    0U,	// G_ATOMICRMW_FADD
    0U,	// G_ATOMICRMW_FSUB
    0U,	// G_ATOMICRMW_FMAX
    0U,	// G_ATOMICRMW_FMIN
    0U,	// G_ATOMICRMW_FMAXIMUM
    0U,	// G_ATOMICRMW_FMINIMUM
    0U,	// G_ATOMICRMW_UINC_WRAP
    0U,	// G_ATOMICRMW_UDEC_WRAP
    0U,	// G_ATOMICRMW_USUB_COND
    0U,	// G_ATOMICRMW_USUB_SAT
    0U,	// G_FENCE
    0U,	// G_PREFETCH
    0U,	// G_BRCOND
    0U,	// G_BRINDIRECT
    0U,	// G_INVOKE_REGION_START
    0U,	// G_INTRINSIC
    0U,	// G_INTRINSIC_W_SIDE_EFFECTS
    0U,	// G_INTRINSIC_CONVERGENT
    0U,	// G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
    0U,	// G_ANYEXT
    0U,	// G_TRUNC
    0U,	// G_TRUNC_SSAT_S
    0U,	// G_TRUNC_SSAT_U
    0U,	// G_TRUNC_USAT_U
    0U,	// G_CONSTANT
    0U,	// G_FCONSTANT
    0U,	// G_VASTART
    0U,	// G_VAARG
    0U,	// G_SEXT
    0U,	// G_SEXT_INREG
    0U,	// G_ZEXT
    0U,	// G_SHL
    0U,	// G_LSHR
    0U,	// G_ASHR
    0U,	// G_FSHL
    0U,	// G_FSHR
    0U,	// G_ROTR
    0U,	// G_ROTL
    0U,	// G_ICMP
    0U,	// G_FCMP
    0U,	// G_SCMP
    0U,	// G_UCMP
    0U,	// G_SELECT
    0U,	// G_UADDO
    0U,	// G_UADDE
    0U,	// G_USUBO
    0U,	// G_USUBE
    0U,	// G_SADDO
    0U,	// G_SADDE
    0U,	// G_SSUBO
    0U,	// G_SSUBE
    0U,	// G_UMULO
    0U,	// G_SMULO
    0U,	// G_UMULH
    0U,	// G_SMULH
    0U,	// G_UADDSAT
    0U,	// G_SADDSAT
    0U,	// G_USUBSAT
    0U,	// G_SSUBSAT
    0U,	// G_USHLSAT
    0U,	// G_SSHLSAT
    0U,	// G_SMULFIX
    0U,	// G_UMULFIX
    0U,	// G_SMULFIXSAT
    0U,	// G_UMULFIXSAT
    0U,	// G_SDIVFIX
    0U,	// G_UDIVFIX
    0U,	// G_SDIVFIXSAT
    0U,	// G_UDIVFIXSAT
    0U,	// G_FADD
    0U,	// G_FSUB
    0U,	// G_FMUL
    0U,	// G_FMA
    0U,	// G_FMAD
    0U,	// G_FDIV
    0U,	// G_FREM
    0U,	// G_FMODF
    0U,	// G_FPOW
    0U,	// G_FPOWI
    0U,	// G_FEXP
    0U,	// G_FEXP2
    0U,	// G_FEXP10
    0U,	// G_FLOG
    0U,	// G_FLOG2
    0U,	// G_FLOG10
    0U,	// G_FLDEXP
    0U,	// G_FFREXP
    0U,	// G_FNEG
    0U,	// G_FPEXT
    0U,	// G_FPTRUNC
    0U,	// G_FPTOSI
    0U,	// G_FPTOUI
    0U,	// G_SITOFP
    0U,	// G_UITOFP
    0U,	// G_FPTOSI_SAT
    0U,	// G_FPTOUI_SAT
    0U,	// G_FABS
    0U,	// G_FCOPYSIGN
    0U,	// G_IS_FPCLASS
    0U,	// G_FCANONICALIZE
    0U,	// G_FMINNUM
    0U,	// G_FMAXNUM
    0U,	// G_FMINNUM_IEEE
    0U,	// G_FMAXNUM_IEEE
    0U,	// G_FMINIMUM
    0U,	// G_FMAXIMUM
    0U,	// G_FMINIMUMNUM
    0U,	// G_FMAXIMUMNUM
    0U,	// G_GET_FPENV
    0U,	// G_SET_FPENV
    0U,	// G_RESET_FPENV
    0U,	// G_GET_FPMODE
    0U,	// G_SET_FPMODE
    0U,	// G_RESET_FPMODE
    0U,	// G_GET_ROUNDING
    0U,	// G_SET_ROUNDING
    0U,	// G_PTR_ADD
    0U,	// G_PTRMASK
    0U,	// G_SMIN
    0U,	// G_SMAX
    0U,	// G_UMIN
    0U,	// G_UMAX
    0U,	// G_ABS
    0U,	// G_LROUND
    0U,	// G_LLROUND
    0U,	// G_BR
    0U,	// G_BRJT
    0U,	// G_VSCALE
    0U,	// G_INSERT_SUBVECTOR
    0U,	// G_EXTRACT_SUBVECTOR
    0U,	// G_INSERT_VECTOR_ELT
    0U,	// G_EXTRACT_VECTOR_ELT
    0U,	// G_SHUFFLE_VECTOR
    0U,	// G_SPLAT_VECTOR
    0U,	// G_STEP_VECTOR
    0U,	// G_VECTOR_COMPRESS
    0U,	// G_CTTZ
    0U,	// G_CTTZ_ZERO_UNDEF
    0U,	// G_CTLZ
    0U,	// G_CTLZ_ZERO_UNDEF
    0U,	// G_CTPOP
    0U,	// G_BSWAP
    0U,	// G_BITREVERSE
    0U,	// G_FCEIL
    0U,	// G_FCOS
    0U,	// G_FSIN
    0U,	// G_FSINCOS
    0U,	// G_FTAN
    0U,	// G_FACOS
    0U,	// G_FASIN
    0U,	// G_FATAN
    0U,	// G_FATAN2
    0U,	// G_FCOSH
    0U,	// G_FSINH
    0U,	// G_FTANH
    0U,	// G_FSQRT
    0U,	// G_FFLOOR
    0U,	// G_FRINT
    0U,	// G_FNEARBYINT
    0U,	// G_ADDRSPACE_CAST
    0U,	// G_BLOCK_ADDR
    0U,	// G_JUMP_TABLE
    0U,	// G_DYN_STACKALLOC
    0U,	// G_STACKSAVE
    0U,	// G_STACKRESTORE
    0U,	// G_STRICT_FADD
    0U,	// G_STRICT_FSUB
    0U,	// G_STRICT_FMUL
    0U,	// G_STRICT_FDIV
    0U,	// G_STRICT_FREM
    0U,	// G_STRICT_FMA
    0U,	// G_STRICT_FSQRT
    0U,	// G_STRICT_FLDEXP
    0U,	// G_READ_REGISTER
    0U,	// G_WRITE_REGISTER
    0U,	// G_MEMCPY
    0U,	// G_MEMCPY_INLINE
    0U,	// G_MEMMOVE
    0U,	// G_MEMSET
    0U,	// G_BZERO
    0U,	// G_TRAP
    0U,	// G_DEBUGTRAP
    0U,	// G_UBSANTRAP
    0U,	// G_VECREDUCE_SEQ_FADD
    0U,	// G_VECREDUCE_SEQ_FMUL
    0U,	// G_VECREDUCE_FADD
    0U,	// G_VECREDUCE_FMUL
    0U,	// G_VECREDUCE_FMAX
    0U,	// G_VECREDUCE_FMIN
    0U,	// G_VECREDUCE_FMAXIMUM
    0U,	// G_VECREDUCE_FMINIMUM
    0U,	// G_VECREDUCE_ADD
    0U,	// G_VECREDUCE_MUL
    0U,	// G_VECREDUCE_AND
    0U,	// G_VECREDUCE_OR
    0U,	// G_VECREDUCE_XOR
    0U,	// G_VECREDUCE_SMAX
    0U,	// G_VECREDUCE_SMIN
    0U,	// G_VECREDUCE_UMAX
    0U,	// G_VECREDUCE_UMIN
    0U,	// G_SBFX
    0U,	// G_UBFX
    0U,	// ATOMIC_CMP_SWAP_I128
    0U,	// ATOMIC_LOAD_ADD_I128
    0U,	// ATOMIC_LOAD_AND_I128
    0U,	// ATOMIC_LOAD_NAND_I128
    0U,	// ATOMIC_LOAD_OR_I128
    0U,	// ATOMIC_LOAD_SUB_I128
    0U,	// ATOMIC_LOAD_XOR_I128
    0U,	// ATOMIC_SWAP_I128
    0U,	// BUILD_QUADWORD
    0U,	// BUILD_UACC
    0U,	// CFENCE
    0U,	// CFENCE8
    0U,	// CLRLSLDI
    0U,	// CLRLSLDI_rec
    1032U,	// CLRLSLWI
    1032U,	// CLRLSLWI_rec
    256U,	// CLRRDI
    256U,	// CLRRDI_rec
    264U,	// CLRRWI
    264U,	// CLRRWI_rec
    0U,	// DCBFL
    0U,	// DCBFLP
    0U,	// DCBFPS
    0U,	// DCBFx
    0U,	// DCBSTPS
    0U,	// DCBTCT
    0U,	// DCBTDS
    0U,	// DCBTSTCT
    0U,	// DCBTSTDS
    0U,	// DCBTSTT
    0U,	// DCBTSTx
    0U,	// DCBTT
    0U,	// DCBTx
    0U,	// DFLOADf32
    0U,	// DFLOADf64
    0U,	// DFSTOREf32
    0U,	// DFSTOREf64
    0U,	// EXTLDI
    0U,	// EXTLDI_rec
    1032U,	// EXTLWI
    1032U,	// EXTLWI_rec
    0U,	// EXTRDI
    0U,	// EXTRDI_rec
    1032U,	// EXTRWI
    1032U,	// EXTRWI_rec
    1032U,	// INSLWI
    1032U,	// INSLWI_rec
    0U,	// INSRDI
    0U,	// INSRDI_rec
    1032U,	// INSRWI
    1032U,	// INSRWI_rec
    0U,	// KILL_PAIR
    0U,	// LAx
    0U,	// LIWAX
    0U,	// LIWZX
    0U,	// PPCLdFixedAddr
    272U,	// PSUBI
    2056U,	// RLWIMIbm
    2056U,	// RLWIMIbm_rec
    2056U,	// RLWINMbm
    2056U,	// RLWINMbm_rec
    2056U,	// RLWNMbm
    2056U,	// RLWNMbm_rec
    256U,	// ROTRDI
    256U,	// ROTRDI_rec
    264U,	// ROTRWI
    264U,	// ROTRWI_rec
    256U,	// SLDI
    256U,	// SLDI_rec
    264U,	// SLWI
    264U,	// SLWI_rec
    0U,	// SPILLTOVSR_LD
    0U,	// SPILLTOVSR_LDX
    0U,	// SPILLTOVSR_ST
    0U,	// SPILLTOVSR_STX
    256U,	// SRDI
    256U,	// SRDI_rec
    264U,	// SRWI
    264U,	// SRWI_rec
    0U,	// STIWX
    24U,	// SUBI
    24U,	// SUBIC
    24U,	// SUBIC_rec
    24U,	// SUBIS
    0U,	// SUBPCIS
    0U,	// XFLOADf32
    0U,	// XFLOADf64
    0U,	// XFSTOREf32
    0U,	// XFSTOREf64
    288U,	// ADD4
    288U,	// ADD4O
    288U,	// ADD4O_rec
    288U,	// ADD4TLS
    288U,	// ADD4_rec
    288U,	// ADD8
    288U,	// ADD8O
    288U,	// ADD8O_rec
    288U,	// ADD8TLS
    288U,	// ADD8TLS_
    288U,	// ADD8_rec
    288U,	// ADDC
    288U,	// ADDC8
    288U,	// ADDC8O
    288U,	// ADDC8O_rec
    288U,	// ADDC8_rec
    288U,	// ADDCO
    288U,	// ADDCO_rec
    288U,	// ADDC_rec
    288U,	// ADDE
    288U,	// ADDE8
    288U,	// ADDE8O
    288U,	// ADDE8O_rec
    288U,	// ADDE8_rec
    288U,	// ADDEO
    288U,	// ADDEO_rec
    3104U,	// ADDEX
    3104U,	// ADDEX8
    288U,	// ADDE_rec
    288U,	// ADDG6S
    288U,	// ADDG6S8
    24U,	// ADDI
    24U,	// ADDI8
    24U,	// ADDIC
    24U,	// ADDIC8
    24U,	// ADDIC_rec
    24U,	// ADDIS
    24U,	// ADDIS8
    0U,	// ADDISdtprelHA
    0U,	// ADDISdtprelHA32
    0U,	// ADDISgotTprelHA
    0U,	// ADDIStlsgdHA
    0U,	// ADDIStlsldHA
    0U,	// ADDIStocHA
    0U,	// ADDIStocHA8
    0U,	// ADDIdtprelL
    0U,	// ADDIdtprelL32
    0U,	// ADDItlsgdL
    0U,	// ADDItlsgdL32
    0U,	// ADDItlsgdLADDR
    0U,	// ADDItlsgdLADDR32
    0U,	// ADDItlsldL
    0U,	// ADDItlsldL32
    0U,	// ADDItlsldLADDR
    0U,	// ADDItlsldLADDR32
    0U,	// ADDItoc
    0U,	// ADDItoc8
    0U,	// ADDItocL
    0U,	// ADDItocL8
    0U,	// ADDME
    0U,	// ADDME8
    0U,	// ADDME8O
    0U,	// ADDME8O_rec
    0U,	// ADDME8_rec
    0U,	// ADDMEO
    0U,	// ADDMEO_rec
    0U,	// ADDME_rec
    0U,	// ADDPCIS
    0U,	// ADDZE
    0U,	// ADDZE8
    0U,	// ADDZE8O
    0U,	// ADDZE8O_rec
    0U,	// ADDZE8_rec
    0U,	// ADDZEO
    0U,	// ADDZEO_rec
    0U,	// ADDZE_rec
    0U,	// ADJCALLSTACKDOWN
    0U,	// ADJCALLSTACKUP
    288U,	// AND
    288U,	// AND8
    288U,	// AND8_rec
    288U,	// ANDC
    288U,	// ANDC8
    288U,	// ANDC8_rec
    288U,	// ANDC_rec
    40U,	// ANDI8_rec
    40U,	// ANDIS8_rec
    40U,	// ANDIS_rec
    40U,	// ANDI_rec
    0U,	// ANDI_rec_1_EQ_BIT
    0U,	// ANDI_rec_1_EQ_BIT8
    0U,	// ANDI_rec_1_GT_BIT
    0U,	// ANDI_rec_1_GT_BIT8
    288U,	// AND_rec
    1U,	// ATOMIC_CMP_SWAP_I16
    1U,	// ATOMIC_CMP_SWAP_I32
    0U,	// ATOMIC_CMP_SWAP_I64
    0U,	// ATOMIC_CMP_SWAP_I8
    0U,	// ATOMIC_LOAD_ADD_I16
    0U,	// ATOMIC_LOAD_ADD_I32
    0U,	// ATOMIC_LOAD_ADD_I64
    0U,	// ATOMIC_LOAD_ADD_I8
    0U,	// ATOMIC_LOAD_AND_I16
    0U,	// ATOMIC_LOAD_AND_I32
    0U,	// ATOMIC_LOAD_AND_I64
    0U,	// ATOMIC_LOAD_AND_I8
    0U,	// ATOMIC_LOAD_MAX_I16
    0U,	// ATOMIC_LOAD_MAX_I32
    0U,	// ATOMIC_LOAD_MAX_I64
    0U,	// ATOMIC_LOAD_MAX_I8
    0U,	// ATOMIC_LOAD_MIN_I16
    0U,	// ATOMIC_LOAD_MIN_I32
    0U,	// ATOMIC_LOAD_MIN_I64
    0U,	// ATOMIC_LOAD_MIN_I8
    0U,	// ATOMIC_LOAD_NAND_I16
    0U,	// ATOMIC_LOAD_NAND_I32
    0U,	// ATOMIC_LOAD_NAND_I64
    0U,	// ATOMIC_LOAD_NAND_I8
    0U,	// ATOMIC_LOAD_OR_I16
    0U,	// ATOMIC_LOAD_OR_I32
    0U,	// ATOMIC_LOAD_OR_I64
    0U,	// ATOMIC_LOAD_OR_I8
    0U,	// ATOMIC_LOAD_SUB_I16
    0U,	// ATOMIC_LOAD_SUB_I32
    0U,	// ATOMIC_LOAD_SUB_I64
    0U,	// ATOMIC_LOAD_SUB_I8
    0U,	// ATOMIC_LOAD_UMAX_I16
    0U,	// ATOMIC_LOAD_UMAX_I32
    0U,	// ATOMIC_LOAD_UMAX_I64
    0U,	// ATOMIC_LOAD_UMAX_I8
    0U,	// ATOMIC_LOAD_UMIN_I16
    0U,	// ATOMIC_LOAD_UMIN_I32
    0U,	// ATOMIC_LOAD_UMIN_I64
    0U,	// ATOMIC_LOAD_UMIN_I8
    0U,	// ATOMIC_LOAD_XOR_I16
    0U,	// ATOMIC_LOAD_XOR_I32
    0U,	// ATOMIC_LOAD_XOR_I64
    0U,	// ATOMIC_LOAD_XOR_I8
    0U,	// ATOMIC_SWAP_I16
    0U,	// ATOMIC_SWAP_I32
    0U,	// ATOMIC_SWAP_I64
    0U,	// ATOMIC_SWAP_I8
    0U,	// ATTN
    0U,	// B
    0U,	// BA
    0U,	// BC
    0U,	// BCC
    0U,	// BCCA
    0U,	// BCCCTR
    0U,	// BCCCTR8
    0U,	// BCCCTRL
    0U,	// BCCCTRL8
    0U,	// BCCL
    0U,	// BCCLA
    0U,	// BCCLR
    0U,	// BCCLRL
    0U,	// BCCTR
    0U,	// BCCTR8
    0U,	// BCCTR8n
    0U,	// BCCTRL
    0U,	// BCCTRL8
    0U,	// BCCTRL8n
    0U,	// BCCTRLn
    0U,	// BCCTRn
    4128U,	// BCDADD_rec
    304U,	// BCDCFN_rec
    304U,	// BCDCFSQ_rec
    304U,	// BCDCFZ_rec
    288U,	// BCDCPSGN_rec
    0U,	// BCDCTN_rec
    0U,	// BCDCTSQ_rec
    304U,	// BCDCTZ_rec
    304U,	// BCDSETSGN_rec
    4128U,	// BCDSR_rec
    4128U,	// BCDSUB_rec
    4128U,	// BCDS_rec
    4128U,	// BCDTRUNC_rec
    288U,	// BCDUS_rec
    288U,	// BCDUTRUNC_rec
    0U,	// BCL
    0U,	// BCLR
    0U,	// BCLRL
    0U,	// BCLRLn
    0U,	// BCLRn
    0U,	// BCLalways
    0U,	// BCLn
    0U,	// BCTR
    0U,	// BCTR8
    0U,	// BCTRL
    0U,	// BCTRL8
    0U,	// BCTRL8_LDinto_toc
    0U,	// BCTRL8_LDinto_toc_RM
    0U,	// BCTRL8_RM
    0U,	// BCTRL_LWZinto_toc
    0U,	// BCTRL_LWZinto_toc_RM
    0U,	// BCTRL_RM
    0U,	// BCn
    0U,	// BDNZ
    0U,	// BDNZ8
    0U,	// BDNZA
    0U,	// BDNZAm
    0U,	// BDNZAp
    0U,	// BDNZL
    0U,	// BDNZLA
    0U,	// BDNZLAm
    0U,	// BDNZLAp
    0U,	// BDNZLR
    0U,	// BDNZLR8
    0U,	// BDNZLRL
    0U,	// BDNZLRLm
    0U,	// BDNZLRLp
    0U,	// BDNZLRm
    0U,	// BDNZLRp
    0U,	// BDNZLm
    0U,	// BDNZLp
    0U,	// BDNZm
    0U,	// BDNZp
    0U,	// BDZ
    0U,	// BDZ8
    0U,	// BDZA
    0U,	// BDZAm
    0U,	// BDZAp
    0U,	// BDZL
    0U,	// BDZLA
    0U,	// BDZLAm
    0U,	// BDZLAp
    0U,	// BDZLR
    0U,	// BDZLR8
    0U,	// BDZLRL
    0U,	// BDZLRLm
    0U,	// BDZLRLp
    0U,	// BDZLRm
    0U,	// BDZLRp
    0U,	// BDZLm
    0U,	// BDZLp
    0U,	// BDZm
    0U,	// BDZp
    0U,	// BL
    0U,	// BL8
    0U,	// BL8_NOP
    0U,	// BL8_NOP_RM
    0U,	// BL8_NOP_TLS
    0U,	// BL8_NOTOC
    0U,	// BL8_NOTOC_RM
    0U,	// BL8_NOTOC_TLS
    0U,	// BL8_RM
    0U,	// BL8_TLS
    0U,	// BL8_TLS_
    0U,	// BLA
    0U,	// BLA8
    0U,	// BLA8_NOP
    0U,	// BLA8_NOP_RM
    0U,	// BLA8_RM
    0U,	// BLA_RM
    0U,	// BLR
    0U,	// BLR8
    0U,	// BLRL
    0U,	// BL_NOP
    0U,	// BL_NOP_RM
    0U,	// BL_RM
    0U,	// BL_TLS
    288U,	// BPERMD
    0U,	// BRD
    0U,	// BRH
    0U,	// BRH8
    288U,	// BRINC
    0U,	// BRW
    0U,	// BRW8
    0U,	// CBCDTD
    0U,	// CBCDTD8
    0U,	// CDTBCD
    0U,	// CDTBCD8
    288U,	// CFUGED
    0U,	// CLRBHRB
    288U,	// CMPB
    288U,	// CMPB8
    288U,	// CMPD
    24U,	// CMPDI
    288U,	// CMPEQB
    288U,	// CMPLD
    40U,	// CMPLDI
    288U,	// CMPLW
    40U,	// CMPLWI
    2080U,	// CMPRB
    2080U,	// CMPRB8
    288U,	// CMPW
    24U,	// CMPWI
    0U,	// CNTLZD
    288U,	// CNTLZDM
    0U,	// CNTLZD_rec
    0U,	// CNTLZW
    0U,	// CNTLZW8
    0U,	// CNTLZW8_rec
    0U,	// CNTLZW_rec
    0U,	// CNTTZD
    288U,	// CNTTZDM
    0U,	// CNTTZD_rec
    0U,	// CNTTZW
    0U,	// CNTTZW8
    0U,	// CNTTZW8_rec
    0U,	// CNTTZW_rec
    0U,	// CP_ABORT
    0U,	// CP_COPY
    0U,	// CP_COPY8
    304U,	// CP_PASTE8_rec
    304U,	// CP_PASTE_rec
    0U,	// CR6SET
    0U,	// CR6UNSET
    288U,	// CRAND
    288U,	// CRANDC
    288U,	// CREQV
    288U,	// CRNAND
    288U,	// CRNOR
    0U,	// CRNOT
    288U,	// CROR
    288U,	// CRORC
    56U,	// CRSET
    56U,	// CRUNSET
    288U,	// CRXOR
    0U,	// CTRL_DEP
    288U,	// DADD
    288U,	// DADDQ
    288U,	// DADDQ_rec
    288U,	// DADD_rec
    0U,	// DARN
    0U,	// DCBA
    0U,	// DCBF
    0U,	// DCBFEP
    0U,	// DCBI
    0U,	// DCBST
    0U,	// DCBSTEP
    0U,	// DCBT
    0U,	// DCBTEP
    0U,	// DCBTST
    0U,	// DCBTSTEP
    0U,	// DCBZ
    0U,	// DCBZEP
    0U,	// DCBZL
    0U,	// DCBZLEP
    0U,	// DCCCI
    0U,	// DCFFIX
    0U,	// DCFFIXQ
    0U,	// DCFFIXQQ
    0U,	// DCFFIXQ_rec
    0U,	// DCFFIX_rec
    288U,	// DCMPO
    288U,	// DCMPOQ
    288U,	// DCMPU
    288U,	// DCMPUQ
    0U,	// DCTDP
    0U,	// DCTDP_rec
    0U,	// DCTFIX
    0U,	// DCTFIXQ
    0U,	// DCTFIXQQ
    0U,	// DCTFIXQ_rec
    0U,	// DCTFIX_rec
    0U,	// DCTQPQ
    0U,	// DCTQPQ_rec
    0U,	// DDEDPD
    0U,	// DDEDPDQ
    0U,	// DDEDPDQ_rec
    0U,	// DDEDPD_rec
    288U,	// DDIV
    288U,	// DDIVQ
    288U,	// DDIVQ_rec
    288U,	// DDIV_rec
    0U,	// DENBCD
    0U,	// DENBCDQ
    0U,	// DENBCDQ_rec
    0U,	// DENBCD_rec
    288U,	// DIEX
    288U,	// DIEXQ
    288U,	// DIEXQ_rec
    288U,	// DIEX_rec
    288U,	// DIVD
    288U,	// DIVDE
    288U,	// DIVDEO
    288U,	// DIVDEO_rec
    288U,	// DIVDEU
    288U,	// DIVDEUO
    288U,	// DIVDEUO_rec
    288U,	// DIVDEU_rec
    288U,	// DIVDE_rec
    288U,	// DIVDO
    288U,	// DIVDO_rec
    288U,	// DIVDU
    288U,	// DIVDUO
    288U,	// DIVDUO_rec
    288U,	// DIVDU_rec
    288U,	// DIVD_rec
    288U,	// DIVW
    288U,	// DIVWE
    288U,	// DIVWEO
    288U,	// DIVWEO_rec
    288U,	// DIVWEU
    288U,	// DIVWEUO
    288U,	// DIVWEUO_rec
    288U,	// DIVWEU_rec
    288U,	// DIVWE_rec
    288U,	// DIVWO
    288U,	// DIVWO_rec
    288U,	// DIVWU
    288U,	// DIVWUO
    288U,	// DIVWUO_rec
    288U,	// DIVWU_rec
    288U,	// DIVW_rec
    0U,	// DMMR
    0U,	// DMSETDMRZ
    64U,	// DMSHA2HASH
    0U,	// DMSHA3HASH
    288U,	// DMUL
    288U,	// DMULQ
    288U,	// DMULQ_rec
    288U,	// DMUL_rec
    0U,	// DMXOR
    288U,	// DMXVBF16GERX2
    328U,	// DMXVBF16GERX2NN
    328U,	// DMXVBF16GERX2NP
    328U,	// DMXVBF16GERX2PN
    328U,	// DMXVBF16GERX2PP
    288U,	// DMXVF16GERX2
    328U,	// DMXVF16GERX2NN
    328U,	// DMXVF16GERX2NP
    328U,	// DMXVF16GERX2PN
    328U,	// DMXVF16GERX2PP
    288U,	// DMXVI8GERX4
    328U,	// DMXVI8GERX4PP
    328U,	// DMXVI8GERX4SPP
    336U,	// DMXXEXTFDMR256
    544U,	// DMXXEXTFDMR512
    800U,	// DMXXEXTFDMR512_HI
    336U,	// DMXXINSTDMR256
    544U,	// DMXXINSTDMR512
    800U,	// DMXXINSTDMR512_HI
    0U,	// DMXXSETACCZ
    88U,	// DMXXSHAPAD
    3104U,	// DQUA
    0U,	// DQUAI
    0U,	// DQUAIQ
    0U,	// DQUAIQ_rec
    0U,	// DQUAI_rec
    3104U,	// DQUAQ
    3104U,	// DQUAQ_rec
    3104U,	// DQUA_rec
    0U,	// DRDPQ
    0U,	// DRDPQ_rec
    0U,	// DRINTN
    0U,	// DRINTNQ
    0U,	// DRINTNQ_rec
    0U,	// DRINTN_rec
    0U,	// DRINTX
    0U,	// DRINTXQ
    0U,	// DRINTXQ_rec
    0U,	// DRINTX_rec
    3104U,	// DRRND
    3104U,	// DRRNDQ
    3104U,	// DRRNDQ_rec
    3104U,	// DRRND_rec
    0U,	// DRSP
    0U,	// DRSP_rec
    256U,	// DSCLI
    256U,	// DSCLIQ
    256U,	// DSCLIQ_rec
    256U,	// DSCLI_rec
    256U,	// DSCRI
    256U,	// DSCRIQ
    256U,	// DSCRIQ_rec
    256U,	// DSCRI_rec
    0U,	// DSS
    0U,	// DSSALL
    96U,	// DST
    96U,	// DST64
    96U,	// DSTST
    96U,	// DSTST64
    96U,	// DSTSTT
    96U,	// DSTSTT64
    96U,	// DSTT
    96U,	// DSTT64
    288U,	// DSUB
    288U,	// DSUBQ
    288U,	// DSUBQ_rec
    288U,	// DSUB_rec
    256U,	// DTSTDC
    256U,	// DTSTDCQ
    256U,	// DTSTDG
    256U,	// DTSTDGQ
    288U,	// DTSTEX
    288U,	// DTSTEXQ
    288U,	// DTSTSF
    0U,	// DTSTSFI
    0U,	// DTSTSFIQ
    288U,	// DTSTSFQ
    0U,	// DXEX
    0U,	// DXEXQ
    0U,	// DXEXQ_rec
    0U,	// DXEX_rec
    0U,	// DYNALLOC
    0U,	// DYNALLOC8
    0U,	// DYNAREAOFFSET
    0U,	// DYNAREAOFFSET8
    0U,	// DecreaseCTR8loop
    0U,	// DecreaseCTRloop
    0U,	// EFDABS
    288U,	// EFDADD
    0U,	// EFDCFS
    0U,	// EFDCFSF
    0U,	// EFDCFSI
    0U,	// EFDCFSID
    0U,	// EFDCFUF
    0U,	// EFDCFUI
    0U,	// EFDCFUID
    288U,	// EFDCMPEQ
    288U,	// EFDCMPGT
    288U,	// EFDCMPLT
    0U,	// EFDCTSF
    0U,	// EFDCTSI
    0U,	// EFDCTSIDZ
    0U,	// EFDCTSIZ
    0U,	// EFDCTUF
    0U,	// EFDCTUI
    0U,	// EFDCTUIDZ
    0U,	// EFDCTUIZ
    288U,	// EFDDIV
    288U,	// EFDMUL
    0U,	// EFDNABS
    0U,	// EFDNEG
    288U,	// EFDSUB
    288U,	// EFDTSTEQ
    288U,	// EFDTSTGT
    288U,	// EFDTSTLT
    0U,	// EFSABS
    288U,	// EFSADD
    0U,	// EFSCFD
    0U,	// EFSCFSF
    0U,	// EFSCFSI
    0U,	// EFSCFUF
    0U,	// EFSCFUI
    288U,	// EFSCMPEQ
    288U,	// EFSCMPGT
    288U,	// EFSCMPLT
    0U,	// EFSCTSF
    0U,	// EFSCTSI
    0U,	// EFSCTSIZ
    0U,	// EFSCTUF
    0U,	// EFSCTUI
    0U,	// EFSCTUIZ
    288U,	// EFSDIV
    288U,	// EFSMUL
    0U,	// EFSNABS
    0U,	// EFSNEG
    288U,	// EFSSUB
    288U,	// EFSTSTEQ
    288U,	// EFSTSTGT
    288U,	// EFSTSTLT
    0U,	// EH_SjLj_LongJmp32
    0U,	// EH_SjLj_LongJmp64
    0U,	// EH_SjLj_SetJmp32
    0U,	// EH_SjLj_SetJmp64
    0U,	// EH_SjLj_Setup
    288U,	// EQV
    288U,	// EQV8
    288U,	// EQV8_rec
    288U,	// EQV_rec
    0U,	// EVABS
    360U,	// EVADDIW
    0U,	// EVADDSMIAAW
    0U,	// EVADDSSIAAW
    0U,	// EVADDUMIAAW
    0U,	// EVADDUSIAAW
    288U,	// EVADDW
    288U,	// EVAND
    288U,	// EVANDC
    288U,	// EVCMPEQ
    288U,	// EVCMPGTS
    288U,	// EVCMPGTU
    288U,	// EVCMPLTS
    288U,	// EVCMPLTU
    0U,	// EVCNTLSW
    0U,	// EVCNTLZW
    288U,	// EVDIVWS
    288U,	// EVDIVWU
    288U,	// EVEQV
    0U,	// EVEXTSB
    0U,	// EVEXTSH
    0U,	// EVFSABS
    288U,	// EVFSADD
    0U,	// EVFSCFSF
    0U,	// EVFSCFSI
    0U,	// EVFSCFUF
    0U,	// EVFSCFUI
    288U,	// EVFSCMPEQ
    288U,	// EVFSCMPGT
    288U,	// EVFSCMPLT
    0U,	// EVFSCTSF
    0U,	// EVFSCTSI
    0U,	// EVFSCTSIZ
    0U,	// EVFSCTUF
    0U,	// EVFSCTUI
    0U,	// EVFSCTUIZ
    288U,	// EVFSDIV
    288U,	// EVFSMUL
    0U,	// EVFSNABS
    0U,	// EVFSNEG
    288U,	// EVFSSUB
    288U,	// EVFSTSTEQ
    288U,	// EVFSTSTGT
    288U,	// EVFSTSTLT
    0U,	// EVLDD
    0U,	// EVLDDX
    0U,	// EVLDH
    0U,	// EVLDHX
    0U,	// EVLDW
    0U,	// EVLDWX
    0U,	// EVLHHESPLAT
    0U,	// EVLHHESPLATX
    0U,	// EVLHHOSSPLAT
    0U,	// EVLHHOSSPLATX
    0U,	// EVLHHOUSPLAT
    0U,	// EVLHHOUSPLATX
    0U,	// EVLWHE
    0U,	// EVLWHEX
    0U,	// EVLWHOS
    0U,	// EVLWHOSX
    0U,	// EVLWHOU
    0U,	// EVLWHOUX
    0U,	// EVLWHSPLAT
    0U,	// EVLWHSPLATX
    0U,	// EVLWWSPLAT
    0U,	// EVLWWSPLATX
    288U,	// EVMERGEHI
    288U,	// EVMERGEHILO
    288U,	// EVMERGELO
    288U,	// EVMERGELOHI
    288U,	// EVMHEGSMFAA
    288U,	// EVMHEGSMFAN
    288U,	// EVMHEGSMIAA
    288U,	// EVMHEGSMIAN
    288U,	// EVMHEGUMIAA
    288U,	// EVMHEGUMIAN
    288U,	// EVMHESMF
    288U,	// EVMHESMFA
    288U,	// EVMHESMFAAW
    288U,	// EVMHESMFANW
    288U,	// EVMHESMI
    288U,	// EVMHESMIA
    288U,	// EVMHESMIAAW
    288U,	// EVMHESMIANW
    288U,	// EVMHESSF
    288U,	// EVMHESSFA
    288U,	// EVMHESSFAAW
    288U,	// EVMHESSFANW
    288U,	// EVMHESSIAAW
    288U,	// EVMHESSIANW
    288U,	// EVMHEUMI
    288U,	// EVMHEUMIA
    288U,	// EVMHEUMIAAW
    288U,	// EVMHEUMIANW
    288U,	// EVMHEUSIAAW
    288U,	// EVMHEUSIANW
    288U,	// EVMHOGSMFAA
    288U,	// EVMHOGSMFAN
    288U,	// EVMHOGSMIAA
    288U,	// EVMHOGSMIAN
    288U,	// EVMHOGUMIAA
    288U,	// EVMHOGUMIAN
    288U,	// EVMHOSMF
    288U,	// EVMHOSMFA
    288U,	// EVMHOSMFAAW
    288U,	// EVMHOSMFANW
    288U,	// EVMHOSMI
    288U,	// EVMHOSMIA
    288U,	// EVMHOSMIAAW
    288U,	// EVMHOSMIANW
    288U,	// EVMHOSSF
    288U,	// EVMHOSSFA
    288U,	// EVMHOSSFAAW
    288U,	// EVMHOSSFANW
    288U,	// EVMHOSSIAAW
    288U,	// EVMHOSSIANW
    288U,	// EVMHOUMI
    288U,	// EVMHOUMIA
    288U,	// EVMHOUMIAAW
    288U,	// EVMHOUMIANW
    288U,	// EVMHOUSIAAW
    288U,	// EVMHOUSIANW
    0U,	// EVMRA
    288U,	// EVMWHSMF
    288U,	// EVMWHSMFA
    288U,	// EVMWHSMI
    288U,	// EVMWHSMIA
    288U,	// EVMWHSSF
    288U,	// EVMWHSSFA
    288U,	// EVMWHUMI
    288U,	// EVMWHUMIA
    288U,	// EVMWLSMIAAW
    288U,	// EVMWLSMIANW
    288U,	// EVMWLSSIAAW
    288U,	// EVMWLSSIANW
    288U,	// EVMWLUMI
    288U,	// EVMWLUMIA
    288U,	// EVMWLUMIAAW
    288U,	// EVMWLUMIANW
    288U,	// EVMWLUSIAAW
    288U,	// EVMWLUSIANW
    288U,	// EVMWSMF
    288U,	// EVMWSMFA
    288U,	// EVMWSMFAA
    288U,	// EVMWSMFAN
    288U,	// EVMWSMI
    288U,	// EVMWSMIA
    288U,	// EVMWSMIAA
    288U,	// EVMWSMIAN
    288U,	// EVMWSSF
    288U,	// EVMWSSFA
    288U,	// EVMWSSFAA
    288U,	// EVMWSSFAN
    288U,	// EVMWUMI
    288U,	// EVMWUMIA
    288U,	// EVMWUMIAA
    288U,	// EVMWUMIAN
    288U,	// EVNAND
    0U,	// EVNEG
    288U,	// EVNOR
    288U,	// EVOR
    288U,	// EVORC
    288U,	// EVRLW
    264U,	// EVRLWI
    0U,	// EVRNDW
    0U,	// EVSEL
    288U,	// EVSLW
    264U,	// EVSLWI
    0U,	// EVSPLATFI
    0U,	// EVSPLATI
    264U,	// EVSRWIS
    264U,	// EVSRWIU
    288U,	// EVSRWS
    288U,	// EVSRWU
    0U,	// EVSTDD
    0U,	// EVSTDDX
    0U,	// EVSTDH
    0U,	// EVSTDHX
    0U,	// EVSTDW
    0U,	// EVSTDWX
    0U,	// EVSTWHE
    0U,	// EVSTWHEX
    0U,	// EVSTWHO
    0U,	// EVSTWHOX
    0U,	// EVSTWWE
    0U,	// EVSTWWEX
    0U,	// EVSTWWO
    0U,	// EVSTWWOX
    0U,	// EVSUBFSMIAAW
    0U,	// EVSUBFSSIAAW
    0U,	// EVSUBFUMIAAW
    0U,	// EVSUBFUSIAAW
    288U,	// EVSUBFW
    288U,	// EVSUBIFW
    288U,	// EVXOR
    0U,	// EXTSB
    0U,	// EXTSB8
    0U,	// EXTSB8_32_64
    0U,	// EXTSB8_rec
    0U,	// EXTSB_rec
    0U,	// EXTSH
    0U,	// EXTSH8
    0U,	// EXTSH8_32_64
    0U,	// EXTSH8_rec
    0U,	// EXTSH_rec
    0U,	// EXTSW
    256U,	// EXTSWSLI
    256U,	// EXTSWSLI_32_64
    256U,	// EXTSWSLI_32_64_rec
    256U,	// EXTSWSLI_rec
    0U,	// EXTSW_32
    0U,	// EXTSW_32_64
    0U,	// EXTSW_32_64_rec
    0U,	// EXTSW_rec
    0U,	// EnforceIEIO
    0U,	// FABSD
    0U,	// FABSD_rec
    0U,	// FABSS
    0U,	// FABSS_rec
    288U,	// FADD
    288U,	// FADDS
    288U,	// FADDS_rec
    288U,	// FADD_rec
    0U,	// FADDrtz
    0U,	// FCFID
    0U,	// FCFIDS
    0U,	// FCFIDS_rec
    0U,	// FCFIDU
    0U,	// FCFIDUS
    0U,	// FCFIDUS_rec
    0U,	// FCFIDU_rec
    0U,	// FCFID_rec
    288U,	// FCMPOD
    288U,	// FCMPOS
    288U,	// FCMPUD
    288U,	// FCMPUS
    288U,	// FCPSGND
    288U,	// FCPSGND_rec
    288U,	// FCPSGNS
    288U,	// FCPSGNS_rec
    0U,	// FCTID
    0U,	// FCTIDU
    0U,	// FCTIDUZ
    0U,	// FCTIDUZ_rec
    0U,	// FCTIDU_rec
    0U,	// FCTIDZ
    0U,	// FCTIDZ_rec
    0U,	// FCTID_rec
    0U,	// FCTIW
    0U,	// FCTIWU
    0U,	// FCTIWUZ
    0U,	// FCTIWUZ_rec
    0U,	// FCTIWU_rec
    0U,	// FCTIWZ
    0U,	// FCTIWZ_rec
    0U,	// FCTIW_rec
    288U,	// FDIV
    288U,	// FDIVS
    288U,	// FDIVS_rec
    288U,	// FDIV_rec
    0U,	// FENCE
    2080U,	// FMADD
    2080U,	// FMADDS
    2080U,	// FMADDS_rec
    2080U,	// FMADD_rec
    0U,	// FMR
    0U,	// FMR_rec
    2080U,	// FMSUB
    2080U,	// FMSUBS
    2080U,	// FMSUBS_rec
    2080U,	// FMSUB_rec
    288U,	// FMUL
    288U,	// FMULS
    288U,	// FMULS_rec
    288U,	// FMUL_rec
    0U,	// FNABSD
    0U,	// FNABSD_rec
    0U,	// FNABSS
    0U,	// FNABSS_rec
    0U,	// FNEGD
    0U,	// FNEGD_rec
    0U,	// FNEGS
    0U,	// FNEGS_rec
    2080U,	// FNMADD
    2080U,	// FNMADDS
    2080U,	// FNMADDS_rec
    2080U,	// FNMADD_rec
    2080U,	// FNMSUB
    2080U,	// FNMSUBS
    2080U,	// FNMSUBS_rec
    2080U,	// FNMSUB_rec
    0U,	// FRE
    0U,	// FRES
    0U,	// FRES_rec
    0U,	// FRE_rec
    0U,	// FRIMD
    0U,	// FRIMD_rec
    0U,	// FRIMS
    0U,	// FRIMS_rec
    0U,	// FRIND
    0U,	// FRIND_rec
    0U,	// FRINS
    0U,	// FRINS_rec
    0U,	// FRIPD
    0U,	// FRIPD_rec
    0U,	// FRIPS
    0U,	// FRIPS_rec
    0U,	// FRIZD
    0U,	// FRIZD_rec
    0U,	// FRIZS
    0U,	// FRIZS_rec
    0U,	// FRSP
    0U,	// FRSP_rec
    0U,	// FRSQRTE
    0U,	// FRSQRTES
    0U,	// FRSQRTES_rec
    0U,	// FRSQRTE_rec
    2080U,	// FSELD
    2080U,	// FSELD_rec
    2080U,	// FSELS
    2080U,	// FSELS_rec
    0U,	// FSQRT
    0U,	// FSQRTS
    0U,	// FSQRTS_rec
    0U,	// FSQRT_rec
    288U,	// FSUB
    288U,	// FSUBS
    288U,	// FSUBS_rec
    288U,	// FSUB_rec
    288U,	// FTDIV
    0U,	// FTSQRT
    0U,	// GETtlsADDR
    0U,	// GETtlsADDR32
    0U,	// GETtlsADDR32AIX
    0U,	// GETtlsADDR64AIX
    0U,	// GETtlsADDRPCREL
    0U,	// GETtlsMOD32AIX
    0U,	// GETtlsMOD64AIX
    0U,	// GETtlsTpointer32AIX
    0U,	// GETtlsldADDR
    0U,	// GETtlsldADDR32
    0U,	// GETtlsldADDRPCREL
    0U,	// HASHCHK
    0U,	// HASHCHK8
    0U,	// HASHCHKP
    0U,	// HASHCHKP8
    0U,	// HASHST
    0U,	// HASHST8
    0U,	// HASHSTP
    0U,	// HASHSTP8
    0U,	// HRFID
    0U,	// ICBI
    0U,	// ICBIEP
    0U,	// ICBLC
    0U,	// ICBLQ
    0U,	// ICBT
    0U,	// ICBTLS
    0U,	// ICCCI
    2080U,	// ISEL
    2080U,	// ISEL8
    0U,	// ISYNC
    0U,	// LA
    0U,	// LA8
    0U,	// LBARX
    1U,	// LBARXL
    0U,	// LBEPX
    0U,	// LBZ
    0U,	// LBZ8
    288U,	// LBZCIX
    0U,	// LBZU
    0U,	// LBZU8
    0U,	// LBZUX
    0U,	// LBZUX8
    0U,	// LBZX
    0U,	// LBZX8
    288U,	// LBZXTLS
    288U,	// LBZXTLS_
    288U,	// LBZXTLS_32
    0U,	// LD
    0U,	// LDARX
    1U,	// LDARXL
    368U,	// LDAT
    0U,	// LDAT_PSEUDO
    0U,	// LDBRX
    288U,	// LDCIX
    0U,	// LDU
    0U,	// LDUX
    0U,	// LDX
    288U,	// LDXTLS
    288U,	// LDXTLS_
    0U,	// LDgotTprelL
    0U,	// LDgotTprelL32
    0U,	// LDtoc
    0U,	// LDtocBA
    0U,	// LDtocCPT
    0U,	// LDtocJTI
    0U,	// LDtocL
    0U,	// LFD
    0U,	// LFDEPX
    0U,	// LFDU
    0U,	// LFDUX
    0U,	// LFDX
    288U,	// LFDXTLS
    288U,	// LFDXTLS_
    0U,	// LFIWAX
    0U,	// LFIWZX
    0U,	// LFS
    0U,	// LFSU
    0U,	// LFSUX
    0U,	// LFSX
    288U,	// LFSXTLS
    288U,	// LFSXTLS_
    0U,	// LHA
    0U,	// LHA8
    0U,	// LHARX
    1U,	// LHARXL
    0U,	// LHAU
    0U,	// LHAU8
    0U,	// LHAUX
    0U,	// LHAUX8
    0U,	// LHAX
    0U,	// LHAX8
    288U,	// LHAXTLS
    288U,	// LHAXTLS_
    288U,	// LHAXTLS_32
    0U,	// LHBRX
    0U,	// LHBRX8
    0U,	// LHEPX
    0U,	// LHZ
    0U,	// LHZ8
    288U,	// LHZCIX
    0U,	// LHZU
    0U,	// LHZU8
    0U,	// LHZUX
    0U,	// LHZUX8
    0U,	// LHZX
    0U,	// LHZX8
    288U,	// LHZXTLS
    288U,	// LHZXTLS_
    288U,	// LHZXTLS_32
    0U,	// LI
    0U,	// LI8
    0U,	// LIS
    0U,	// LIS8
    0U,	// LMW
    0U,	// LQ
    0U,	// LQARX
    1U,	// LQARXL
    0U,	// LQX_PSEUDO
    264U,	// LSWI
    0U,	// LVEBX
    0U,	// LVEHX
    0U,	// LVEWX
    0U,	// LVSL
    0U,	// LVSR
    0U,	// LVX
    0U,	// LVXL
    0U,	// LWA
    0U,	// LWARX
    1U,	// LWARXL
    368U,	// LWAT
    0U,	// LWAT_PSEUDO
    0U,	// LWAUX
    0U,	// LWAX
    288U,	// LWAXTLS
    288U,	// LWAXTLS_
    288U,	// LWAXTLS_32
    0U,	// LWAX_32
    0U,	// LWA_32
    0U,	// LWBRX
    0U,	// LWBRX8
    0U,	// LWEPX
    0U,	// LWZ
    0U,	// LWZ8
    288U,	// LWZCIX
    0U,	// LWZU
    0U,	// LWZU8
    0U,	// LWZUX
    0U,	// LWZUX8
    0U,	// LWZX
    0U,	// LWZX8
    288U,	// LWZXTLS
    288U,	// LWZXTLS_
    288U,	// LWZXTLS_32
    0U,	// LWZtoc
    0U,	// LWZtocL
    0U,	// LXSD
    0U,	// LXSDX
    0U,	// LXSIBZX
    0U,	// LXSIHZX
    0U,	// LXSIWAX
    0U,	// LXSIWZX
    0U,	// LXSSP
    0U,	// LXSSPX
    0U,	// LXV
    0U,	// LXVB16X
    0U,	// LXVD2X
    0U,	// LXVDSX
    0U,	// LXVH8X
    0U,	// LXVKQ
    288U,	// LXVL
    288U,	// LXVLL
    0U,	// LXVP
    288U,	// LXVPB32X
    288U,	// LXVPRL
    288U,	// LXVPRLL
    0U,	// LXVPX
    0U,	// LXVRBX
    0U,	// LXVRDX
    0U,	// LXVRHX
    288U,	// LXVRL
    288U,	// LXVRLL
    0U,	// LXVRWX
    0U,	// LXVW4X
    0U,	// LXVWSX
    0U,	// LXVX
    2080U,	// MADDHD
    2080U,	// MADDHDU
    2080U,	// MADDLD
    2080U,	// MADDLD8
    0U,	// MBAR
    0U,	// MCRF
    0U,	// MCRFS
    0U,	// MCRXRX
    0U,	// MFBHRBE
    0U,	// MFCR
    0U,	// MFCR8
    0U,	// MFCTR
    0U,	// MFCTR8
    0U,	// MFDCR
    0U,	// MFFS
    0U,	// MFFSCDRN
    0U,	// MFFSCDRNI
    0U,	// MFFSCE
    0U,	// MFFSCRN
    0U,	// MFFSCRNI
    0U,	// MFFSL
    0U,	// MFFS_rec
    0U,	// MFLR
    0U,	// MFLR8
    0U,	// MFMSR
    0U,	// MFOCRF
    0U,	// MFOCRF8
    0U,	// MFPMR
    0U,	// MFSPR
    0U,	// MFSPR8
    0U,	// MFSR
    0U,	// MFSRIN
    0U,	// MFTB
    0U,	// MFTB8
    0U,	// MFUDSCR
    0U,	// MFVRD
    0U,	// MFVRSAVE
    0U,	// MFVRSAVEv
    0U,	// MFVRWZ
    0U,	// MFVSCR
    0U,	// MFVSRD
    0U,	// MFVSRLD
    0U,	// MFVSRWZ
    288U,	// MODSD
    288U,	// MODSW
    288U,	// MODUD
    288U,	// MODUW
    0U,	// MSGSYNC
    0U,	// MSYNC
    0U,	// MTCRF
    0U,	// MTCRF8
    0U,	// MTCTR
    0U,	// MTCTR8
    0U,	// MTCTR8loop
    0U,	// MTCTRloop
    0U,	// MTDCR
    0U,	// MTFSB0
    0U,	// MTFSB1
    2096U,	// MTFSF
    2U,	// MTFSFI
    2U,	// MTFSFI_rec
    0U,	// MTFSFIb
    2096U,	// MTFSF_rec
    0U,	// MTFSFb
    0U,	// MTLPL
    0U,	// MTLPL8
    0U,	// MTLR
    0U,	// MTLR8
    0U,	// MTMSR
    0U,	// MTMSRD
    0U,	// MTOCRF
    0U,	// MTOCRF8
    0U,	// MTPMR
    0U,	// MTSPR
    0U,	// MTSPR8
    0U,	// MTSR
    0U,	// MTSRIN
    0U,	// MTUDSCR
    0U,	// MTVRD
    0U,	// MTVRSAVE
    0U,	// MTVRSAVEv
    0U,	// MTVRWA
    0U,	// MTVRWZ
    0U,	// MTVSCR
    0U,	// MTVSRBM
    0U,	// MTVSRBMI
    0U,	// MTVSRD
    288U,	// MTVSRDD
    0U,	// MTVSRDM
    0U,	// MTVSRHM
    0U,	// MTVSRQM
    0U,	// MTVSRWA
    0U,	// MTVSRWM
    0U,	// MTVSRWS
    0U,	// MTVSRWZ
    288U,	// MULHD
    288U,	// MULHDU
    288U,	// MULHDU_rec
    288U,	// MULHD_rec
    288U,	// MULHW
    288U,	// MULHWU
    288U,	// MULHWU_rec
    288U,	// MULHW_rec
    288U,	// MULLD
    288U,	// MULLDO
    288U,	// MULLDO_rec
    288U,	// MULLD_rec
    24U,	// MULLI
    24U,	// MULLI8
    288U,	// MULLW
    288U,	// MULLWO
    288U,	// MULLWO_rec
    288U,	// MULLW_rec
    0U,	// MoveGOTtoLR
    0U,	// MovePCtoLR
    0U,	// MovePCtoLR8
    288U,	// NAND
    288U,	// NAND8
    288U,	// NAND8_rec
    288U,	// NAND_rec
    0U,	// NAP
    0U,	// NEG
    0U,	// NEG8
    0U,	// NEG8O
    0U,	// NEG8O_rec
    0U,	// NEG8_rec
    0U,	// NEGO
    0U,	// NEGO_rec
    0U,	// NEG_rec
    0U,	// NOP
    0U,	// NOP_GT_PWR6
    0U,	// NOP_GT_PWR7
    288U,	// NOR
    288U,	// NOR8
    288U,	// NOR8_rec
    288U,	// NOR_rec
    288U,	// OR
    288U,	// OR8
    288U,	// OR8_rec
    288U,	// ORC
    288U,	// ORC8
    288U,	// ORC8_rec
    288U,	// ORC_rec
    40U,	// ORI
    40U,	// ORI8
    40U,	// ORIS
    40U,	// ORIS8
    288U,	// OR_rec
    528U,	// PADDI
    528U,	// PADDI8
    3U,	// PADDI8pc
    120U,	// PADDIS
    120U,	// PADDIS8
    3U,	// PADDIS8pc
    3U,	// PADDISpc
    0U,	// PADDIdtprel
    3U,	// PADDIpc
    288U,	// PDEPD
    288U,	// PEXTD
    0U,	// PLA
    0U,	// PLA8
    0U,	// PLA8pc
    0U,	// PLApc
    4U,	// PLBZ
    4U,	// PLBZ8
    0U,	// PLBZ8nopc
    0U,	// PLBZ8onlypc
    0U,	// PLBZ8pc
    0U,	// PLBZnopc
    0U,	// PLBZonlypc
    0U,	// PLBZpc
    4U,	// PLD
    0U,	// PLDnopc
    0U,	// PLDonlypc
    0U,	// PLDpc
    4U,	// PLFD
    0U,	// PLFDnopc
    0U,	// PLFDonlypc
    0U,	// PLFDpc
    4U,	// PLFS
    0U,	// PLFSnopc
    0U,	// PLFSonlypc
    0U,	// PLFSpc
    4U,	// PLHA
    4U,	// PLHA8
    0U,	// PLHA8nopc
    0U,	// PLHA8onlypc
    0U,	// PLHA8pc
    0U,	// PLHAnopc
    0U,	// PLHAonlypc
    0U,	// PLHApc
    4U,	// PLHZ
    4U,	// PLHZ8
    0U,	// PLHZ8nopc
    0U,	// PLHZ8onlypc
    0U,	// PLHZ8pc
    0U,	// PLHZnopc
    0U,	// PLHZonlypc
    0U,	// PLHZpc
    0U,	// PLI
    0U,	// PLI8
    4U,	// PLWA
    4U,	// PLWA8
    0U,	// PLWA8nopc
    0U,	// PLWA8onlypc
    0U,	// PLWA8pc
    0U,	// PLWAnopc
    0U,	// PLWAonlypc
    0U,	// PLWApc
    4U,	// PLWZ
    4U,	// PLWZ8
    0U,	// PLWZ8nopc
    0U,	// PLWZ8onlypc
    0U,	// PLWZ8pc
    0U,	// PLWZnopc
    0U,	// PLWZonlypc
    0U,	// PLWZpc
    4U,	// PLXSD
    0U,	// PLXSDnopc
    0U,	// PLXSDonlypc
    0U,	// PLXSDpc
    4U,	// PLXSSP
    0U,	// PLXSSPnopc
    0U,	// PLXSSPonlypc
    0U,	// PLXSSPpc
    4U,	// PLXV
    4U,	// PLXVP
    0U,	// PLXVPnopc
    0U,	// PLXVPonlypc
    0U,	// PLXVPpc
    0U,	// PLXVnopc
    0U,	// PLXVonlypc
    0U,	// PLXVpc
    21536U,	// PMDMXVBF16GERX2
    38984U,	// PMDMXVBF16GERX2NN
    38984U,	// PMDMXVBF16GERX2NP
    38984U,	// PMDMXVBF16GERX2PN
    38984U,	// PMDMXVBF16GERX2PP
    21536U,	// PMDMXVF16GERX2
    38984U,	// PMDMXVF16GERX2NN
    38984U,	// PMDMXVF16GERX2NP
    38984U,	// PMDMXVF16GERX2PN
    38984U,	// PMDMXVF16GERX2PP
    54304U,	// PMDMXVI8GERX4
    71752U,	// PMDMXVI8GERX4PP
    71752U,	// PMDMXVI8GERX4SPP
    220192U,	// PMXVBF16GER2
    1368136U,	// PMXVBF16GER2NN
    1368136U,	// PMXVBF16GER2NP
    1368136U,	// PMXVBF16GER2PN
    1368136U,	// PMXVBF16GER2PP
    220192U,	// PMXVBF16GER2W
    1368136U,	// PMXVBF16GER2WNN
    1368136U,	// PMXVBF16GER2WNP
    1368136U,	// PMXVBF16GER2WPN
    1368136U,	// PMXVBF16GER2WPP
    220192U,	// PMXVF16GER2
    1368136U,	// PMXVF16GER2NN
    1368136U,	// PMXVF16GER2NP
    1368136U,	// PMXVF16GER2PN
    1368136U,	// PMXVF16GER2PP
    220192U,	// PMXVF16GER2W
    1368136U,	// PMXVF16GER2WNN
    1368136U,	// PMXVF16GER2WNP
    1368136U,	// PMXVF16GER2WPN
    1368136U,	// PMXVF16GER2WPP
    2317344U,	// PMXVF32GER
    57416U,	// PMXVF32GERNN
    57416U,	// PMXVF32GERNP
    57416U,	// PMXVF32GERPN
    57416U,	// PMXVF32GERPP
    2317344U,	// PMXVF32GERW
    57416U,	// PMXVF32GERWNN
    57416U,	// PMXVF32GERWNP
    57416U,	// PMXVF32GERWPN
    57416U,	// PMXVF32GERWPP
    482336U,	// PMXVF64GER
    24648U,	// PMXVF64GERNN
    24648U,	// PMXVF64GERNP
    24648U,	// PMXVF64GERPN
    24648U,	// PMXVF64GERPP
    482336U,	// PMXVF64GERW
    24648U,	// PMXVF64GERWNN
    24648U,	// PMXVF64GERWNP
    24648U,	// PMXVF64GERWPN
    24648U,	// PMXVF64GERWPP
    220192U,	// PMXVI16GER2
    1368136U,	// PMXVI16GER2PP
    220192U,	// PMXVI16GER2S
    1368136U,	// PMXVI16GER2SPP
    220192U,	// PMXVI16GER2SW
    1368136U,	// PMXVI16GER2SWPP
    220192U,	// PMXVI16GER2W
    1368136U,	// PMXVI16GER2WPP
    8608800U,	// PMXVI4GER8
    3465288U,	// PMXVI4GER8PP
    8608800U,	// PMXVI4GER8W
    3465288U,	// PMXVI4GER8WPP
    16997408U,	// PMXVI8GER4
    4513864U,	// PMXVI8GER4PP
    4513864U,	// PMXVI8GER4SPP
    16997408U,	// PMXVI8GER4W
    4513864U,	// PMXVI8GER4WPP
    4513864U,	// PMXVI8GER4WSPP
    0U,	// POPCNTB
    0U,	// POPCNTB8
    0U,	// POPCNTD
    0U,	// POPCNTW
    0U,	// PPC32GOT
    0U,	// PPC32PICGOT
    0U,	// PREPARE_PROBED_ALLOCA_32
    0U,	// PREPARE_PROBED_ALLOCA_64
    0U,	// PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32
    0U,	// PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64
    0U,	// PROBED_ALLOCA_32
    0U,	// PROBED_ALLOCA_64
    0U,	// PROBED_STACKALLOC_32
    0U,	// PROBED_STACKALLOC_64
    4U,	// PSTB
    4U,	// PSTB8
    0U,	// PSTB8nopc
    0U,	// PSTB8onlypc
    0U,	// PSTB8pc
    0U,	// PSTBnopc
    0U,	// PSTBonlypc
    0U,	// PSTBpc
    4U,	// PSTD
    0U,	// PSTDnopc
    0U,	// PSTDonlypc
    0U,	// PSTDpc
    4U,	// PSTFD
    0U,	// PSTFDnopc
    0U,	// PSTFDonlypc
    0U,	// PSTFDpc
    4U,	// PSTFS
    0U,	// PSTFSnopc
    0U,	// PSTFSonlypc
    0U,	// PSTFSpc
    4U,	// PSTH
    4U,	// PSTH8
    0U,	// PSTH8nopc
    0U,	// PSTH8onlypc
    0U,	// PSTH8pc
    0U,	// PSTHnopc
    0U,	// PSTHonlypc
    0U,	// PSTHpc
    4U,	// PSTW
    4U,	// PSTW8
    0U,	// PSTW8nopc
    0U,	// PSTW8onlypc
    0U,	// PSTW8pc
    0U,	// PSTWnopc
    0U,	// PSTWonlypc
    0U,	// PSTWpc
    4U,	// PSTXSD
    0U,	// PSTXSDnopc
    0U,	// PSTXSDonlypc
    0U,	// PSTXSDpc
    4U,	// PSTXSSP
    0U,	// PSTXSSPnopc
    0U,	// PSTXSSPonlypc
    0U,	// PSTXSSPpc
    4U,	// PSTXV
    4U,	// PSTXVP
    0U,	// PSTXVPnopc
    0U,	// PSTXVPonlypc
    0U,	// PSTXVPpc
    0U,	// PSTXVnopc
    0U,	// PSTXVonlypc
    0U,	// PSTXVpc
    0U,	// PTESYNCIO
    0U,	// PseudoEIEIO
    0U,	// RESTORE_ACC
    0U,	// RESTORE_CR
    0U,	// RESTORE_CRBIT
    0U,	// RESTORE_DMR
    0U,	// RESTORE_DMRP
    0U,	// RESTORE_QUADWORD
    0U,	// RESTORE_UACC
    0U,	// RESTORE_WACC
    0U,	// RFCI
    0U,	// RFDI
    0U,	// RFEBB
    0U,	// RFI
    0U,	// RFID
    0U,	// RFMCI
    32U,	// RLDCL
    32U,	// RLDCL_rec
    32U,	// RLDCR
    32U,	// RLDCR_rec
    0U,	// RLDIC
    0U,	// RLDICL
    0U,	// RLDICL_32
    0U,	// RLDICL_32_64
    0U,	// RLDICL_32_rec
    0U,	// RLDICL_rec
    0U,	// RLDICR
    0U,	// RLDICR_32
    0U,	// RLDICR_rec
    0U,	// RLDIC_rec
    128U,	// RLDIMI
    128U,	// RLDIMI_rec
    9328U,	// RLWIMI
    9328U,	// RLWIMI8
    9328U,	// RLWIMI8_rec
    9328U,	// RLWIMI_rec
    607240U,	// RLWINM
    607240U,	// RLWINM8
    607240U,	// RLWINM8_rec
    607240U,	// RLWINM_rec
    607264U,	// RLWNM
    607264U,	// RLWNM8
    607264U,	// RLWNM8_rec
    607264U,	// RLWNM_rec
    0U,	// ReadTB
    0U,	// SC
    0U,	// SCV
    0U,	// SELECT_CC_F16
    0U,	// SELECT_CC_F4
    0U,	// SELECT_CC_F8
    0U,	// SELECT_CC_I4
    0U,	// SELECT_CC_I8
    0U,	// SELECT_CC_SPE
    0U,	// SELECT_CC_SPE4
    0U,	// SELECT_CC_VRRC
    0U,	// SELECT_CC_VSFRC
    0U,	// SELECT_CC_VSRC
    0U,	// SELECT_CC_VSSRC
    0U,	// SELECT_F16
    0U,	// SELECT_F4
    0U,	// SELECT_F8
    0U,	// SELECT_I4
    0U,	// SELECT_I8
    0U,	// SELECT_SPE
    0U,	// SELECT_SPE4
    0U,	// SELECT_VRRC
    0U,	// SELECT_VSFRC
    0U,	// SELECT_VSRC
    0U,	// SELECT_VSSRC
    0U,	// SETB
    0U,	// SETB8
    0U,	// SETBC
    0U,	// SETBC8
    0U,	// SETBCR
    0U,	// SETBCR8
    0U,	// SETFLM
    0U,	// SETNBC
    0U,	// SETNBC8
    0U,	// SETNBCR
    0U,	// SETNBCR8
    0U,	// SETRND
    0U,	// SETRNDi
    0U,	// SLBFEE_rec
    0U,	// SLBIA
    0U,	// SLBIE
    0U,	// SLBIEG
    0U,	// SLBMFEE
    0U,	// SLBMFEV
    0U,	// SLBMTE
    0U,	// SLBSYNC
    288U,	// SLD
    288U,	// SLD_rec
    288U,	// SLW
    288U,	// SLW8
    288U,	// SLW8_rec
    288U,	// SLW_rec
    0U,	// SPELWZ
    0U,	// SPELWZX
    0U,	// SPESTW
    0U,	// SPESTWX
    0U,	// SPILL_ACC
    0U,	// SPILL_CR
    0U,	// SPILL_CRBIT
    0U,	// SPILL_DMR
    0U,	// SPILL_DMRP
    0U,	// SPILL_QUADWORD
    0U,	// SPILL_UACC
    0U,	// SPILL_WACC
    0U,	// SPLIT_QUADWORD
    288U,	// SRAD
    256U,	// SRADI
    256U,	// SRADI_32
    256U,	// SRADI_rec
    288U,	// SRAD_rec
    288U,	// SRAW
    288U,	// SRAW8
    288U,	// SRAW8_rec
    264U,	// SRAWI
    264U,	// SRAWI8
    264U,	// SRAWI8_rec
    264U,	// SRAWI_rec
    288U,	// SRAW_rec
    288U,	// SRD
    288U,	// SRD_rec
    288U,	// SRW
    288U,	// SRW8
    288U,	// SRW8_rec
    288U,	// SRW_rec
    0U,	// STB
    0U,	// STB8
    288U,	// STBCIX
    0U,	// STBCX
    0U,	// STBEPX
    0U,	// STBU
    0U,	// STBU8
    0U,	// STBUX
    0U,	// STBUX8
    0U,	// STBX
    0U,	// STBX8
    288U,	// STBXTLS
    288U,	// STBXTLS_
    288U,	// STBXTLS_32
    0U,	// STD
    264U,	// STDAT
    0U,	// STDBRX
    288U,	// STDCIX
    0U,	// STDCX
    0U,	// STDU
    0U,	// STDUX
    0U,	// STDX
    288U,	// STDXTLS
    288U,	// STDXTLS_
    0U,	// STFD
    0U,	// STFDEPX
    0U,	// STFDU
    0U,	// STFDUX
    0U,	// STFDX
    288U,	// STFDXTLS
    288U,	// STFDXTLS_
    0U,	// STFIWX
    0U,	// STFS
    0U,	// STFSU
    0U,	// STFSUX
    0U,	// STFSX
    288U,	// STFSXTLS
    288U,	// STFSXTLS_
    0U,	// STH
    0U,	// STH8
    0U,	// STHBRX
    288U,	// STHCIX
    0U,	// STHCX
    0U,	// STHEPX
    0U,	// STHU
    0U,	// STHU8
    0U,	// STHUX
    0U,	// STHUX8
    0U,	// STHX
    0U,	// STHX8
    288U,	// STHXTLS
    288U,	// STHXTLS_
    288U,	// STHXTLS_32
    0U,	// STMW
    0U,	// STOP
    0U,	// STQ
    0U,	// STQCX
    0U,	// STQX_PSEUDO
    264U,	// STSWI
    0U,	// STVEBX
    0U,	// STVEHX
    0U,	// STVEWX
    0U,	// STVX
    0U,	// STVXL
    0U,	// STW
    0U,	// STW8
    264U,	// STWAT
    0U,	// STWBRX
    288U,	// STWCIX
    0U,	// STWCX
    0U,	// STWEPX
    0U,	// STWU
    0U,	// STWU8
    0U,	// STWUX
    0U,	// STWUX8
    0U,	// STWX
    0U,	// STWX8
    288U,	// STWXTLS
    288U,	// STWXTLS_
    288U,	// STWXTLS_32
    0U,	// STXSD
    0U,	// STXSDX
    0U,	// STXSIBX
    0U,	// STXSIBXv
    0U,	// STXSIHX
    0U,	// STXSIHXv
    0U,	// STXSIWX
    0U,	// STXSSP
    0U,	// STXSSPX
    0U,	// STXV
    0U,	// STXVB16X
    0U,	// STXVD2X
    0U,	// STXVH8X
    288U,	// STXVL
    288U,	// STXVLL
    0U,	// STXVP
    288U,	// STXVPB32X
    288U,	// STXVPRL
    288U,	// STXVPRLL
    0U,	// STXVPX
    0U,	// STXVRBX
    0U,	// STXVRDX
    0U,	// STXVRHX
    288U,	// STXVRL
    288U,	// STXVRLL
    0U,	// STXVRWX
    0U,	// STXVW4X
    0U,	// STXVX
    288U,	// SUBF
    288U,	// SUBF8
    288U,	// SUBF8O
    288U,	// SUBF8O_rec
    288U,	// SUBF8_rec
    288U,	// SUBFC
    288U,	// SUBFC8
    288U,	// SUBFC8O
    288U,	// SUBFC8O_rec
    288U,	// SUBFC8_rec
    288U,	// SUBFCO
    288U,	// SUBFCO_rec
    288U,	// SUBFC_rec
    288U,	// SUBFE
    288U,	// SUBFE8
    288U,	// SUBFE8O
    288U,	// SUBFE8O_rec
    288U,	// SUBFE8_rec
    288U,	// SUBFEO
    288U,	// SUBFEO_rec
    288U,	// SUBFE_rec
    24U,	// SUBFIC
    24U,	// SUBFIC8
    0U,	// SUBFME
    0U,	// SUBFME8
    0U,	// SUBFME8O
    0U,	// SUBFME8O_rec
    0U,	// SUBFME8_rec
    0U,	// SUBFMEO
    0U,	// SUBFMEO_rec
    0U,	// SUBFME_rec
    288U,	// SUBFO
    288U,	// SUBFO_rec
    0U,	// SUBFUS
    0U,	// SUBFUS_rec
    0U,	// SUBFZE
    0U,	// SUBFZE8
    0U,	// SUBFZE8O
    0U,	// SUBFZE8O_rec
    0U,	// SUBFZE8_rec
    0U,	// SUBFZEO
    0U,	// SUBFZEO_rec
    0U,	// SUBFZE_rec
    288U,	// SUBF_rec
    0U,	// SYNC
    0U,	// SYNCP10
    0U,	// TABORT
    288U,	// TABORTDC
    264U,	// TABORTDCI
    288U,	// TABORTWC
    264U,	// TABORTWCI
    0U,	// TAILB
    0U,	// TAILB8
    0U,	// TAILBA
    0U,	// TAILBA8
    0U,	// TAILBCTR
    0U,	// TAILBCTR8
    0U,	// TBEGIN
    0U,	// TBEGIN_RET
    0U,	// TCHECK
    0U,	// TCHECK_RET
    0U,	// TCRETURNai
    0U,	// TCRETURNai8
    0U,	// TCRETURNdi
    0U,	// TCRETURNdi8
    0U,	// TCRETURNri
    0U,	// TCRETURNri8
    288U,	// TD
    24U,	// TDI
    0U,	// TEND
    0U,	// TLBIA
    0U,	// TLBIE
    2838608U,	// TLBIE8P9
    336U,	// TLBIEIO
    0U,	// TLBIEL
    2838608U,	// TLBIEP
    2838608U,	// TLBIEP8
    2838608U,	// TLBIEP9
    288U,	// TLBILX
    0U,	// TLBIVAX
    0U,	// TLBLD
    0U,	// TLBLI
    0U,	// TLBRE
    288U,	// TLBRE2
    0U,	// TLBSX
    288U,	// TLBSX2
    288U,	// TLBSX2D
    0U,	// TLBSYNC
    0U,	// TLBSYNCIO
    0U,	// TLBWE
    288U,	// TLBWE2
    0U,	// TLSGDAIX
    0U,	// TLSGDAIX8
    0U,	// TLSLDAIX
    0U,	// TLSLDAIX8
    0U,	// TRAP
    0U,	// TRECHKPT
    0U,	// TRECLAIM
    0U,	// TSR
    288U,	// TW
    24U,	// TWI
    0U,	// UNENCODED_NOP
    0U,	// UpdateGBR
    288U,	// VABSDUB
    288U,	// VABSDUH
    288U,	// VABSDUW
    288U,	// VADDCUQ
    288U,	// VADDCUW
    2080U,	// VADDECUQ
    2080U,	// VADDEUQM
    288U,	// VADDFP
    288U,	// VADDSBS
    288U,	// VADDSHS
    288U,	// VADDSWS
    288U,	// VADDUBM
    288U,	// VADDUBS
    288U,	// VADDUDM
    288U,	// VADDUHM
    288U,	// VADDUHS
    288U,	// VADDUQM
    288U,	// VADDUWM
    288U,	// VADDUWS
    288U,	// VAND
    288U,	// VANDC
    288U,	// VAVGSB
    288U,	// VAVGSH
    288U,	// VAVGSW
    288U,	// VAVGUB
    288U,	// VAVGUH
    288U,	// VAVGUW
    288U,	// VBPERMD
    288U,	// VBPERMQ
    136U,	// VCFSX
    4U,	// VCFSX_0
    288U,	// VCFUGED
    136U,	// VCFUX
    4U,	// VCFUX_0
    288U,	// VCIPHER
    288U,	// VCIPHERLAST
    288U,	// VCLRLB
    288U,	// VCLRRB
    0U,	// VCLZB
    0U,	// VCLZD
    288U,	// VCLZDM
    0U,	// VCLZH
    0U,	// VCLZLSBB
    0U,	// VCLZW
    288U,	// VCMPBFP
    288U,	// VCMPBFP_rec
    288U,	// VCMPEQFP
    288U,	// VCMPEQFP_rec
    288U,	// VCMPEQUB
    288U,	// VCMPEQUB_rec
    288U,	// VCMPEQUD
    288U,	// VCMPEQUD_rec
    288U,	// VCMPEQUH
    288U,	// VCMPEQUH_rec
    288U,	// VCMPEQUQ
    288U,	// VCMPEQUQ_rec
    288U,	// VCMPEQUW
    288U,	// VCMPEQUW_rec
    288U,	// VCMPGEFP
    288U,	// VCMPGEFP_rec
    288U,	// VCMPGTFP
    288U,	// VCMPGTFP_rec
    288U,	// VCMPGTSB
    288U,	// VCMPGTSB_rec
    288U,	// VCMPGTSD
    288U,	// VCMPGTSD_rec
    288U,	// VCMPGTSH
    288U,	// VCMPGTSH_rec
    288U,	// VCMPGTSQ
    288U,	// VCMPGTSQ_rec
    288U,	// VCMPGTSW
    288U,	// VCMPGTSW_rec
    288U,	// VCMPGTUB
    288U,	// VCMPGTUB_rec
    288U,	// VCMPGTUD
    288U,	// VCMPGTUD_rec
    288U,	// VCMPGTUH
    288U,	// VCMPGTUH_rec
    288U,	// VCMPGTUQ
    288U,	// VCMPGTUQ_rec
    288U,	// VCMPGTUW
    288U,	// VCMPGTUW_rec
    288U,	// VCMPNEB
    288U,	// VCMPNEB_rec
    288U,	// VCMPNEH
    288U,	// VCMPNEH_rec
    288U,	// VCMPNEW
    288U,	// VCMPNEW_rec
    288U,	// VCMPNEZB
    288U,	// VCMPNEZB_rec
    288U,	// VCMPNEZH
    288U,	// VCMPNEZH_rec
    288U,	// VCMPNEZW
    288U,	// VCMPNEZW_rec
    288U,	// VCMPSQ
    288U,	// VCMPUQ
    304U,	// VCNTMBB
    304U,	// VCNTMBD
    304U,	// VCNTMBH
    304U,	// VCNTMBW
    136U,	// VCTSXS
    4U,	// VCTSXS_0
    136U,	// VCTUXS
    4U,	// VCTUXS_0
    0U,	// VCTZB
    0U,	// VCTZD
    288U,	// VCTZDM
    0U,	// VCTZH
    0U,	// VCTZLSBB
    0U,	// VCTZW
    288U,	// VDIVESD
    288U,	// VDIVESQ
    288U,	// VDIVESW
    288U,	// VDIVEUD
    288U,	// VDIVEUQ
    288U,	// VDIVEUW
    288U,	// VDIVSD
    288U,	// VDIVSQ
    288U,	// VDIVSW
    288U,	// VDIVUD
    288U,	// VDIVUQ
    288U,	// VDIVUW
    288U,	// VEQV
    0U,	// VEXPANDBM
    0U,	// VEXPANDDM
    0U,	// VEXPANDHM
    0U,	// VEXPANDQM
    0U,	// VEXPANDWM
    0U,	// VEXPTEFP
    2080U,	// VEXTDDVLX
    2080U,	// VEXTDDVRX
    2080U,	// VEXTDUBVLX
    2080U,	// VEXTDUBVRX
    2080U,	// VEXTDUHVLX
    2080U,	// VEXTDUHVRX
    2080U,	// VEXTDUWVLX
    2080U,	// VEXTDUWVRX
    0U,	// VEXTRACTBM
    144U,	// VEXTRACTD
    0U,	// VEXTRACTDM
    0U,	// VEXTRACTHM
    0U,	// VEXTRACTQM
    144U,	// VEXTRACTUB
    144U,	// VEXTRACTUH
    144U,	// VEXTRACTUW
    0U,	// VEXTRACTWM
    0U,	// VEXTSB2D
    0U,	// VEXTSB2Ds
    0U,	// VEXTSB2W
    0U,	// VEXTSB2Ws
    0U,	// VEXTSD2Q
    0U,	// VEXTSH2D
    0U,	// VEXTSH2Ds
    0U,	// VEXTSH2W
    0U,	// VEXTSH2Ws
    0U,	// VEXTSW2D
    0U,	// VEXTSW2Ds
    288U,	// VEXTUBLX
    288U,	// VEXTUBRX
    288U,	// VEXTUHLX
    288U,	// VEXTUHRX
    288U,	// VEXTUWLX
    288U,	// VEXTUWRX
    0U,	// VGBBD
    152U,	// VGNB
    328U,	// VINSBLX
    328U,	// VINSBRX
    328U,	// VINSBVLX
    328U,	// VINSBVRX
    0U,	// VINSD
    328U,	// VINSDLX
    328U,	// VINSDRX
    0U,	// VINSERTB
    144U,	// VINSERTD
    0U,	// VINSERTH
    144U,	// VINSERTW
    328U,	// VINSHLX
    328U,	// VINSHRX
    328U,	// VINSHVLX
    328U,	// VINSHVRX
    0U,	// VINSW
    328U,	// VINSWLX
    328U,	// VINSWRX
    328U,	// VINSWVLX
    328U,	// VINSWVRX
    0U,	// VLOGEFP
    2080U,	// VMADDFP
    288U,	// VMAXFP
    288U,	// VMAXSB
    288U,	// VMAXSD
    288U,	// VMAXSH
    288U,	// VMAXSW
    288U,	// VMAXUB
    288U,	// VMAXUD
    288U,	// VMAXUH
    288U,	// VMAXUW
    2080U,	// VMHADDSHS
    2080U,	// VMHRADDSHS
    288U,	// VMINFP
    288U,	// VMINSB
    288U,	// VMINSD
    288U,	// VMINSH
    288U,	// VMINSW
    288U,	// VMINUB
    288U,	// VMINUD
    288U,	// VMINUH
    288U,	// VMINUW
    2080U,	// VMLADDUHM
    288U,	// VMODSD
    288U,	// VMODSQ
    288U,	// VMODSW
    288U,	// VMODUD
    288U,	// VMODUQ
    288U,	// VMODUW
    288U,	// VMRGEW
    288U,	// VMRGHB
    288U,	// VMRGHH
    288U,	// VMRGHW
    288U,	// VMRGLB
    288U,	// VMRGLH
    288U,	// VMRGLW
    288U,	// VMRGOW
    2080U,	// VMSUMCUD
    2080U,	// VMSUMMBM
    2080U,	// VMSUMSHM
    2080U,	// VMSUMSHS
    2080U,	// VMSUMUBM
    2080U,	// VMSUMUDM
    2080U,	// VMSUMUHM
    2080U,	// VMSUMUHS
    0U,	// VMUL10CUQ
    288U,	// VMUL10ECUQ
    288U,	// VMUL10EUQ
    0U,	// VMUL10UQ
    288U,	// VMULESB
    288U,	// VMULESD
    288U,	// VMULESH
    288U,	// VMULESW
    288U,	// VMULEUB
    288U,	// VMULEUD
    288U,	// VMULEUH
    288U,	// VMULEUW
    288U,	// VMULHSD
    288U,	// VMULHSW
    288U,	// VMULHUD
    288U,	// VMULHUW
    288U,	// VMULLD
    288U,	// VMULOSB
    288U,	// VMULOSD
    288U,	// VMULOSH
    288U,	// VMULOSW
    288U,	// VMULOUB
    288U,	// VMULOUD
    288U,	// VMULOUH
    288U,	// VMULOUW
    288U,	// VMULUWM
    288U,	// VNAND
    288U,	// VNCIPHER
    288U,	// VNCIPHERLAST
    0U,	// VNEGD
    0U,	// VNEGW
    2080U,	// VNMSUBFP
    288U,	// VNOR
    288U,	// VOR
    288U,	// VORC
    288U,	// VPDEPD
    2080U,	// VPERM
    2080U,	// VPERMR
    2080U,	// VPERMXOR
    288U,	// VPEXTD
    288U,	// VPKPX
    288U,	// VPKSDSS
    288U,	// VPKSDUS
    288U,	// VPKSHSS
    288U,	// VPKSHUS
    288U,	// VPKSWSS
    288U,	// VPKSWUS
    288U,	// VPKUDUM
    288U,	// VPKUDUS
    288U,	// VPKUHUM
    288U,	// VPKUHUS
    288U,	// VPKUWUM
    288U,	// VPKUWUS
    288U,	// VPMSUMB
    288U,	// VPMSUMD
    288U,	// VPMSUMH
    288U,	// VPMSUMW
    0U,	// VPOPCNTB
    0U,	// VPOPCNTD
    0U,	// VPOPCNTH
    0U,	// VPOPCNTW
    0U,	// VPRTYBD
    0U,	// VPRTYBQ
    0U,	// VPRTYBW
    0U,	// VREFP
    0U,	// VRFIM
    0U,	// VRFIN
    0U,	// VRFIP
    0U,	// VRFIZ
    288U,	// VRLB
    288U,	// VRLD
    288U,	// VRLDMI
    288U,	// VRLDNM
    288U,	// VRLH
    288U,	// VRLQ
    288U,	// VRLQMI
    288U,	// VRLQNM
    288U,	// VRLW
    288U,	// VRLWMI
    288U,	// VRLWNM
    0U,	// VRSQRTEFP
    0U,	// VSBOX
    2080U,	// VSEL
    7216U,	// VSHASIGMAD
    7216U,	// VSHASIGMAW
    288U,	// VSL
    288U,	// VSLB
    288U,	// VSLD
    10272U,	// VSLDBI
    7200U,	// VSLDOI
    288U,	// VSLH
    288U,	// VSLO
    288U,	// VSLQ
    288U,	// VSLV
    288U,	// VSLW
    136U,	// VSPLTB
    136U,	// VSPLTBs
    136U,	// VSPLTH
    136U,	// VSPLTHs
    0U,	// VSPLTISB
    0U,	// VSPLTISH
    0U,	// VSPLTISW
    136U,	// VSPLTW
    288U,	// VSR
    288U,	// VSRAB
    288U,	// VSRAD
    288U,	// VSRAH
    288U,	// VSRAQ
    288U,	// VSRAW
    288U,	// VSRB
    288U,	// VSRD
    10272U,	// VSRDBI
    288U,	// VSRH
    288U,	// VSRO
    288U,	// VSRQ
    288U,	// VSRV
    288U,	// VSRW
    0U,	// VSTRIBL
    0U,	// VSTRIBL_rec
    0U,	// VSTRIBR
    0U,	// VSTRIBR_rec
    0U,	// VSTRIHL
    0U,	// VSTRIHL_rec
    0U,	// VSTRIHR
    0U,	// VSTRIHR_rec
    288U,	// VSUBCUQ
    288U,	// VSUBCUW
    2080U,	// VSUBECUQ
    2080U,	// VSUBEUQM
    288U,	// VSUBFP
    288U,	// VSUBSBS
    288U,	// VSUBSHS
    288U,	// VSUBSWS
    288U,	// VSUBUBM
    288U,	// VSUBUBS
    288U,	// VSUBUDM
    288U,	// VSUBUHM
    288U,	// VSUBUHS
    288U,	// VSUBUQM
    288U,	// VSUBUWM
    288U,	// VSUBUWS
    288U,	// VSUM2SWS
    288U,	// VSUM4SBS
    288U,	// VSUM4SHS
    288U,	// VSUM4UBS
    288U,	// VSUMSWS
    288U,	// VUCMPRHB
    288U,	// VUCMPRHH
    288U,	// VUCMPRHN
    288U,	// VUCMPRLB
    288U,	// VUCMPRLH
    288U,	// VUCMPRLN
    0U,	// VUPKHPX
    0U,	// VUPKHSB
    0U,	// VUPKHSH
    0U,	// VUPKHSNTOB
    0U,	// VUPKHSW
    336U,	// VUPKINT4TOBF16
    152U,	// VUPKINT4TOFP32
    304U,	// VUPKINT8TOBF16
    336U,	// VUPKINT8TOFP32
    0U,	// VUPKLPX
    0U,	// VUPKLSB
    0U,	// VUPKLSH
    0U,	// VUPKLSNTOB
    0U,	// VUPKLSW
    288U,	// VXOR
    56U,	// V_SET0
    56U,	// V_SET0B
    56U,	// V_SET0H
    0U,	// V_SETALLONES
    0U,	// V_SETALLONESB
    0U,	// V_SETALLONESH
    0U,	// WAIT
    0U,	// WAITP10
    0U,	// WRTEE
    0U,	// WRTEEI
    288U,	// XOR
    288U,	// XOR8
    288U,	// XOR8_rec
    40U,	// XORI
    40U,	// XORI8
    40U,	// XORIS
    40U,	// XORIS8
    288U,	// XOR_rec
    0U,	// XSABSDP
    0U,	// XSABSQP
    288U,	// XSADDADDSUQM
    288U,	// XSADDADDUQM
    288U,	// XSADDDP
    288U,	// XSADDQP
    288U,	// XSADDQPO
    288U,	// XSADDSP
    288U,	// XSADDSUBSUQM
    288U,	// XSADDSUBUQM
    288U,	// XSCMPEQDP
    288U,	// XSCMPEQQP
    288U,	// XSCMPEXPDP
    288U,	// XSCMPEXPQP
    288U,	// XSCMPGEDP
    288U,	// XSCMPGEQP
    288U,	// XSCMPGTDP
    288U,	// XSCMPGTQP
    288U,	// XSCMPODP
    288U,	// XSCMPOQP
    288U,	// XSCMPUDP
    288U,	// XSCMPUQP
    288U,	// XSCPSGNDP
    288U,	// XSCPSGNQP
    0U,	// XSCVDPHP
    0U,	// XSCVDPQP
    0U,	// XSCVDPSP
    0U,	// XSCVDPSPN
    0U,	// XSCVDPSXDS
    0U,	// XSCVDPSXDSs
    0U,	// XSCVDPSXWS
    0U,	// XSCVDPSXWSs
    0U,	// XSCVDPUXDS
    0U,	// XSCVDPUXDSs
    0U,	// XSCVDPUXWS
    0U,	// XSCVDPUXWSs
    0U,	// XSCVHPDP
    0U,	// XSCVQPDP
    0U,	// XSCVQPDPO
    0U,	// XSCVQPSDZ
    0U,	// XSCVQPSQZ
    0U,	// XSCVQPSWZ
    0U,	// XSCVQPUDZ
    0U,	// XSCVQPUQZ
    0U,	// XSCVQPUWZ
    0U,	// XSCVSDQP
    0U,	// XSCVSPDP
    0U,	// XSCVSPDPN
    0U,	// XSCVSQQP
    0U,	// XSCVSXDDP
    0U,	// XSCVSXDSP
    0U,	// XSCVUDQP
    0U,	// XSCVUQQP
    0U,	// XSCVUXDDP
    0U,	// XSCVUXDSP
    288U,	// XSDIVDP
    288U,	// XSDIVQP
    288U,	// XSDIVQPO
    288U,	// XSDIVSP
    288U,	// XSIEXPDP
    288U,	// XSIEXPQP
    328U,	// XSMADDADP
    328U,	// XSMADDASP
    328U,	// XSMADDMDP
    328U,	// XSMADDMSP
    328U,	// XSMADDQP
    328U,	// XSMADDQPO
    288U,	// XSMAXCDP
    288U,	// XSMAXCQP
    288U,	// XSMAXDP
    288U,	// XSMAXJDP
    288U,	// XSMERGE2T1UQM
    288U,	// XSMERGE2T2UQM
    288U,	// XSMERGE2T3UQM
    288U,	// XSMERGE3T1UQM
    288U,	// XSMINCDP
    288U,	// XSMINCQP
    288U,	// XSMINDP
    288U,	// XSMINJDP
    328U,	// XSMSUBADP
    328U,	// XSMSUBASP
    328U,	// XSMSUBMDP
    328U,	// XSMSUBMSP
    328U,	// XSMSUBQP
    328U,	// XSMSUBQPO
    288U,	// XSMULDP
    288U,	// XSMULQP
    288U,	// XSMULQPO
    288U,	// XSMULSP
    0U,	// XSNABSDP
    0U,	// XSNABSDPs
    0U,	// XSNABSQP
    0U,	// XSNEGDP
    0U,	// XSNEGQP
    328U,	// XSNMADDADP
    328U,	// XSNMADDASP
    328U,	// XSNMADDMDP
    328U,	// XSNMADDMSP
    328U,	// XSNMADDQP
    328U,	// XSNMADDQPO
    328U,	// XSNMSUBADP
    328U,	// XSNMSUBASP
    328U,	// XSNMSUBMDP
    328U,	// XSNMSUBMSP
    328U,	// XSNMSUBQP
    328U,	// XSNMSUBQPO
    0U,	// XSRDPI
    0U,	// XSRDPIC
    0U,	// XSRDPIM
    0U,	// XSRDPIP
    0U,	// XSRDPIZ
    288U,	// XSREBASE2T1UQM
    288U,	// XSREBASE2T2UQM
    288U,	// XSREBASE2T3UQM
    288U,	// XSREBASE2T4UQM
    288U,	// XSREBASE3T1UQM
    288U,	// XSREBASE3T2UQM
    288U,	// XSREBASE3T3UQM
    0U,	// XSREDP
    0U,	// XSRESP
    0U,	// XSRQPI
    0U,	// XSRQPIX
    0U,	// XSRQPXP
    0U,	// XSRSP
    0U,	// XSRSQRTEDP
    0U,	// XSRSQRTESP
    0U,	// XSSQRTDP
    0U,	// XSSQRTQP
    0U,	// XSSQRTQPO
    0U,	// XSSQRTSP
    288U,	// XSSUBDP
    288U,	// XSSUBQP
    288U,	// XSSUBQPO
    288U,	// XSSUBSP
    288U,	// XSTDIVDP
    0U,	// XSTSQRTDP
    160U,	// XSTSTDCDP
    160U,	// XSTSTDCQP
    160U,	// XSTSTDCSP
    0U,	// XSXEXPDP
    0U,	// XSXEXPQP
    0U,	// XSXSIGDP
    0U,	// XSXSIGQP
    0U,	// XVABSDP
    0U,	// XVABSSP
    288U,	// XVADDDP
    288U,	// XVADDSP
    288U,	// XVADDUHM
    288U,	// XVADDUWM
    288U,	// XVBF16GER2
    328U,	// XVBF16GER2NN
    328U,	// XVBF16GER2NP
    328U,	// XVBF16GER2PN
    328U,	// XVBF16GER2PP
    288U,	// XVBF16GER2W
    328U,	// XVBF16GER2WNN
    328U,	// XVBF16GER2WNP
    328U,	// XVBF16GER2WPN
    328U,	// XVBF16GER2WPP
    288U,	// XVCMPEQDP
    288U,	// XVCMPEQDP_rec
    288U,	// XVCMPEQSP
    288U,	// XVCMPEQSP_rec
    288U,	// XVCMPGEDP
    288U,	// XVCMPGEDP_rec
    288U,	// XVCMPGESP
    288U,	// XVCMPGESP_rec
    288U,	// XVCMPGTDP
    288U,	// XVCMPGTDP_rec
    288U,	// XVCMPGTSP
    288U,	// XVCMPGTSP_rec
    288U,	// XVCPSGNDP
    288U,	// XVCPSGNSP
    0U,	// XVCVBF16SPN
    0U,	// XVCVDPSP
    0U,	// XVCVDPSXDS
    0U,	// XVCVDPSXWS
    0U,	// XVCVDPUXDS
    0U,	// XVCVDPUXWS
    0U,	// XVCVHPSP
    0U,	// XVCVSPBF16
    0U,	// XVCVSPDP
    0U,	// XVCVSPHP
    0U,	// XVCVSPSXDS
    0U,	// XVCVSPSXWS
    0U,	// XVCVSPUXDS
    0U,	// XVCVSPUXWS
    0U,	// XVCVSXDDP
    0U,	// XVCVSXDSP
    0U,	// XVCVSXWDP
    0U,	// XVCVSXWSP
    0U,	// XVCVUXDDP
    0U,	// XVCVUXDSP
    0U,	// XVCVUXWDP
    0U,	// XVCVUXWSP
    288U,	// XVDIVDP
    288U,	// XVDIVSP
    288U,	// XVF16GER2
    328U,	// XVF16GER2NN
    328U,	// XVF16GER2NP
    328U,	// XVF16GER2PN
    328U,	// XVF16GER2PP
    288U,	// XVF16GER2W
    328U,	// XVF16GER2WNN
    328U,	// XVF16GER2WNP
    328U,	// XVF16GER2WPN
    328U,	// XVF16GER2WPP
    288U,	// XVF32GER
    328U,	// XVF32GERNN
    328U,	// XVF32GERNP
    328U,	// XVF32GERPN
    328U,	// XVF32GERPP
    288U,	// XVF32GERW
    328U,	// XVF32GERWNN
    328U,	// XVF32GERWNP
    328U,	// XVF32GERWPN
    328U,	// XVF32GERWPP
    288U,	// XVF64GER
    328U,	// XVF64GERNN
    328U,	// XVF64GERNP
    328U,	// XVF64GERPN
    328U,	// XVF64GERPP
    288U,	// XVF64GERW
    328U,	// XVF64GERWNN
    328U,	// XVF64GERWNP
    328U,	// XVF64GERWPN
    328U,	// XVF64GERWPP
    288U,	// XVI16GER2
    328U,	// XVI16GER2PP
    288U,	// XVI16GER2S
    328U,	// XVI16GER2SPP
    288U,	// XVI16GER2SW
    328U,	// XVI16GER2SWPP
    288U,	// XVI16GER2W
    328U,	// XVI16GER2WPP
    288U,	// XVI4GER8
    328U,	// XVI4GER8PP
    288U,	// XVI4GER8W
    328U,	// XVI4GER8WPP
    288U,	// XVI8GER4
    328U,	// XVI8GER4PP
    328U,	// XVI8GER4SPP
    288U,	// XVI8GER4W
    328U,	// XVI8GER4WPP
    328U,	// XVI8GER4WSPP
    288U,	// XVIEXPDP
    288U,	// XVIEXPSP
    328U,	// XVMADDADP
    328U,	// XVMADDASP
    328U,	// XVMADDMDP
    328U,	// XVMADDMSP
    288U,	// XVMAXDP
    288U,	// XVMAXSP
    288U,	// XVMINDP
    288U,	// XVMINSP
    328U,	// XVMSUBADP
    328U,	// XVMSUBASP
    328U,	// XVMSUBMDP
    328U,	// XVMSUBMSP
    288U,	// XVMULDP
    288U,	// XVMULHSH
    288U,	// XVMULHSW
    288U,	// XVMULHUH
    288U,	// XVMULHUW
    288U,	// XVMULSP
    288U,	// XVMULUHM
    288U,	// XVMULUWM
    0U,	// XVNABSDP
    0U,	// XVNABSSP
    0U,	// XVNEGDP
    0U,	// XVNEGSP
    328U,	// XVNMADDADP
    328U,	// XVNMADDASP
    328U,	// XVNMADDMDP
    328U,	// XVNMADDMSP
    328U,	// XVNMSUBADP
    328U,	// XVNMSUBASP
    328U,	// XVNMSUBMDP
    328U,	// XVNMSUBMSP
    0U,	// XVRDPI
    0U,	// XVRDPIC
    0U,	// XVRDPIM
    0U,	// XVRDPIP
    0U,	// XVRDPIZ
    0U,	// XVREDP
    0U,	// XVRESP
    288U,	// XVRLW
    0U,	// XVRSPI
    0U,	// XVRSPIC
    0U,	// XVRSPIM
    0U,	// XVRSPIP
    0U,	// XVRSPIZ
    0U,	// XVRSQRTEDP
    0U,	// XVRSQRTESP
    0U,	// XVSQRTDP
    0U,	// XVSQRTSP
    288U,	// XVSUBDP
    288U,	// XVSUBSP
    288U,	// XVSUBUHM
    288U,	// XVSUBUWM
    288U,	// XVTDIVDP
    288U,	// XVTDIVSP
    0U,	// XVTLSBB
    0U,	// XVTSQRTDP
    0U,	// XVTSQRTSP
    160U,	// XVTSTDCDP
    160U,	// XVTSTDCSP
    0U,	// XVXEXPDP
    0U,	// XVXEXPSP
    0U,	// XVXSIGDP
    0U,	// XVXSIGSP
    3104U,	// XXAESDECP
    3104U,	// XXAESENCP
    336U,	// XXAESGENLKP
    2080U,	// XXBLENDVB
    2080U,	// XXBLENDVD
    2080U,	// XXBLENDVH
    2080U,	// XXBLENDVW
    0U,	// XXBRD
    0U,	// XXBRH
    0U,	// XXBRQ
    0U,	// XXBRW
    870432U,	// XXEVAL
    168U,	// XXEXTRACTUW
    176U,	// XXGENPCVBM
    176U,	// XXGENPCVDM
    176U,	// XXGENPCVHM
    176U,	// XXGENPCVWM
    4128U,	// XXGFMUL128
    184U,	// XXINSERTW
    288U,	// XXLAND
    288U,	// XXLANDC
    288U,	// XXLEQV
    56U,	// XXLEQVOnes
    288U,	// XXLNAND
    288U,	// XXLNOR
    288U,	// XXLOR
    288U,	// XXLORC
    288U,	// XXLORf
    288U,	// XXLXOR
    56U,	// XXLXORdpz
    56U,	// XXLXORspz
    56U,	// XXLXORz
    0U,	// XXMFACC
    0U,	// XXMFACCW
    288U,	// XXMRGHW
    288U,	// XXMRGLW
    0U,	// XXMTACC
    0U,	// XXMTACCW
    10272U,	// XXMULMUL
    25907232U,	// XXMULMULHIADD
    2838560U,	// XXMULMULLOADD
    328U,	// XXPERM
    3104U,	// XXPERMDI
    11368U,	// XXPERMDIs
    328U,	// XXPERMR
    1001504U,	// XXPERMX
    2080U,	// XXSEL
    0U,	// XXSETACCZ
    3104U,	// XXSLDWI
    11368U,	// XXSLDWIs
    0U,	// XXSPLTI32DX
    0U,	// XXSPLTIB
    0U,	// XXSPLTIDP
    0U,	// XXSPLTIW
    336U,	// XXSPLTW
    336U,	// XXSPLTWs
    4128U,	// XXSSUMUDM
    4128U,	// XXSSUMUDMC
    2836512U,	// XXSSUMUDMCEXT
    192U,	// gBC
    200U,	// gBCA
    0U,	// gBCAat
    288U,	// gBCCTR
    288U,	// gBCCTRL
    192U,	// gBCL
    200U,	// gBCLA
    0U,	// gBCLAat
    288U,	// gBCLR
    288U,	// gBCLRL
    0U,	// gBCLat
    0U,	// gBCat
  };

  // Emit the opcode for the instruction.
  uint64_t Bits = 0;
  Bits |= (uint64_t)OpInfo0[MI.getOpcode()] << 0;
  Bits |= (uint64_t)OpInfo1[MI.getOpcode()] << 32;
  if (Bits == 0)
    return {nullptr, Bits};
  return {AsmStrs+(Bits & 32767)-1, Bits};

}
/// printInstruction - This method is automatically generated by tablegen
/// from the instruction set description.
LLVM_NO_PROFILE_INSTRUMENT_FUNCTION
void PPCInstPrinter::printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O) {
  O << "\t";

  auto MnemonicInfo = getMnemonic(*MI);

  O << MnemonicInfo.first;

  uint64_t Bits = MnemonicInfo.second;
  assert(Bits != 0 && "Cannot print this instruction.");

  // Fragment 0 encoded into 5 bits for 23 unique commands.
  switch ((Bits >> 15) & 31) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
    return;
    break;
  case 1:
    // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL...
    printOperand(MI, 0, STI, O);
    break;
  case 2:
    // DCBFL, DCBFLP, DCBFPS, DCBFx, DCBSTPS, DCBTCT, DCBTDS, DCBTSTCT, DCBTS...
    printMemRegReg(MI, 0, STI, O);
    break;
  case 3:
    // ADJCALLSTACKDOWN, ADJCALLSTACKUP
    printU16ImmOperand(MI, 0, STI, O);
    O << ' ';
    printU16ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 4:
    // B, BCLalways, BDNZ, BDNZ8, BDNZL, BDNZLm, BDNZLp, BDNZm, BDNZp, BDZ, B...
    printBranchOperand(MI, Address, 0, STI, O);
    break;
  case 5:
    // BA, BDNZA, BDNZAm, BDNZAp, BDNZLA, BDNZLAm, BDNZLAp, BDZA, BDZAm, BDZA...
    printAbsBranchOperand(MI, 0, STI, O);
    break;
  case 6:
    // BCC, BCCA, BCCCTR, BCCCTR8, BCCCTRL, BCCCTRL8, BCCL, BCCLA, BCCLR, BCC...
    printPredicateOperand(MI, 0, STI, O, "cc");
    break;
  case 7:
    // BCTRL8_LDinto_toc, BCTRL8_LDinto_toc_RM, BCTRL_LWZinto_toc, BCTRL_LWZi...
    printMemRegImm(MI, 0, STI, O);
    return;
    break;
  case 8:
    // BL8_NOP_TLS, BL8_NOTOC_TLS, BL8_TLS, BL8_TLS_, BL_TLS
    printTLSCall(MI, 0, STI, O);
    break;
  case 9:
    // DCBF, DCBT, DCBTST
    printMemRegReg(MI, 1, STI, O);
    O << ", ";
    break;
  case 10:
    // DCBTEP, DCBTSTEP
    printU5ImmOperand(MI, 2, STI, O);
    O << ", ";
    printMemRegReg(MI, 0, STI, O);
    return;
    break;
  case 11:
    // DDEDPD, DDEDPDQ, DDEDPDQ_rec, DDEDPD_rec
    printU2ImmOperand(MI, 1, STI, O);
    O << ", ";
    printOperand(MI, 0, STI, O);
    O << ", ";
    printOperand(MI, 2, STI, O);
    return;
    break;
  case 12:
    // DENBCD, DENBCDQ, DENBCDQ_rec, DENBCD_rec, DRINTN, DRINTNQ, DRINTNQ_rec...
    printU1ImmOperand(MI, 1, STI, O);
    O << ", ";
    printOperand(MI, 0, STI, O);
    O << ", ";
    printOperand(MI, 2, STI, O);
    break;
  case 13:
    // DQUAI, DQUAIQ, DQUAIQ_rec, DQUAI_rec
    printS5ImmOperand(MI, 1, STI, O);
    O << ", ";
    printOperand(MI, 0, STI, O);
    O << ", ";
    printOperand(MI, 2, STI, O);
    O << ", ";
    printU2ImmOperand(MI, 3, STI, O);
    return;
    break;
  case 14:
    // DSS, MBAR, MTFSB0, MTFSB1, TABORTDC, TABORTDCI, TABORTWC, TABORTWCI, T...
    printU5ImmOperand(MI, 0, STI, O);
    break;
  case 15:
    // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64, MTDCR, MTV...
    printOperand(MI, 1, STI, O);
    break;
  case 16:
    // ICBLC, ICBLQ, ICBT, ICBTLS
    printU4ImmOperand(MI, 0, STI, O);
    O << ", ";
    printMemRegReg(MI, 1, STI, O);
    return;
    break;
  case 17:
    // MTFSFI, MTFSFI_rec, MTFSFIb, SYNCP10
    printU3ImmOperand(MI, 0, STI, O);
    O << ", ";
    break;
  case 18:
    // MTOCRF, MTOCRF8
    printcrbitm(MI, 0, STI, O);
    O << ", ";
    printOperand(MI, 1, STI, O);
    return;
    break;
  case 19:
    // MTSR
    printU4ImmOperand(MI, 1, STI, O);
    O << ", ";
    printOperand(MI, 0, STI, O);
    return;
    break;
  case 20:
    // RFEBB, TBEGIN, TEND, TSR
    printU1ImmOperand(MI, 0, STI, O);
    return;
    break;
  case 21:
    // SYNC, TLBILX, WAIT, WAITP10
    printU2ImmOperand(MI, 0, STI, O);
    break;
  case 22:
    // gBCAat, gBCLAat, gBCLat, gBCat
    printATBitsAsHint(MI, 1, STI, O);
    O << ' ';
    printU5ImmOperand(MI, 0, STI, O);
    O << ", ";
    printOperand(MI, 2, STI, O);
    O << ", ";
    break;
  }


  // Fragment 1 encoded into 5 bits for 24 unique commands.
  switch ((Bits >> 20) & 31) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL...
    O << ", ";
    break;
  case 1:
    // DCBFL, DCBFLP, DCBFPS, DCBFx, DCBSTPS, DCBTSTT, DCBTSTx, DCBTT, DCBTx,...
    return;
    break;
  case 2:
    // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, TCRETURNai, TCRETURNai8, TCR...
    O << ' ';
    break;
  case 3:
    // BCC, CTRL_DEP
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    O << ", ";
    printBranchOperand(MI, Address, 2, STI, O);
    return;
    break;
  case 4:
    // BCCA
    O << 'a';
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    O << ", ";
    printAbsBranchOperand(MI, 2, STI, O);
    return;
    break;
  case 5:
    // BCCCTR, BCCCTR8
    O << "ctr";
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    return;
    break;
  case 6:
    // BCCCTRL, BCCCTRL8
    O << "ctrl";
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    return;
    break;
  case 7:
    // BCCL
    O << 'l';
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    O << ", ";
    printBranchOperand(MI, Address, 2, STI, O);
    return;
    break;
  case 8:
    // BCCLA
    O << "la";
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    O << ", ";
    printAbsBranchOperand(MI, 2, STI, O);
    return;
    break;
  case 9:
    // BCCLR
    O << "lr";
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    return;
    break;
  case 10:
    // BCCLRL
    O << "lrl";
    printPredicateOperand(MI, 0, STI, O, "pm");
    O << ' ';
    printPredicateOperand(MI, 0, STI, O, "reg");
    return;
    break;
  case 11:
    // BCCTR, BCCTR8, BCCTR8n, BCCTRL, BCCTRL8, BCCTRL8n, BCCTRLn, BCCTRn, BC...
    O << ", 0";
    return;
    break;
  case 12:
    // BL8_NOP, BL8_NOP_RM, BL8_NOP_TLS, BLA8_NOP, BLA8_NOP_RM, BL_NOP, BL_NO...
    O << "\n\tnop";
    return;
    break;
  case 13:
    // DCBF
    printU3ImmOperand(MI, 0, STI, O);
    return;
    break;
  case 14:
    // DCBT, DCBTST
    printU5ImmOperand(MI, 0, STI, O);
    return;
    break;
  case 15:
    // EVSEL
    O << ',';
    printOperand(MI, 1, STI, O);
    O << ',';
    printOperand(MI, 2, STI, O);
    return;
    break;
  case 16:
    // MFTB8
    O << ", 268";
    return;
    break;
  case 17:
    // MFUDSCR
    O << ", 3";
    return;
    break;
  case 18:
    // MFVRSAVE, MFVRSAVEv
    O << ", 256";
    return;
    break;
  case 19:
    // MTFSFI, MTFSFI_rec, MTFSFIb
    printU4ImmOperand(MI, 1, STI, O);
    break;
  case 20:
    // SYNCP10
    printU2ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 21:
    // V_SETALLONES, V_SETALLONESB, V_SETALLONESH
    O << ", -1";
    return;
    break;
  case 22:
    // gBCAat, gBCLAat
    printAbsBranchOperand(MI, 3, STI, O);
    return;
    break;
  case 23:
    // gBCLat, gBCat
    printBranchOperand(MI, Address, 3, STI, O);
    return;
    break;
  }


  // Fragment 2 encoded into 6 bits for 34 unique commands.
  switch ((Bits >> 25) & 63) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // BUILD_UACC, CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CL...
    printOperand(MI, 1, STI, O);
    break;
  case 1:
    // DCBTCT, DCBTDS, DCBTSTCT, DCBTSTDS, DMSHA3HASH, EVADDIW
    printU5ImmOperand(MI, 2, STI, O);
    break;
  case 2:
    // LAx, EVLDD, EVLDH, EVLDW, EVLHHESPLAT, EVLHHOSSPLAT, EVLHHOUSPLAT, EVL...
    printMemRegImm(MI, 1, STI, O);
    return;
    break;
  case 3:
    // SUBPCIS, LI, LI8, LIS, LIS8
    printS16ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 4:
    // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32, EVLDDX, EVLDHX, EVLDWX, EVLH...
    printMemRegReg(MI, 1, STI, O);
    break;
  case 5:
    // BC, BCL, BCLn, BCn
    printBranchOperand(MI, Address, 1, STI, O);
    return;
    break;
  case 6:
    // CMPRB, CMPRB8, MTMSR, MTMSRD
    printU1ImmOperand(MI, 1, STI, O);
    break;
  case 7:
    // CRSET, CRUNSET, MTDCR, TLBIE, V_SET0, V_SET0B, V_SET0H, XXLEQVOnes, XX...
    printOperand(MI, 0, STI, O);
    break;
  case 8:
    // DARN, MFFSCRNI, WAITP10
    printU2ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 9:
    // DMSHA2HASH, DMXOR, DMXVBF16GERX2NN, DMXVBF16GERX2NP, DMXVBF16GERX2PN, ...
    printOperand(MI, 2, STI, O);
    break;
  case 10:
    // DRINTN, DRINTNQ, DRINTNQ_rec, DRINTN_rec, DRINTX, DRINTXQ, DRINTXQ_rec...
    printU2ImmOperand(MI, 3, STI, O);
    return;
    break;
  case 11:
    // DTSTSFI, DTSTSFIQ
    printU6ImmOperand(MI, 1, STI, O);
    O << ", ";
    printOperand(MI, 2, STI, O);
    return;
    break;
  case 12:
    // EVSPLATFI, EVSPLATI, VSPLTISB, VSPLTISH, VSPLTISW
    printS5ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 13:
    // EVSUBIFW, LXVKQ
    printU5ImmOperand(MI, 1, STI, O);
    break;
  case 14:
    // HASHCHK, HASHCHK8, HASHCHKP, HASHCHKP8, HASHST, HASHST8, HASHSTP, HASH...
    printMemRegImmHash(MI, 1, STI, O);
    return;
    break;
  case 15:
    // LA, LA8
    printS16ImmOperand(MI, 2, STI, O);
    O << '(';
    printOperand(MI, 1, STI, O);
    O << ')';
    return;
    break;
  case 16:
    // LBZU, LBZU8, LDU, LFDU, LFSU, LHAU, LHAU8, LHZU, LHZU8, LWZU, LWZU8, S...
    printMemRegImm(MI, 2, STI, O);
    return;
    break;
  case 17:
    // LBZUX, LBZUX8, LDUX, LFDUX, LFSUX, LHAUX, LHAUX8, LHZUX, LHZUX8, LWAUX...
    printMemRegReg(MI, 2, STI, O);
    return;
    break;
  case 18:
    // MFBHRBE
    printU10ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 19:
    // MFFSCDRNI
    printU3ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 20:
    // MFOCRF, MFOCRF8
    printcrbitm(MI, 1, STI, O);
    return;
    break;
  case 21:
    // MFSR
    printU4ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 22:
    // MTFSFI, MTFSFI_rec
    O << ", ";
    break;
  case 23:
    // MTFSFIb
    return;
    break;
  case 24:
    // MTVSRBMI
    printU16ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 25:
    // PADDI8pc, PADDIS8pc, PADDISpc, PADDIpc
    printImmZeroOperand(MI, 1, STI, O);
    O << ", ";
    break;
  case 26:
    // PLA, PLA8
    printS34ImmOperand(MI, 2, STI, O);
    O << ' ';
    printOperand(MI, 1, STI, O);
    return;
    break;
  case 27:
    // PLA8pc, PLApc, PLBZ8onlypc, PLBZonlypc, PLDonlypc, PLFDonlypc, PLFSonl...
    printS34ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 28:
    // PLBZ, PLBZ8, PLBZ8nopc, PLBZnopc, PLD, PLDnopc, PLFD, PLFDnopc, PLFS, ...
    printMemRegImm34(MI, 1, STI, O);
    break;
  case 29:
    // PLBZ8pc, PLBZpc, PLDpc, PLFDpc, PLFSpc, PLHA8pc, PLHApc, PLHZ8pc, PLHZ...
    printMemRegImm34PCRel(MI, 1, STI, O);
    O << ", 1";
    return;
    break;
  case 30:
    // SUBFUS, SUBFUS_rec
    printU1ImmOperand(MI, 3, STI, O);
    O << ", ";
    printOperand(MI, 1, STI, O);
    O << ", ";
    printOperand(MI, 2, STI, O);
    return;
    break;
  case 31:
    // VINSD, VINSERTB, VINSERTH, VINSW
    printOperand(MI, 3, STI, O);
    O << ", ";
    printU4ImmOperand(MI, 2, STI, O);
    return;
    break;
  case 32:
    // XXSPLTI32DX
    printU1ImmOperand(MI, 2, STI, O);
    O << ", ";
    printOperand(MI, 3, STI, O);
    return;
    break;
  case 33:
    // XXSPLTIB
    printU8ImmOperand(MI, 1, STI, O);
    return;
    break;
  }


  // Fragment 3 encoded into 4 bits for 9 unique commands.
  switch ((Bits >> 31) & 15) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // BUILD_UACC, DCBTCT, DCBTDS, DCBTSTCT, DCBTSTDS, ADDME, ADDME8, ADDME8O...
    return;
    break;
  case 1:
    // CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, CLRRDI, CLRRDI_rec, CL...
    O << ", ";
    break;
  case 2:
    // ATOMIC_CMP_SWAP_I16, ATOMIC_CMP_SWAP_I32
    O << ' ';
    printOperand(MI, 3, STI, O);
    O << ' ';
    printOperand(MI, 4, STI, O);
    return;
    break;
  case 3:
    // LBARXL, LDARXL, LHARXL, LQARXL, LWARXL
    O << ", 1";
    return;
    break;
  case 4:
    // MTFSFI
    printOperand(MI, 2, STI, O);
    return;
    break;
  case 5:
    // MTFSFI_rec
    printU1ImmOperand(MI, 2, STI, O);
    return;
    break;
  case 6:
    // PADDI8pc, PADDIpc
    printS34ImmOperand(MI, 2, STI, O);
    O << ", 1";
    return;
    break;
  case 7:
    // PADDIS8pc, PADDISpc
    printS32ImmOperand(MI, 2, STI, O);
    O << ", 1";
    return;
    break;
  case 8:
    // PLBZ, PLBZ8, PLD, PLFD, PLFS, PLHA, PLHA8, PLHZ, PLHZ8, PLWA, PLWA8, P...
    O << ", 0";
    return;
    break;
  }


  // Fragment 4 encoded into 5 bits for 26 unique commands.
  switch ((Bits >> 35) & 31) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // CLRLSLDI, CLRLSLDI_rec, CLRRDI, CLRRDI_rec, EXTLDI, EXTLDI_rec, EXTRDI...
    printU6ImmOperand(MI, 2, STI, O);
    break;
  case 1:
    // CLRLSLWI, CLRLSLWI_rec, CLRRWI, CLRRWI_rec, EXTLWI, EXTLWI_rec, EXTRWI...
    printU5ImmOperand(MI, 2, STI, O);
    break;
  case 2:
    // PSUBI, PADDI, PADDI8
    printS34ImmOperand(MI, 2, STI, O);
    break;
  case 3:
    // SUBI, SUBIC, SUBIC_rec, SUBIS, ADDI, ADDI8, ADDIC, ADDIC8, ADDIC_rec, ...
    printS16ImmOperand(MI, 2, STI, O);
    return;
    break;
  case 4:
    // ADD4, ADD4O, ADD4O_rec, ADD4TLS, ADD4_rec, ADD8, ADD8O, ADD8O_rec, ADD...
    printOperand(MI, 2, STI, O);
    break;
  case 5:
    // ANDI8_rec, ANDIS8_rec, ANDIS_rec, ANDI_rec, CMPLDI, CMPLWI, ORI, ORI8,...
    printU16ImmOperand(MI, 2, STI, O);
    return;
    break;
  case 6:
    // BCDCFN_rec, BCDCFSQ_rec, BCDCFZ_rec, BCDCTZ_rec, BCDSETSGN_rec, CP_PAS...
    printU1ImmOperand(MI, 2, STI, O);
    break;
  case 7:
    // CRSET, CRUNSET, V_SET0, V_SET0B, V_SET0H, XXLEQVOnes, XXLXORdpz, XXLXO...
    printOperand(MI, 0, STI, O);
    return;
    break;
  case 8:
    // DMSHA2HASH
    printU1ImmOperand(MI, 3, STI, O);
    return;
    break;
  case 9:
    // DMXVBF16GERX2NN, DMXVBF16GERX2NP, DMXVBF16GERX2PN, DMXVBF16GERX2PP, DM...
    printOperand(MI, 3, STI, O);
    break;
  case 10:
    // DMXXEXTFDMR256, DMXXINSTDMR256, TLBIE8P9, TLBIEIO, TLBIEP, TLBIEP8, TL...
    printU2ImmOperand(MI, 2, STI, O);
    break;
  case 11:
    // DMXXSHAPAD
    printU2ImmOperand(MI, 3, STI, O);
    O << ", ";
    printU1ImmOperand(MI, 4, STI, O);
    O << ", ";
    printU2ImmOperand(MI, 5, STI, O);
    return;
    break;
  case 12:
    // DST, DST64, DSTST, DSTST64, DSTSTT, DSTSTT64, DSTT, DSTT64
    printU5ImmOperand(MI, 0, STI, O);
    return;
    break;
  case 13:
    // EVADDIW, XXPERMDIs, XXSLDWIs
    printOperand(MI, 1, STI, O);
    break;
  case 14:
    // LDAT, LWAT, RLWIMI, RLWIMI8, RLWIMI8_rec, RLWIMI_rec
    printU5ImmOperand(MI, 3, STI, O);
    break;
  case 15:
    // PADDIS, PADDIS8
    printS32ImmOperand(MI, 2, STI, O);
    O << ", 0";
    return;
    break;
  case 16:
    // RLDIMI, RLDIMI_rec
    printU6ImmOperand(MI, 3, STI, O);
    O << ", ";
    printU6ImmOperand(MI, 4, STI, O);
    return;
    break;
  case 17:
    // VCFSX, VCFUX, VCTSXS, VCTUXS, VSPLTB, VSPLTBs, VSPLTH, VSPLTHs, VSPLTW
    printU5ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 18:
    // VEXTRACTD, VEXTRACTUB, VEXTRACTUH, VEXTRACTUW, VINSERTD, VINSERTW
    printU4ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 19:
    // VGNB, VUPKINT4TOFP32
    printU3ImmOperand(MI, 2, STI, O);
    return;
    break;
  case 20:
    // XSTSTDCDP, XSTSTDCQP, XSTSTDCSP, XVTSTDCDP, XVTSTDCSP
    printU7ImmOperand(MI, 1, STI, O);
    return;
    break;
  case 21:
    // XXEXTRACTUW
    printU4ImmOperand(MI, 2, STI, O);
    return;
    break;
  case 22:
    // XXGENPCVBM, XXGENPCVDM, XXGENPCVHM, XXGENPCVWM
    printS5ImmOperand(MI, 2, STI, O);
    return;
    break;
  case 23:
    // XXINSERTW
    printU4ImmOperand(MI, 3, STI, O);
    return;
    break;
  case 24:
    // gBC, gBCL
    printBranchOperand(MI, Address, 2, STI, O);
    return;
    break;
  case 25:
    // gBCA, gBCLA
    printAbsBranchOperand(MI, 2, STI, O);
    return;
    break;
  }


  // Fragment 5 encoded into 2 bits for 4 unique commands.
  switch ((Bits >> 40) & 3) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // CLRLSLDI, CLRLSLDI_rec, CLRLSLWI, CLRLSLWI_rec, EXTLDI, EXTLDI_rec, EX...
    O << ", ";
    break;
  case 1:
    // CLRRDI, CLRRDI_rec, CLRRWI, CLRRWI_rec, PSUBI, ROTRDI, ROTRDI_rec, ROT...
    return;
    break;
  case 2:
    // DMXXEXTFDMR512, DMXXINSTDMR512, PADDI, PADDI8
    O << ", 0";
    return;
    break;
  case 3:
    // DMXXEXTFDMR512_HI, DMXXINSTDMR512_HI
    O << ", 1";
    return;
    break;
  }


  // Fragment 6 encoded into 4 bits for 12 unique commands.
  switch ((Bits >> 42) & 15) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // CLRLSLDI, CLRLSLDI_rec, EXTLDI, EXTLDI_rec, EXTRDI, EXTRDI_rec, INSRDI...
    printU6ImmOperand(MI, 3, STI, O);
    return;
    break;
  case 1:
    // CLRLSLWI, CLRLSLWI_rec, EXTLWI, EXTLWI_rec, EXTRWI, EXTRWI_rec, INSLWI...
    printU5ImmOperand(MI, 3, STI, O);
    break;
  case 2:
    // RLWIMIbm, RLWIMIbm_rec, RLWINMbm, RLWINMbm_rec, RLWNMbm, RLWNMbm_rec, ...
    printOperand(MI, 3, STI, O);
    break;
  case 3:
    // ADDEX, ADDEX8, DQUA, DQUAQ, DQUAQ_rec, DQUA_rec, DRRND, DRRNDQ, DRRNDQ...
    printU2ImmOperand(MI, 3, STI, O);
    return;
    break;
  case 4:
    // BCDADD_rec, BCDSR_rec, BCDSUB_rec, BCDS_rec, BCDTRUNC_rec, TLBIE8P9, T...
    printU1ImmOperand(MI, 3, STI, O);
    break;
  case 5:
    // PMDMXVBF16GERX2, PMDMXVF16GERX2, PMDMXVI8GERX4
    printU8ImmOperand(MI, 3, STI, O);
    O << ", ";
    printU4ImmOperand(MI, 4, STI, O);
    O << ", ";
    break;
  case 6:
    // PMDMXVBF16GERX2NN, PMDMXVBF16GERX2NP, PMDMXVBF16GERX2PN, PMDMXVBF16GER...
    printU8ImmOperand(MI, 4, STI, O);
    O << ", ";
    printU4ImmOperand(MI, 5, STI, O);
    O << ", ";
    break;
  case 7:
    // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM...
    printU4ImmOperand(MI, 3, STI, O);
    break;
  case 8:
    // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF...
    printU4ImmOperand(MI, 4, STI, O);
    O << ", ";
    break;
  case 9:
    // RLWIMI, RLWIMI8, RLWIMI8_rec, RLWIMI_rec
    printU5ImmOperand(MI, 4, STI, O);
    O << ", ";
    printU5ImmOperand(MI, 5, STI, O);
    return;
    break;
  case 10:
    // VSLDBI, VSRDBI, XXMULMUL
    printU3ImmOperand(MI, 3, STI, O);
    return;
    break;
  case 11:
    // XXPERMDIs, XXSLDWIs
    printU2ImmOperand(MI, 2, STI, O);
    return;
    break;
  }


  // Fragment 7 encoded into 3 bits for 6 unique commands.
  switch ((Bits >> 46) & 7) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // CLRLSLWI, CLRLSLWI_rec, EXTLWI, EXTLWI_rec, EXTRWI, EXTRWI_rec, INSLWI...
    return;
    break;
  case 1:
    // PMDMXVBF16GERX2, PMDMXVF16GERX2, PMXVF64GERNN, PMXVF64GERNP, PMXVF64GE...
    printU2ImmOperand(MI, 5, STI, O);
    return;
    break;
  case 2:
    // PMDMXVBF16GERX2NN, PMDMXVBF16GERX2NP, PMDMXVBF16GERX2PN, PMDMXVBF16GER...
    printU2ImmOperand(MI, 6, STI, O);
    return;
    break;
  case 3:
    // PMDMXVI8GERX4, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF1...
    printU4ImmOperand(MI, 5, STI, O);
    break;
  case 4:
    // PMDMXVI8GERX4PP, PMDMXVI8GERX4SPP
    printU4ImmOperand(MI, 6, STI, O);
    return;
    break;
  case 5:
    // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM...
    O << ", ";
    break;
  }


  // Fragment 8 encoded into 3 bits for 8 unique commands.
  switch ((Bits >> 49) & 7) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // PMDMXVI8GERX4, PMXVF32GERNN, PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP,...
    return;
    break;
  case 1:
    // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVF32GER, PM...
    printU4ImmOperand(MI, 4, STI, O);
    break;
  case 2:
    // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF...
    O << ", ";
    break;
  case 3:
    // PMXVF64GER, PMXVF64GERW
    printU2ImmOperand(MI, 4, STI, O);
    return;
    break;
  case 4:
    // RLWINM, RLWINM8, RLWINM8_rec, RLWINM_rec, RLWNM, RLWNM8, RLWNM8_rec, R...
    printU5ImmOperand(MI, 4, STI, O);
    return;
    break;
  case 5:
    // TLBIE8P9, TLBIEP, TLBIEP8, TLBIEP9, XXMULMULHIADD, XXMULMULLOADD, XXSS...
    printU1ImmOperand(MI, 4, STI, O);
    break;
  case 6:
    // XXEVAL
    printU8ImmOperand(MI, 4, STI, O);
    return;
    break;
  case 7:
    // XXPERMX
    printU3ImmOperand(MI, 4, STI, O);
    return;
    break;
  }


  // Fragment 9 encoded into 3 bits for 5 unique commands.
  switch ((Bits >> 52) & 7) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVI16GER2, P...
    O << ", ";
    break;
  case 1:
    // PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN, PMXVBF16GER2PP, PMXVBF...
    printU2ImmOperand(MI, 6, STI, O);
    return;
    break;
  case 2:
    // PMXVF32GER, PMXVF32GERW, TLBIE8P9, TLBIEP, TLBIEP8, TLBIEP9, XXMULMULL...
    return;
    break;
  case 3:
    // PMXVI4GER8PP, PMXVI4GER8WPP
    printU8ImmOperand(MI, 6, STI, O);
    return;
    break;
  case 4:
    // PMXVI8GER4PP, PMXVI8GER4SPP, PMXVI8GER4WPP, PMXVI8GER4WSPP
    printU4ImmOperand(MI, 6, STI, O);
    return;
    break;
  }


  // Fragment 10 encoded into 2 bits for 4 unique commands.
  switch ((Bits >> 55) & 3) {
  default: llvm_unreachable("Invalid command number.");
  case 0:
    // PMXVBF16GER2, PMXVBF16GER2W, PMXVF16GER2, PMXVF16GER2W, PMXVI16GER2, P...
    printU2ImmOperand(MI, 5, STI, O);
    return;
    break;
  case 1:
    // PMXVI4GER8, PMXVI4GER8W
    printU8ImmOperand(MI, 5, STI, O);
    return;
    break;
  case 2:
    // PMXVI8GER4, PMXVI8GER4W
    printU4ImmOperand(MI, 5, STI, O);
    return;
    break;
  case 3:
    // XXMULMULHIADD
    printU1ImmOperand(MI, 5, STI, O);
    return;
    break;
  }

}


/// getRegisterName - This method is automatically generated by tblgen
/// from the register set description.  This returns the assembler name
/// for the specified register.
const char *PPCInstPrinter::getRegisterName(MCRegister Reg) {
  unsigned RegNo = Reg.id();
  assert(RegNo && RegNo < 612 && "Invalid register number!");


#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Woverlength-strings"
#endif
  static const char AsmStrs[] = {
  /* 0 */ "**ROUNDING MODE**\000"
  /* 18 */ "**FRAME POINTER**\000"
  /* 36 */ "**BASE POINTER**\000"
  /* 53 */ "VFH10\000"
  /* 59 */ "f10\000"
  /* 63 */ "fp10\000"
  /* 68 */ "vsp10\000"
  /* 74 */ "dmrrowp10\000"
  /* 84 */ "r10\000"
  /* 88 */ "vs10\000"
  /* 93 */ "v10\000"
  /* 97 */ "dmrrow10\000"
  /* 106 */ "VFH20\000"
  /* 112 */ "f20\000"
  /* 116 */ "fp20\000"
  /* 121 */ "vsp20\000"
  /* 127 */ "dmrrowp20\000"
  /* 137 */ "r20\000"
  /* 141 */ "vs20\000"
  /* 146 */ "v20\000"
  /* 150 */ "dmrrow20\000"
  /* 159 */ "VFH30\000"
  /* 165 */ "f30\000"
  /* 169 */ "fp30\000"
  /* 174 */ "vsp30\000"
  /* 180 */ "dmrrowp30\000"
  /* 190 */ "r30\000"
  /* 194 */ "vs30\000"
  /* 199 */ "v30\000"
  /* 203 */ "dmrrow30\000"
  /* 212 */ "vsp40\000"
  /* 218 */ "vs40\000"
  /* 223 */ "dmrrow40\000"
  /* 232 */ "vsp50\000"
  /* 238 */ "vs50\000"
  /* 243 */ "dmrrow50\000"
  /* 252 */ "vsp60\000"
  /* 258 */ "vs60\000"
  /* 263 */ "dmrrow60\000"
  /* 272 */ "VFH0\000"
  /* 277 */ "wacc0\000"
  /* 283 */ "f0\000"
  /* 286 */ "wacc_hi0\000"
  /* 295 */ "fp0\000"
  /* 299 */ "dmrp0\000"
  /* 305 */ "vsp0\000"
  /* 310 */ "dmrrowp0\000"
  /* 319 */ "cr0\000"
  /* 323 */ "dmr0\000"
  /* 328 */ "vs0\000"
  /* 332 */ "v0\000"
  /* 335 */ "dmrrow0\000"
  /* 343 */ "VFH11\000"
  /* 349 */ "f11\000"
  /* 353 */ "dmrrowp11\000"
  /* 363 */ "r11\000"
  /* 367 */ "vs11\000"
  /* 372 */ "v11\000"
  /* 376 */ "dmrrow11\000"
  /* 385 */ "VFH21\000"
  /* 391 */ "f21\000"
  /* 395 */ "dmrrowp21\000"
  /* 405 */ "r21\000"
  /* 409 */ "vs21\000"
  /* 414 */ "v21\000"
  /* 418 */ "dmrrow21\000"
  /* 427 */ "VFH31\000"
  /* 433 */ "f31\000"
  /* 437 */ "dmrrowp31\000"
  /* 447 */ "r31\000"
  /* 451 */ "vs31\000"
  /* 456 */ "v31\000"
  /* 460 */ "dmrrow31\000"
  /* 469 */ "vs41\000"
  /* 474 */ "dmrrow41\000"
  /* 483 */ "vs51\000"
  /* 488 */ "dmrrow51\000"
  /* 497 */ "vs61\000"
  /* 502 */ "dmrrow61\000"
  /* 511 */ "VFH1\000"
  /* 516 */ "wacc1\000"
  /* 522 */ "f1\000"
  /* 525 */ "wacc_hi1\000"
  /* 534 */ "dmrp1\000"
  /* 540 */ "dmrrowp1\000"
  /* 549 */ "cr1\000"
  /* 553 */ "dmr1\000"
  /* 558 */ "vs1\000"
  /* 562 */ "v1\000"
  /* 565 */ "dmrrow1\000"
  /* 573 */ "VFH12\000"
  /* 579 */ "f12\000"
  /* 583 */ "fp12\000"
  /* 588 */ "vsp12\000"
  /* 594 */ "dmrrowp12\000"
  /* 604 */ "r12\000"
  /* 608 */ "vs12\000"
  /* 613 */ "v12\000"
  /* 617 */ "dmrrow12\000"
  /* 626 */ "VFH22\000"
  /* 632 */ "f22\000"
  /* 636 */ "fp22\000"
  /* 641 */ "vsp22\000"
  /* 647 */ "dmrrowp22\000"
  /* 657 */ "r22\000"
  /* 661 */ "vs22\000"
  /* 666 */ "v22\000"
  /* 670 */ "dmrrow22\000"
  /* 679 */ "vsp32\000"
  /* 685 */ "vs32\000"
  /* 690 */ "dmrrow32\000"
  /* 699 */ "vsp42\000"
  /* 705 */ "vs42\000"
  /* 710 */ "dmrrow42\000"
  /* 719 */ "vsp52\000"
  /* 725 */ "vs52\000"
  /* 730 */ "dmrrow52\000"
  /* 739 */ "vsp62\000"
  /* 745 */ "vs62\000"
  /* 750 */ "dmrrow62\000"
  /* 759 */ "VFH2\000"
  /* 764 */ "wacc2\000"
  /* 770 */ "f2\000"
  /* 773 */ "wacc_hi2\000"
  /* 782 */ "fp2\000"
  /* 786 */ "dmrp2\000"
  /* 792 */ "vsp2\000"
  /* 797 */ "dmrrowp2\000"
  /* 806 */ "cr2\000"
  /* 810 */ "dmr2\000"
  /* 815 */ "vs2\000"
  /* 819 */ "v2\000"
  /* 822 */ "dmrrow2\000"
  /* 830 */ "VFH13\000"
  /* 836 */ "f13\000"
  /* 840 */ "dmrrowp13\000"
  /* 850 */ "r13\000"
  /* 854 */ "vs13\000"
  /* 859 */ "v13\000"
  /* 863 */ "dmrrow13\000"
  /* 872 */ "VFH23\000"
  /* 878 */ "f23\000"
  /* 882 */ "dmrrowp23\000"
  /* 892 */ "r23\000"
  /* 896 */ "vs23\000"
  /* 901 */ "v23\000"
  /* 905 */ "dmrrow23\000"
  /* 914 */ "vs33\000"
  /* 919 */ "dmrrow33\000"
  /* 928 */ "vs43\000"
  /* 933 */ "dmrrow43\000"
  /* 942 */ "vs53\000"
  /* 947 */ "dmrrow53\000"
  /* 956 */ "vs63\000"
  /* 961 */ "dmrrow63\000"
  /* 970 */ "VFH3\000"
  /* 975 */ "wacc3\000"
  /* 981 */ "f3\000"
  /* 984 */ "wacc_hi3\000"
  /* 993 */ "dmrp3\000"
  /* 999 */ "dmrrowp3\000"
  /* 1008 */ "cr3\000"
  /* 1012 */ "dmr3\000"
  /* 1017 */ "vs3\000"
  /* 1021 */ "v3\000"
  /* 1024 */ "dmrrow3\000"
  /* 1032 */ "VFH14\000"
  /* 1038 */ "f14\000"
  /* 1042 */ "fp14\000"
  /* 1047 */ "vsp14\000"
  /* 1053 */ "dmrrowp14\000"
  /* 1063 */ "r14\000"
  /* 1067 */ "vs14\000"
  /* 1072 */ "v14\000"
  /* 1076 */ "dmrrow14\000"
  /* 1085 */ "VFH24\000"
  /* 1091 */ "f24\000"
  /* 1095 */ "fp24\000"
  /* 1100 */ "vsp24\000"
  /* 1106 */ "dmrrowp24\000"
  /* 1116 */ "r24\000"
  /* 1120 */ "vs24\000"
  /* 1125 */ "v24\000"
  /* 1129 */ "dmrrow24\000"
  /* 1138 */ "vsp34\000"
  /* 1144 */ "vs34\000"
  /* 1149 */ "dmrrow34\000"
  /* 1158 */ "vsp44\000"
  /* 1164 */ "vs44\000"
  /* 1169 */ "dmrrow44\000"
  /* 1178 */ "vsp54\000"
  /* 1184 */ "vs54\000"
  /* 1189 */ "dmrrow54\000"
  /* 1198 */ "VFH4\000"
  /* 1203 */ "wacc4\000"
  /* 1209 */ "f4\000"
  /* 1212 */ "wacc_hi4\000"
  /* 1221 */ "fp4\000"
  /* 1225 */ "vsp4\000"
  /* 1230 */ "dmrrowp4\000"
  /* 1239 */ "cr4\000"
  /* 1243 */ "dmr4\000"
  /* 1248 */ "vs4\000"
  /* 1252 */ "v4\000"
  /* 1255 */ "dmrrow4\000"
  /* 1263 */ "VFH15\000"
  /* 1269 */ "f15\000"
  /* 1273 */ "dmrrowp15\000"
  /* 1283 */ "r15\000"
  /* 1287 */ "vs15\000"
  /* 1292 */ "v15\000"
  /* 1296 */ "dmrrow15\000"
  /* 1305 */ "VFH25\000"
  /* 1311 */ "f25\000"
  /* 1315 */ "dmrrowp25\000"
  /* 1325 */ "r25\000"
  /* 1329 */ "vs25\000"
  /* 1334 */ "v25\000"
  /* 1338 */ "dmrrow25\000"
  /* 1347 */ "vs35\000"
  /* 1352 */ "dmrrow35\000"
  /* 1361 */ "vs45\000"
  /* 1366 */ "dmrrow45\000"
  /* 1375 */ "vs55\000"
  /* 1380 */ "dmrrow55\000"
  /* 1389 */ "VFH5\000"
  /* 1394 */ "wacc5\000"
  /* 1400 */ "f5\000"
  /* 1403 */ "wacc_hi5\000"
  /* 1412 */ "dmrrowp5\000"
  /* 1421 */ "cr5\000"
  /* 1425 */ "dmr5\000"
  /* 1430 */ "vs5\000"
  /* 1434 */ "v5\000"
  /* 1437 */ "dmrrow5\000"
  /* 1445 */ "VFH16\000"
  /* 1451 */ "f16\000"
  /* 1455 */ "fp16\000"
  /* 1460 */ "vsp16\000"
  /* 1466 */ "dmrrowp16\000"
  /* 1476 */ "r16\000"
  /* 1480 */ "vs16\000"
  /* 1485 */ "v16\000"
  /* 1489 */ "dmrrow16\000"
  /* 1498 */ "VFH26\000"
  /* 1504 */ "f26\000"
  /* 1508 */ "fp26\000"
  /* 1513 */ "vsp26\000"
  /* 1519 */ "dmrrowp26\000"
  /* 1529 */ "r26\000"
  /* 1533 */ "vs26\000"
  /* 1538 */ "v26\000"
  /* 1542 */ "dmrrow26\000"
  /* 1551 */ "vsp36\000"
  /* 1557 */ "vs36\000"
  /* 1562 */ "dmrrow36\000"
  /* 1571 */ "vsp46\000"
  /* 1577 */ "vs46\000"
  /* 1582 */ "dmrrow46\000"
  /* 1591 */ "vsp56\000"
  /* 1597 */ "vs56\000"
  /* 1602 */ "dmrrow56\000"
  /* 1611 */ "VFH6\000"
  /* 1616 */ "wacc6\000"
  /* 1622 */ "f6\000"
  /* 1625 */ "wacc_hi6\000"
  /* 1634 */ "fp6\000"
  /* 1638 */ "vsp6\000"
  /* 1643 */ "dmrrowp6\000"
  /* 1652 */ "cr6\000"
  /* 1656 */ "dmr6\000"
  /* 1661 */ "vs6\000"
  /* 1665 */ "v6\000"
  /* 1668 */ "dmrrow6\000"
  /* 1676 */ "VFH17\000"
  /* 1682 */ "f17\000"
  /* 1686 */ "dmrrowp17\000"
  /* 1696 */ "r17\000"
  /* 1700 */ "vs17\000"
  /* 1705 */ "v17\000"
  /* 1709 */ "dmrrow17\000"
  /* 1718 */ "VFH27\000"
  /* 1724 */ "f27\000"
  /* 1728 */ "dmrrowp27\000"
  /* 1738 */ "r27\000"
  /* 1742 */ "vs27\000"
  /* 1747 */ "v27\000"
  /* 1751 */ "dmrrow27\000"
  /* 1760 */ "vs37\000"
  /* 1765 */ "dmrrow37\000"
  /* 1774 */ "vs47\000"
  /* 1779 */ "dmrrow47\000"
  /* 1788 */ "vs57\000"
  /* 1793 */ "dmrrow57\000"
  /* 1802 */ "VFH7\000"
  /* 1807 */ "wacc7\000"
  /* 1813 */ "f7\000"
  /* 1816 */ "wacc_hi7\000"
  /* 1825 */ "dmrrowp7\000"
  /* 1834 */ "cr7\000"
  /* 1838 */ "dmr7\000"
  /* 1843 */ "vs7\000"
  /* 1847 */ "v7\000"
  /* 1850 */ "dmrrow7\000"
  /* 1858 */ "VFH18\000"
  /* 1864 */ "f18\000"
  /* 1868 */ "fp18\000"
  /* 1873 */ "vsp18\000"
  /* 1879 */ "dmrrowp18\000"
  /* 1889 */ "r18\000"
  /* 1893 */ "vs18\000"
  /* 1898 */ "v18\000"
  /* 1902 */ "dmrrow18\000"
  /* 1911 */ "VFH28\000"
  /* 1917 */ "f28\000"
  /* 1921 */ "fp28\000"
  /* 1926 */ "vsp28\000"
  /* 1932 */ "dmrrowp28\000"
  /* 1942 */ "r28\000"
  /* 1946 */ "vs28\000"
  /* 1951 */ "v28\000"
  /* 1955 */ "dmrrow28\000"
  /* 1964 */ "vsp38\000"
  /* 1970 */ "vs38\000"
  /* 1975 */ "dmrrow38\000"
  /* 1984 */ "vsp48\000"
  /* 1990 */ "vs48\000"
  /* 1995 */ "dmrrow48\000"
  /* 2004 */ "vsp58\000"
  /* 2010 */ "vs58\000"
  /* 2015 */ "dmrrow58\000"
  /* 2024 */ "VFH8\000"
  /* 2029 */ "f8\000"
  /* 2032 */ "fp8\000"
  /* 2036 */ "vsp8\000"
  /* 2041 */ "dmrrowp8\000"
  /* 2050 */ "r8\000"
  /* 2053 */ "vs8\000"
  /* 2057 */ "v8\000"
  /* 2060 */ "dmrrow8\000"
  /* 2068 */ "VFH19\000"
  /* 2074 */ "f19\000"
  /* 2078 */ "dmrrowp19\000"
  /* 2088 */ "r19\000"
  /* 2092 */ "vs19\000"
  /* 2097 */ "v19\000"
  /* 2101 */ "dmrrow19\000"
  /* 2110 */ "VFH29\000"
  /* 2116 */ "f29\000"
  /* 2120 */ "dmrrowp29\000"
  /* 2130 */ "r29\000"
  /* 2134 */ "vs29\000"
  /* 2139 */ "v29\000"
  /* 2143 */ "dmrrow29\000"
  /* 2152 */ "vs39\000"
  /* 2157 */ "dmrrow39\000"
  /* 2166 */ "vs49\000"
  /* 2171 */ "dmrrow49\000"
  /* 2180 */ "vs59\000"
  /* 2185 */ "dmrrow59\000"
  /* 2194 */ "VFH9\000"
  /* 2199 */ "f9\000"
  /* 2202 */ "dmrrowp9\000"
  /* 2211 */ "r9\000"
  /* 2214 */ "vs9\000"
  /* 2218 */ "v9\000"
  /* 2221 */ "dmrrow9\000"
  /* 2229 */ "vrsave\000"
  /* 2236 */ "spefscr\000"
  /* 2244 */ "xer\000"
  /* 2248 */ "lr\000"
  /* 2251 */ "ctr\000"
};
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif

  static const uint16_t RegAsmOffset[] = {
    36, 2244, 2251, 18, 2248, 0, 2236, 2229, 2244, 57, 278, 517, 765, 976, 
    1204, 1395, 1617, 1808, 36, 319, 549, 806, 1008, 1239, 1421, 1652, 1834, 2251, 
    323, 553, 810, 1012, 1243, 1425, 1656, 1838, 335, 565, 822, 1024, 1255, 1437, 
    1668, 1850, 2060, 2221, 97, 376, 617, 863, 1076, 1296, 1489, 1709, 1902, 2101, 
    150, 418, 670, 905, 1129, 1338, 1542, 1751, 1955, 2143, 203, 460, 690, 919, 
    1149, 1352, 1562, 1765, 1975, 2157, 223, 474, 710, 933, 1169, 1366, 1582, 1779, 
    1995, 2171, 243, 488, 730, 947, 1189, 1380, 1602, 1793, 2015, 2185, 263, 502, 
    750, 961, 310, 540, 797, 999, 1230, 1412, 1643, 1825, 2041, 2202, 74, 353, 
    594, 840, 1053, 1273, 1466, 1686, 1879, 2078, 127, 395, 647, 882, 1106, 1315, 
    1519, 1728, 1932, 2120, 180, 437, 299, 534, 786, 993, 283, 522, 770, 981, 
    1209, 1400, 1622, 1813, 2029, 2199, 59, 349, 579, 836, 1038, 1269, 1451, 1682, 
    1864, 2074, 112, 391, 632, 878, 1091, 1311, 1504, 1724, 1917, 2116, 165, 433, 
    273, 512, 760, 971, 1199, 1390, 1612, 1803, 2025, 2195, 54, 344, 574, 831, 
    1033, 1264, 1446, 1677, 1859, 2069, 107, 386, 627, 873, 1086, 1306, 1499, 1719, 
    1912, 2111, 160, 428, 18, 295, 782, 1221, 1634, 2032, 63, 583, 1042, 1455, 
    1868, 116, 636, 1095, 1508, 1921, 169, 274, 513, 761, 972, 1200, 1391, 1613, 
    1804, 2026, 2196, 55, 345, 575, 832, 1034, 1265, 1447, 1678, 1860, 2070, 108, 
    387, 628, 874, 1087, 1307, 1500, 1720, 1913, 2112, 161, 429, 2248, 320, 550, 
    807, 1009, 1240, 1422, 1653, 1835, 2050, 2211, 84, 363, 604, 850, 1063, 1283, 
    1476, 1696, 1889, 2088, 137, 405, 657, 892, 1116, 1325, 1529, 1738, 1942, 2130, 
    190, 447, 320, 550, 807, 1009, 1240, 1422, 1653, 1835, 2050, 2211, 84, 363, 
    604, 850, 1063, 1283, 1476, 1696, 1889, 2088, 137, 405, 657, 892, 1116, 1325, 
    1529, 1738, 1942, 2130, 190, 447, 278, 517, 765, 976, 1204, 1395, 1617, 1808, 
    332, 562, 819, 1021, 1252, 1434, 1665, 1847, 2057, 2218, 93, 372, 613, 859, 
    1072, 1292, 1485, 1705, 1898, 2097, 146, 414, 666, 901, 1125, 1334, 1538, 1747, 
    1951, 2139, 199, 456, 332, 562, 819, 1021, 1252, 1434, 1665, 1847, 2057, 2218, 
    93, 372, 613, 859, 1072, 1292, 1485, 1705, 1898, 2097, 146, 414, 666, 901, 
    1125, 1334, 1538, 1747, 1951, 2139, 199, 456, 272, 511, 759, 970, 1198, 1389, 
    1611, 1802, 2024, 2194, 53, 343, 573, 830, 1032, 1263, 1445, 1676, 1858, 2068, 
    106, 385, 626, 872, 1085, 1305, 1498, 1718, 1911, 2110, 159, 427, 328, 558, 
    815, 1017, 1248, 1430, 1661, 1843, 2053, 2214, 88, 367, 608, 854, 1067, 1287, 
    1480, 1700, 1893, 2092, 141, 409, 661, 896, 1120, 1329, 1533, 1742, 1946, 2134, 
    194, 451, 305, 792, 1225, 1638, 2036, 68, 588, 1047, 1460, 1873, 121, 641, 
    1100, 1513, 1926, 174, 679, 1138, 1551, 1964, 212, 699, 1158, 1571, 1984, 232, 
    719, 1178, 1591, 2004, 252, 739, 685, 914, 1144, 1347, 1557, 1760, 1970, 2152, 
    218, 469, 705, 928, 1164, 1361, 1577, 1774, 1990, 2166, 238, 483, 725, 942, 
    1184, 1375, 1597, 1788, 2010, 2180, 258, 497, 745, 956, 277, 516, 764, 975, 
    1203, 1394, 1616, 1807, 286, 525, 773, 984, 1212, 1403, 1625, 1816, 320, 550, 
    807, 1009, 1240, 1422, 1653, 1835, 2050, 2211, 84, 363, 604, 850, 1063, 1283, 
    1476, 1696, 1889, 2088, 137, 405, 657, 892, 1116, 1325, 1529, 1738, 1942, 2130, 
    190, 447, 57, 577, 1449, 56, 1035, 1861, 629, 1501, 162, 347, 1267, 2072, 
    833, 1679, 388, 1308, 2113, 57, 1036, 1862, 576, 1448, 109, 1088, 1914, 834, 
    1680, 346, 1266, 2071, 875, 1721, 430, 320, 807, 1240, 1653, 2050, 84, 604, 
    1063, 1476, 1889, 137, 657, 1116, 1529, 1942, 190, 
  };

  assert (*(AsmStrs+RegAsmOffset[RegNo-1]) &&
          "Invalid alt name index for register!");
  return AsmStrs+RegAsmOffset[RegNo-1];
}

#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR

bool PPCInstPrinter::printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &OS) {
  static const PatternsForOpcode OpToPatterns[] = {
    {PPC::ADDI, 0, 1 },
    {PPC::ADDI8, 1, 1 },
    {PPC::ADDIS, 2, 1 },
    {PPC::ADDIS8, 3, 1 },
    {PPC::ADDPCIS, 4, 1 },
    {PPC::BCC, 5, 24 },
    {PPC::BCCA, 29, 24 },
    {PPC::BCCCTR, 53, 24 },
    {PPC::BCCCTRL, 77, 24 },
    {PPC::BCCL, 101, 24 },
    {PPC::BCCLA, 125, 24 },
    {PPC::BCCLR, 149, 24 },
    {PPC::BCCLRL, 173, 24 },
    {PPC::CMPD, 197, 1 },
    {PPC::CMPDI, 198, 1 },
    {PPC::CMPLD, 199, 1 },
    {PPC::CMPLDI, 200, 1 },
    {PPC::CMPLW, 201, 1 },
    {PPC::CMPLWI, 202, 1 },
    {PPC::CMPW, 203, 1 },
    {PPC::CMPWI, 204, 1 },
    {PPC::CNTLZW, 205, 1 },
    {PPC::CNTLZW8, 206, 1 },
    {PPC::CNTLZW8_rec, 207, 1 },
    {PPC::CNTLZW_rec, 208, 1 },
    {PPC::CP_PASTE_rec, 209, 1 },
    {PPC::CREQV, 210, 1 },
    {PPC::CRNOR, 211, 1 },
    {PPC::CROR, 212, 1 },
    {PPC::CRXOR, 213, 1 },
    {PPC::DMSHA2HASH, 214, 2 },
    {PPC::DMSHA3HASH, 216, 2 },
    {PPC::DMXXSHAPAD, 218, 8 },
    {PPC::ISEL, 226, 3 },
    {PPC::ISEL8, 229, 3 },
    {PPC::MBAR, 232, 1 },
    {PPC::MFDCR, 233, 8 },
    {PPC::MFSPR, 241, 45 },
    {PPC::MFSPR8, 286, 19 },
    {PPC::MFTB, 305, 1 },
    {PPC::MFUDSCR, 306, 1 },
    {PPC::MFVRSAVE, 307, 1 },
    {PPC::MFVSRD, 308, 1 },
    {PPC::MFVSRWZ, 309, 1 },
    {PPC::MTCRF, 310, 1 },
    {PPC::MTCRF8, 311, 1 },
    {PPC::MTDCR, 312, 8 },
    {PPC::MTFSF, 320, 1 },
    {PPC::MTFSFI, 321, 1 },
    {PPC::MTFSFI_rec, 322, 1 },
    {PPC::MTFSF_rec, 323, 1 },
    {PPC::MTMSR, 324, 1 },
    {PPC::MTMSRD, 325, 1 },
    {PPC::MTSPR, 326, 44 },
    {PPC::MTSPR8, 370, 18 },
    {PPC::MTUDSCR, 388, 1 },
    {PPC::MTVRSAVE, 389, 1 },
    {PPC::MTVSRD, 390, 1 },
    {PPC::MTVSRWA, 391, 1 },
    {PPC::MTVSRWZ, 392, 1 },
    {PPC::NOR, 393, 1 },
    {PPC::NOR8, 394, 1 },
    {PPC::NOR8_rec, 395, 1 },
    {PPC::NOR_rec, 396, 1 },
    {PPC::OR, 397, 1 },
    {PPC::OR8, 398, 1 },
    {PPC::OR8_rec, 399, 1 },
    {PPC::ORI, 400, 1 },
    {PPC::ORI8, 401, 1 },
    {PPC::OR_rec, 402, 1 },
    {PPC::PADDI8, 403, 1 },
    {PPC::RFEBB, 404, 1 },
    {PPC::RLDCL, 405, 1 },
    {PPC::RLDCL_rec, 406, 1 },
    {PPC::RLDICL, 407, 2 },
    {PPC::RLDICL_32_64, 409, 2 },
    {PPC::RLDICL_rec, 411, 2 },
    {PPC::RLWINM, 413, 2 },
    {PPC::RLWINM8, 415, 2 },
    {PPC::RLWINM8_rec, 417, 2 },
    {PPC::RLWINM_rec, 419, 2 },
    {PPC::RLWNM, 421, 1 },
    {PPC::RLWNM8, 422, 1 },
    {PPC::RLWNM8_rec, 423, 1 },
    {PPC::RLWNM_rec, 424, 1 },
    {PPC::SC, 425, 1 },
    {PPC::SUBF, 426, 1 },
    {PPC::SUBF8, 427, 1 },
    {PPC::SUBF8_rec, 428, 1 },
    {PPC::SUBFC, 429, 1 },
    {PPC::SUBFC8, 430, 1 },
    {PPC::SUBFC8_rec, 431, 1 },
    {PPC::SUBFC_rec, 432, 1 },
    {PPC::SUBF_rec, 433, 1 },
    {PPC::SYNC, 434, 3 },
    {PPC::SYNCP10, 437, 8 },
    {PPC::TD, 445, 7 },
    {PPC::TDI, 452, 7 },
    {PPC::TEND, 459, 2 },
    {PPC::TLBIE, 461, 1 },
    {PPC::TLBIEP9, 462, 2 },
    {PPC::TLBILX, 464, 4 },
    {PPC::TLBRE2, 468, 2 },
    {PPC::TLBWE2, 470, 2 },
    {PPC::TSR, 472, 2 },
    {PPC::TW, 474, 8 },
    {PPC::TWI, 482, 7 },
    {PPC::VNOR, 489, 1 },
    {PPC::VOR, 490, 1 },
    {PPC::WAIT, 491, 3 },
    {PPC::WAITP10, 494, 2 },
    {PPC::XORI, 496, 1 },
    {PPC::XORI8, 497, 1 },
    {PPC::XVCPSGNDP, 498, 1 },
    {PPC::XVCPSGNSP, 499, 1 },
    {PPC::XXAESDECP, 500, 3 },
    {PPC::XXAESENCP, 503, 3 },
    {PPC::XXAESGENLKP, 506, 3 },
    {PPC::XXGFMUL128, 509, 2 },
    {PPC::XXPERMDI, 511, 5 },
    {PPC::XXPERMDIs, 516, 3 },
    {PPC::gBC, 519, 10 },
    {PPC::gBCA, 529, 10 },
    {PPC::gBCAat, 539, 2 },
    {PPC::gBCCTR, 541, 7 },
    {PPC::gBCCTRL, 548, 7 },
    {PPC::gBCL, 555, 10 },
    {PPC::gBCLA, 565, 10 },
    {PPC::gBCLAat, 575, 2 },
    {PPC::gBCLR, 577, 11 },
    {PPC::gBCLRL, 588, 11 },
    {PPC::gBCLat, 599, 2 },
    {PPC::gBCat, 601, 2 },
  };

  static const AliasPattern Patterns[] = {
    // PPC::ADDI - 0
    {0, 0, 3, 2 },
    // PPC::ADDI8 - 1
    {0, 2, 3, 2 },
    // PPC::ADDIS - 2
    {12, 4, 3, 2 },
    // PPC::ADDIS8 - 3
    {12, 6, 3, 2 },
    // PPC::ADDPCIS - 4
    {25, 8, 2, 2 },
    // PPC::BCC - 5
    {33, 10, 3, 2 },
    {46, 12, 3, 2 },
    {55, 14, 3, 2 },
    {69, 16, 3, 2 },
    {79, 18, 3, 2 },
    {93, 20, 3, 2 },
    {103, 22, 3, 2 },
    {116, 24, 3, 2 },
    {125, 26, 3, 2 },
    {139, 28, 3, 2 },
    {149, 30, 3, 2 },
    {163, 32, 3, 2 },
    {173, 34, 3, 2 },
    {186, 36, 3, 2 },
    {195, 38, 3, 2 },
    {209, 40, 3, 2 },
    {219, 42, 3, 2 },
    {233, 44, 3, 2 },
    {243, 46, 3, 2 },
    {256, 48, 3, 2 },
    {265, 50, 3, 2 },
    {279, 52, 3, 2 },
    {289, 54, 3, 2 },
    {303, 56, 3, 2 },
    // PPC::BCCA - 29
    {313, 58, 3, 2 },
    {327, 60, 3, 2 },
    {337, 62, 3, 2 },
    {352, 64, 3, 2 },
    {363, 66, 3, 2 },
    {378, 68, 3, 2 },
    {389, 70, 3, 2 },
    {403, 72, 3, 2 },
    {413, 74, 3, 2 },
    {428, 76, 3, 2 },
    {439, 78, 3, 2 },
    {454, 80, 3, 2 },
    {465, 82, 3, 2 },
    {479, 84, 3, 2 },
    {489, 86, 3, 2 },
    {504, 88, 3, 2 },
    {515, 90, 3, 2 },
    {530, 92, 3, 2 },
    {541, 94, 3, 2 },
    {555, 96, 3, 2 },
    {565, 98, 3, 2 },
    {580, 100, 3, 2 },
    {591, 102, 3, 2 },
    {606, 104, 3, 2 },
    // PPC::BCCCTR - 53
    {617, 106, 2, 2 },
    {627, 108, 2, 2 },
    {634, 110, 2, 2 },
    {645, 112, 2, 2 },
    {653, 114, 2, 2 },
    {664, 116, 2, 2 },
    {672, 118, 2, 2 },
    {682, 120, 2, 2 },
    {689, 122, 2, 2 },
    {700, 124, 2, 2 },
    {708, 126, 2, 2 },
    {719, 128, 2, 2 },
    {727, 130, 2, 2 },
    {737, 132, 2, 2 },
    {744, 134, 2, 2 },
    {755, 136, 2, 2 },
    {763, 138, 2, 2 },
    {774, 140, 2, 2 },
    {782, 142, 2, 2 },
    {792, 144, 2, 2 },
    {799, 146, 2, 2 },
    {810, 148, 2, 2 },
    {818, 150, 2, 2 },
    {829, 152, 2, 2 },
    // PPC::BCCCTRL - 77
    {837, 154, 2, 2 },
    {848, 156, 2, 2 },
    {856, 158, 2, 2 },
    {868, 160, 2, 2 },
    {877, 162, 2, 2 },
    {889, 164, 2, 2 },
    {898, 166, 2, 2 },
    {909, 168, 2, 2 },
    {917, 170, 2, 2 },
    {929, 172, 2, 2 },
    {938, 174, 2, 2 },
    {950, 176, 2, 2 },
    {959, 178, 2, 2 },
    {970, 180, 2, 2 },
    {978, 182, 2, 2 },
    {990, 184, 2, 2 },
    {999, 186, 2, 2 },
    {1011, 188, 2, 2 },
    {1020, 190, 2, 2 },
    {1031, 192, 2, 2 },
    {1039, 194, 2, 2 },
    {1051, 196, 2, 2 },
    {1060, 198, 2, 2 },
    {1072, 200, 2, 2 },
    // PPC::BCCL - 101
    {1081, 202, 3, 2 },
    {1095, 204, 3, 2 },
    {1105, 206, 3, 2 },
    {1120, 208, 3, 2 },
    {1131, 210, 3, 2 },
    {1146, 212, 3, 2 },
    {1157, 214, 3, 2 },
    {1171, 216, 3, 2 },
    {1181, 218, 3, 2 },
    {1196, 220, 3, 2 },
    {1207, 222, 3, 2 },
    {1222, 224, 3, 2 },
    {1233, 226, 3, 2 },
    {1247, 228, 3, 2 },
    {1257, 230, 3, 2 },
    {1272, 232, 3, 2 },
    {1283, 234, 3, 2 },
    {1298, 236, 3, 2 },
    {1309, 238, 3, 2 },
    {1323, 240, 3, 2 },
    {1333, 242, 3, 2 },
    {1348, 244, 3, 2 },
    {1359, 246, 3, 2 },
    {1374, 248, 3, 2 },
    // PPC::BCCLA - 125
    {1385, 250, 3, 2 },
    {1400, 252, 3, 2 },
    {1411, 254, 3, 2 },
    {1427, 256, 3, 2 },
    {1439, 258, 3, 2 },
    {1455, 260, 3, 2 },
    {1467, 262, 3, 2 },
    {1482, 264, 3, 2 },
    {1493, 266, 3, 2 },
    {1509, 268, 3, 2 },
    {1521, 270, 3, 2 },
    {1537, 272, 3, 2 },
    {1549, 274, 3, 2 },
    {1564, 276, 3, 2 },
    {1575, 278, 3, 2 },
    {1591, 280, 3, 2 },
    {1603, 282, 3, 2 },
    {1619, 284, 3, 2 },
    {1631, 286, 3, 2 },
    {1646, 288, 3, 2 },
    {1657, 290, 3, 2 },
    {1673, 292, 3, 2 },
    {1685, 294, 3, 2 },
    {1701, 296, 3, 2 },
    // PPC::BCCLR - 149
    {1713, 298, 2, 2 },
    {1722, 300, 2, 2 },
    {1728, 302, 2, 2 },
    {1738, 304, 2, 2 },
    {1745, 306, 2, 2 },
    {1755, 308, 2, 2 },
    {1762, 310, 2, 2 },
    {1771, 312, 2, 2 },
    {1777, 314, 2, 2 },
    {1787, 316, 2, 2 },
    {1794, 318, 2, 2 },
    {1804, 320, 2, 2 },
    {1811, 322, 2, 2 },
    {1820, 324, 2, 2 },
    {1826, 326, 2, 2 },
    {1836, 328, 2, 2 },
    {1843, 330, 2, 2 },
    {1853, 332, 2, 2 },
    {1860, 334, 2, 2 },
    {1869, 336, 2, 2 },
    {1875, 338, 2, 2 },
    {1885, 340, 2, 2 },
    {1892, 342, 2, 2 },
    {1902, 344, 2, 2 },
    // PPC::BCCLRL - 173
    {1909, 346, 2, 2 },
    {1919, 348, 2, 2 },
    {1926, 350, 2, 2 },
    {1937, 352, 2, 2 },
    {1945, 354, 2, 2 },
    {1956, 356, 2, 2 },
    {1964, 358, 2, 2 },
    {1974, 360, 2, 2 },
    {1981, 362, 2, 2 },
    {1992, 364, 2, 2 },
    {2000, 366, 2, 2 },
    {2011, 368, 2, 2 },
    {2019, 370, 2, 2 },
    {2029, 372, 2, 2 },
    {2036, 374, 2, 2 },
    {2047, 376, 2, 2 },
    {2055, 378, 2, 2 },
    {2066, 380, 2, 2 },
    {2074, 382, 2, 2 },
    {2084, 384, 2, 2 },
    {2091, 386, 2, 2 },
    {2102, 388, 2, 2 },
    {2110, 390, 2, 2 },
    {2121, 392, 2, 2 },
    // PPC::CMPD - 197
    {2129, 394, 3, 3 },
    // PPC::CMPDI - 198
    {2141, 397, 3, 2 },
    // PPC::CMPLD - 199
    {2156, 399, 3, 3 },
    // PPC::CMPLDI - 200
    {2169, 402, 3, 2 },
    // PPC::CMPLW - 201
    {2185, 404, 3, 3 },
    // PPC::CMPLWI - 202
    {2198, 407, 3, 2 },
    // PPC::CMPW - 203
    {2214, 409, 3, 3 },
    // PPC::CMPWI - 204
    {2226, 412, 3, 2 },
    // PPC::CNTLZW - 205
    {2241, 414, 2, 2 },
    // PPC::CNTLZW8 - 206
    {2241, 416, 2, 2 },
    // PPC::CNTLZW8_rec - 207
    {2255, 418, 2, 2 },
    // PPC::CNTLZW_rec - 208
    {2255, 420, 2, 2 },
    // PPC::CP_PASTE_rec - 209
    {2270, 422, 3, 3 },
    // PPC::CREQV - 210
    {2284, 425, 3, 3 },
    // PPC::CRNOR - 211
    {2293, 428, 3, 3 },
    // PPC::CROR - 212
    {2306, 431, 3, 3 },
    // PPC::CRXOR - 213
    {2320, 434, 3, 3 },
    // PPC::DMSHA2HASH - 214
    {2329, 437, 4, 4 },
    {2349, 441, 4, 4 },
    // PPC::DMSHA3HASH - 216
    {2369, 445, 3, 3 },
    {2381, 448, 3, 3 },
    // PPC::DMXXSHAPAD - 218
    {2395, 451, 6, 6 },
    {2423, 457, 6, 6 },
    {2451, 463, 6, 6 },
    {2479, 469, 6, 6 },
    {2507, 475, 6, 6 },
    {2536, 481, 6, 6 },
    {2565, 487, 6, 6 },
    {2589, 493, 6, 6 },
    // PPC::ISEL - 226
    {2613, 499, 4, 4 },
    {2631, 503, 4, 4 },
    {2649, 507, 4, 4 },
    // PPC::ISEL8 - 229
    {2613, 511, 4, 4 },
    {2631, 515, 4, 4 },
    {2649, 519, 4, 4 },
    // PPC::MBAR - 232
    {2667, 523, 1, 1 },
    // PPC::MFDCR - 233
    {2672, 524, 2, 5 },
    {2681, 529, 2, 5 },
    {2690, 534, 2, 5 },
    {2699, 539, 2, 5 },
    {2708, 544, 2, 5 },
    {2717, 549, 2, 5 },
    {2726, 554, 2, 5 },
    {2735, 559, 2, 5 },
    // PPC::MFSPR - 241
    {2744, 564, 2, 2 },
    {2753, 566, 2, 5 },
    {2764, 571, 2, 5 },
    {2774, 576, 2, 5 },
    {2784, 581, 2, 5 },
    {2792, 586, 2, 5 },
    {2801, 591, 2, 5 },
    {2811, 596, 2, 5 },
    {2821, 601, 2, 5 },
    {2832, 606, 2, 5 },
    {2841, 611, 2, 5 },
    {2850, 616, 2, 5 },
    {2860, 621, 2, 5 },
    {2870, 626, 2, 5 },
    {2880, 631, 2, 5 },
    {2890, 636, 2, 5 },
    {2899, 641, 2, 5 },
    {2908, 646, 2, 5 },
    {2917, 651, 2, 5 },
    {2930, 656, 2, 5 },
    {2944, 661, 2, 5 },
    {2958, 666, 2, 5 },
    {2972, 671, 2, 5 },
    {2986, 676, 2, 5 },
    {3000, 681, 2, 5 },
    {3014, 686, 2, 5 },
    {3028, 691, 2, 5 },
    {3042, 696, 2, 5 },
    {3056, 701, 2, 5 },
    {3070, 706, 2, 5 },
    {3084, 711, 2, 5 },
    {3098, 716, 2, 5 },
    {3112, 721, 2, 5 },
    {3126, 726, 2, 5 },
    {3140, 731, 2, 5 },
    {3154, 736, 2, 5 },
    {3163, 741, 2, 5 },
    {3172, 746, 2, 5 },
    {3182, 751, 2, 5 },
    {3191, 756, 2, 5 },
    {3201, 761, 2, 5 },
    {3211, 766, 2, 5 },
    {3221, 771, 2, 5 },
    {3231, 776, 2, 5 },
    {3241, 781, 2, 5 },
    // PPC::MFSPR8 - 286
    {2744, 786, 2, 2 },
    {2753, 788, 2, 5 },
    {2764, 793, 2, 5 },
    {2774, 798, 2, 5 },
    {2784, 803, 2, 5 },
    {2792, 808, 2, 5 },
    {2801, 813, 2, 5 },
    {2811, 818, 2, 5 },
    {2821, 823, 2, 5 },
    {2832, 828, 2, 5 },
    {2841, 833, 2, 5 },
    {2850, 838, 2, 5 },
    {2860, 843, 2, 5 },
    {2870, 848, 2, 5 },
    {2880, 853, 2, 5 },
    {2890, 858, 2, 5 },
    {2899, 863, 2, 5 },
    {2908, 868, 2, 5 },
    {2917, 873, 2, 5 },
    // PPC::MFTB - 305
    {3251, 878, 2, 2 },
    // PPC::MFUDSCR - 306
    {2753, 880, 1, 4 },
    // PPC::MFVRSAVE - 307
    {3260, 884, 1, 1 },
    // PPC::MFVSRD - 308
    {3272, 885, 2, 2 },
    // PPC::MFVSRWZ - 309
    {3286, 887, 2, 2 },
    // PPC::MTCRF - 310
    {3301, 889, 2, 2 },
    // PPC::MTCRF8 - 311
    {3301, 891, 2, 2 },
    // PPC::MTDCR - 312
    {3309, 893, 2, 5 },
    {3318, 898, 2, 5 },
    {3327, 903, 2, 5 },
    {3336, 908, 2, 5 },
    {3345, 913, 2, 5 },
    {3354, 918, 2, 5 },
    {3363, 923, 2, 5 },
    {3372, 928, 2, 5 },
    // PPC::MTFSF - 320
    {3381, 933, 4, 4 },
    // PPC::MTFSFI - 321
    {3394, 937, 3, 3 },
    // PPC::MTFSFI_rec - 322
    {3412, 940, 3, 3 },
    // PPC::MTFSF_rec - 323
    {3431, 943, 4, 4 },
    // PPC::MTMSR - 324
    {3445, 947, 2, 5 },
    // PPC::MTMSRD - 325
    {3454, 952, 2, 5 },
    // PPC::MTSPR - 326
    {3464, 957, 2, 2 },
    {3473, 959, 2, 5 },
    {3484, 964, 2, 5 },
    {3492, 969, 2, 5 },
    {3501, 974, 2, 5 },
    {3511, 979, 2, 5 },
    {3521, 984, 2, 5 },
    {3532, 989, 2, 5 },
    {3541, 994, 2, 5 },
    {3550, 999, 2, 5 },
    {3560, 1004, 2, 5 },
    {3570, 1009, 2, 5 },
    {3580, 1014, 2, 5 },
    {3590, 1019, 2, 5 },
    {3599, 1024, 2, 5 },
    {3608, 1029, 2, 5 },
    {3617, 1034, 2, 5 },
    {3626, 1039, 2, 5 },
    {3639, 1044, 2, 5 },
    {3653, 1049, 2, 5 },
    {3667, 1054, 2, 5 },
    {3681, 1059, 2, 5 },
    {3695, 1064, 2, 5 },
    {3709, 1069, 2, 5 },
    {3723, 1074, 2, 5 },
    {3737, 1079, 2, 5 },
    {3751, 1084, 2, 5 },
    {3765, 1089, 2, 5 },
    {3779, 1094, 2, 5 },
    {3793, 1099, 2, 5 },
    {3807, 1104, 2, 5 },
    {3821, 1109, 2, 5 },
    {3835, 1114, 2, 5 },
    {3849, 1119, 2, 5 },
    {3863, 1124, 2, 5 },
    {3872, 1129, 2, 5 },
    {3881, 1134, 2, 5 },
    {3891, 1139, 2, 5 },
    {3900, 1144, 2, 5 },
    {3910, 1149, 2, 5 },
    {3920, 1154, 2, 5 },
    {3930, 1159, 2, 5 },
    {3940, 1164, 2, 5 },
    {3950, 1169, 2, 5 },
    // PPC::MTSPR8 - 370
    {3464, 1174, 2, 2 },
    {3473, 1176, 2, 5 },
    {3484, 1181, 2, 5 },
    {3492, 1186, 2, 5 },
    {3501, 1191, 2, 5 },
    {3511, 1196, 2, 5 },
    {3521, 1201, 2, 5 },
    {3532, 1206, 2, 5 },
    {3541, 1211, 2, 5 },
    {3550, 1216, 2, 5 },
    {3560, 1221, 2, 5 },
    {3570, 1226, 2, 5 },
    {3580, 1231, 2, 5 },
    {3590, 1236, 2, 5 },
    {3599, 1241, 2, 5 },
    {3608, 1246, 2, 5 },
    {3617, 1251, 2, 5 },
    {3626, 1256, 2, 5 },
    // PPC::MTUDSCR - 388
    {3960, 1261, 1, 4 },
    // PPC::MTVRSAVE - 389
    {3971, 1265, 1, 1 },
    // PPC::MTVSRD - 390
    {3983, 1266, 2, 2 },
    // PPC::MTVSRWA - 391
    {3997, 1268, 2, 2 },
    // PPC::MTVSRWZ - 392
    {4012, 1270, 2, 2 },
    // PPC::NOR - 393
    {4027, 1272, 3, 3 },
    // PPC::NOR8 - 394
    {4027, 1275, 3, 3 },
    // PPC::NOR8_rec - 395
    {4038, 1278, 3, 3 },
    // PPC::NOR_rec - 396
    {4038, 1281, 3, 3 },
    // PPC::OR - 397
    {4050, 1284, 3, 3 },
    // PPC::OR8 - 398
    {4050, 1287, 3, 3 },
    // PPC::OR8_rec - 399
    {4060, 1290, 3, 3 },
    // PPC::ORI - 400
    {4071, 1293, 3, 3 },
    // PPC::ORI8 - 401
    {4071, 1296, 3, 3 },
    // PPC::OR_rec - 402
    {4060, 1299, 3, 3 },
    // PPC::PADDI8 - 403
    {4075, 1302, 3, 2 },
    // PPC::RFEBB - 404
    {4094, 1304, 1, 1 },
    // PPC::RLDCL - 405
    {4100, 1305, 4, 4 },
    // PPC::RLDCL_rec - 406
    {4117, 1309, 4, 4 },
    // PPC::RLDICL - 407
    {4135, 1313, 4, 4 },
    {4155, 1317, 4, 3 },
    // PPC::RLDICL_32_64 - 409
    {4135, 1320, 4, 4 },
    {4155, 1324, 4, 3 },
    // PPC::RLDICL_rec - 411
    {4175, 1327, 4, 4 },
    {4196, 1331, 4, 3 },
    // PPC::RLWINM - 413
    {4217, 1334, 5, 5 },
    {4237, 1339, 5, 5 },
    // PPC::RLWINM8 - 415
    {4217, 1344, 5, 5 },
    {4237, 1349, 5, 5 },
    // PPC::RLWINM8_rec - 417
    {4257, 1354, 5, 5 },
    {4278, 1359, 5, 5 },
    // PPC::RLWINM_rec - 419
    {4257, 1364, 5, 5 },
    {4278, 1369, 5, 5 },
    // PPC::RLWNM - 421
    {4299, 1374, 5, 5 },
    // PPC::RLWNM8 - 422
    {4299, 1379, 5, 5 },
    // PPC::RLWNM8_rec - 423
    {4316, 1384, 5, 5 },
    // PPC::RLWNM_rec - 424
    {4316, 1389, 5, 5 },
    // PPC::SC - 425
    {4334, 1394, 1, 1 },
    // PPC::SUBF - 426
    {4337, 1395, 3, 3 },
    // PPC::SUBF8 - 427
    {4337, 1398, 3, 3 },
    // PPC::SUBF8_rec - 428
    {4352, 1401, 3, 3 },
    // PPC::SUBFC - 429
    {4368, 1404, 3, 3 },
    // PPC::SUBFC8 - 430
    {4368, 1407, 3, 3 },
    // PPC::SUBFC8_rec - 431
    {4384, 1410, 3, 3 },
    // PPC::SUBFC_rec - 432
    {4384, 1413, 3, 3 },
    // PPC::SUBF_rec - 433
    {4352, 1416, 3, 3 },
    // PPC::SYNC - 434
    {4401, 1419, 1, 1 },
    {4406, 1420, 1, 1 },
    {4413, 1421, 1, 1 },
    // PPC::SYNCP10 - 437
    {4401, 1422, 2, 2 },
    {4413, 1424, 2, 2 },
    {4421, 1426, 2, 2 },
    {4429, 1428, 2, 2 },
    {4437, 1430, 2, 2 },
    {4447, 1432, 2, 2 },
    {4457, 1434, 2, 2 },
    {4466, 1436, 2, 2 },
    // PPC::TD - 445
    {4473, 1438, 3, 3 },
    {4485, 1441, 3, 3 },
    {4497, 1444, 3, 3 },
    {4509, 1447, 3, 3 },
    {4521, 1450, 3, 3 },
    {4534, 1453, 3, 3 },
    {4547, 1456, 3, 3 },
    // PPC::TDI - 452
    {4558, 1459, 3, 2 },
    {4573, 1461, 3, 2 },
    {4588, 1463, 3, 2 },
    {4603, 1465, 3, 2 },
    {4618, 1467, 3, 2 },
    {4634, 1469, 3, 2 },
    {4650, 1471, 3, 2 },
    // PPC::TEND - 459
    {4664, 1473, 1, 1 },
    {4670, 1474, 1, 1 },
    // PPC::TLBIE - 461
    {4679, 1475, 2, 2 },
    // PPC::TLBIEP9 - 462
    {4679, 1477, 5, 5 },
    {4688, 1482, 5, 5 },
    // PPC::TLBILX - 464
    {4701, 1487, 3, 3 },
    {4712, 1490, 3, 3 },
    {4722, 1493, 3, 3 },
    {4738, 1496, 3, 3 },
    // PPC::TLBRE2 - 468
    {4750, 1499, 3, 3 },
    {4765, 1502, 3, 3 },
    // PPC::TLBWE2 - 470
    {4780, 1505, 3, 3 },
    {4795, 1508, 3, 3 },
    // PPC::TSR - 472
    {4810, 1511, 1, 1 },
    {4820, 1512, 1, 1 },
    // PPC::TW - 474
    {4829, 1513, 3, 3 },
    {4834, 1516, 3, 3 },
    {4846, 1519, 3, 3 },
    {4858, 1522, 3, 3 },
    {4870, 1525, 3, 3 },
    {4882, 1528, 3, 3 },
    {4895, 1531, 3, 3 },
    {4908, 1534, 3, 3 },
    // PPC::TWI - 482
    {4919, 1537, 3, 2 },
    {4934, 1539, 3, 2 },
    {4949, 1541, 3, 2 },
    {4964, 1543, 3, 2 },
    {4979, 1545, 3, 2 },
    {4995, 1547, 3, 2 },
    {5011, 1549, 3, 2 },
    // PPC::VNOR - 489
    {5025, 1551, 3, 3 },
    // PPC::VOR - 490
    {5037, 1554, 3, 3 },
    // PPC::WAIT - 491
    {5048, 1557, 1, 1 },
    {5053, 1558, 1, 1 },
    {5061, 1559, 1, 1 },
    // PPC::WAITP10 - 494
    {5048, 1560, 2, 2 },
    {5053, 1562, 2, 2 },
    // PPC::XORI - 496
    {5070, 1564, 3, 3 },
    // PPC::XORI8 - 497
    {5070, 1567, 3, 3 },
    // PPC::XVCPSGNDP - 498
    {5075, 1570, 3, 3 },
    // PPC::XVCPSGNSP - 499
    {5090, 1573, 3, 3 },
    // PPC::XXAESDECP - 500
    {5105, 1576, 4, 4 },
    {5129, 1580, 4, 4 },
    {5153, 1584, 4, 4 },
    // PPC::XXAESENCP - 503
    {5177, 1588, 4, 4 },
    {5201, 1592, 4, 4 },
    {5225, 1596, 4, 4 },
    // PPC::XXAESGENLKP - 506
    {5249, 1600, 3, 3 },
    {5271, 1603, 3, 3 },
    {5293, 1606, 3, 3 },
    // PPC::XXGFMUL128 - 509
    {5315, 1609, 4, 4 },
    {5340, 1613, 4, 4 },
    // PPC::XXPERMDI - 511
    {5365, 1617, 4, 7 },
    {5383, 1624, 4, 7 },
    {5401, 1631, 4, 4 },
    {5420, 1635, 4, 4 },
    {5439, 1639, 4, 4 },
    // PPC::XXPERMDIs - 516
    {5365, 1643, 3, 6 },
    {5383, 1649, 3, 6 },
    {5439, 1655, 3, 3 },
    // PPC::gBC - 519
    {5454, 1658, 3, 2 },
    {5466, 1660, 3, 2 },
    {5478, 1662, 3, 2 },
    {5491, 1664, 3, 2 },
    {5504, 1666, 3, 2 },
    {5517, 1668, 3, 2 },
    {5530, 1670, 3, 2 },
    {5545, 1672, 3, 2 },
    {5560, 1674, 3, 2 },
    {5574, 1676, 3, 2 },
    // PPC::gBCA - 529
    {5588, 1678, 3, 2 },
    {5601, 1680, 3, 2 },
    {5614, 1682, 3, 2 },
    {5628, 1684, 3, 2 },
    {5642, 1686, 3, 2 },
    {5656, 1688, 3, 2 },
    {5670, 1690, 3, 2 },
    {5686, 1692, 3, 2 },
    {5702, 1694, 3, 2 },
    {5717, 1696, 3, 2 },
    // PPC::gBCAat - 539
    {5732, 1698, 4, 3 },
    {5752, 1701, 4, 3 },
    // PPC::gBCCTR - 541
    {5772, 1704, 3, 3 },
    {5787, 1707, 3, 3 },
    {5796, 1710, 3, 3 },
    {5805, 1713, 3, 3 },
    {5815, 1716, 3, 3 },
    {5825, 1719, 3, 3 },
    {5835, 1722, 3, 3 },
    // PPC::gBCCTRL - 548
    {5845, 1725, 3, 3 },
    {5861, 1728, 3, 3 },
    {5871, 1731, 3, 3 },
    {5881, 1734, 3, 3 },
    {5892, 1737, 3, 3 },
    {5903, 1740, 3, 3 },
    {5914, 1743, 3, 3 },
    // PPC::gBCL - 555
    {5925, 1746, 3, 2 },
    {5938, 1748, 3, 2 },
    {5951, 1750, 3, 2 },
    {5965, 1752, 3, 2 },
    {5979, 1754, 3, 2 },
    {5993, 1756, 3, 2 },
    {6007, 1758, 3, 2 },
    {6023, 1760, 3, 2 },
    {6039, 1762, 3, 2 },
    {6054, 1764, 3, 2 },
    // PPC::gBCLA - 565
    {6069, 1766, 3, 2 },
    {6083, 1768, 3, 2 },
    {6097, 1770, 3, 2 },
    {6112, 1772, 3, 2 },
    {6127, 1774, 3, 2 },
    {6142, 1776, 3, 2 },
    {6157, 1778, 3, 2 },
    {6174, 1780, 3, 2 },
    {6191, 1782, 3, 2 },
    {6207, 1784, 3, 2 },
    // PPC::gBCLAat - 575
    {6223, 1786, 4, 3 },
    {6244, 1789, 4, 3 },
    // PPC::gBCLR - 577
    {6265, 1792, 3, 3 },
    {6279, 1795, 3, 3 },
    {6287, 1798, 3, 3 },
    {6295, 1801, 3, 3 },
    {6304, 1804, 3, 3 },
    {6313, 1807, 3, 3 },
    {6322, 1810, 3, 3 },
    {6331, 1813, 3, 3 },
    {6342, 1816, 3, 3 },
    {6353, 1819, 3, 3 },
    {6363, 1822, 3, 3 },
    // PPC::gBCLRL - 588
    {6373, 1825, 3, 3 },
    {6388, 1828, 3, 3 },
    {6397, 1831, 3, 3 },
    {6406, 1834, 3, 3 },
    {6416, 1837, 3, 3 },
    {6426, 1840, 3, 3 },
    {6436, 1843, 3, 3 },
    {6446, 1846, 3, 3 },
    {6458, 1849, 3, 3 },
    {6470, 1852, 3, 3 },
    {6481, 1855, 3, 3 },
    // PPC::gBCLat - 599
    {6492, 1858, 4, 3 },
    {6512, 1861, 4, 3 },
    // PPC::gBCat - 601
    {6532, 1864, 4, 3 },
    {6551, 1867, 4, 3 },
  };

  static const AliasPatternCond Conds[] = {
    // (ADDI gprc:$rD, ZERO, s16imm:$imm) - 0
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Reg, PPC::ZERO},
    // (ADDI8 g8rc:$rD, ZERO8, s16imm64:$imm) - 2
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Reg, PPC::ZERO8},
    // (ADDIS gprc:$rD, ZERO, s17imm:$imm) - 4
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Reg, PPC::ZERO},
    // (ADDIS8 g8rc:$rD, ZERO8, s17imm64:$imm) - 6
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Reg, PPC::ZERO8},
    // (ADDPCIS g8rc:$RT, 0) - 8
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (BCC (pred 12, crrc:$cc), condbrtarget:$dst) - 10
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 12, CR0), condbrtarget:$dst) - 12
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 14, crrc:$cc), condbrtarget:$dst) - 14
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 14, CR0), condbrtarget:$dst) - 16
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 15, crrc:$cc), condbrtarget:$dst) - 18
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 15, CR0), condbrtarget:$dst) - 20
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 44, crrc:$cc), condbrtarget:$dst) - 22
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 44, CR0), condbrtarget:$dst) - 24
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 46, crrc:$cc), condbrtarget:$dst) - 26
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 46, CR0), condbrtarget:$dst) - 28
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 47, crrc:$cc), condbrtarget:$dst) - 30
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 47, CR0), condbrtarget:$dst) - 32
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 76, crrc:$cc), condbrtarget:$dst) - 34
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 76, CR0), condbrtarget:$dst) - 36
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 78, crrc:$cc), condbrtarget:$dst) - 38
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 78, CR0), condbrtarget:$dst) - 40
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 79, crrc:$cc), condbrtarget:$dst) - 42
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 79, CR0), condbrtarget:$dst) - 44
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 68, crrc:$cc), condbrtarget:$dst) - 46
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 68, CR0), condbrtarget:$dst) - 48
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 70, crrc:$cc), condbrtarget:$dst) - 50
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 70, CR0), condbrtarget:$dst) - 52
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCC (pred 71, crrc:$cc), condbrtarget:$dst) - 54
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCC (pred 71, CR0), condbrtarget:$dst) - 56
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 12, crrc:$cc), abscondbrtarget:$dst) - 58
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 12, CR0), abscondbrtarget:$dst) - 60
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 14, crrc:$cc), abscondbrtarget:$dst) - 62
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 14, CR0), abscondbrtarget:$dst) - 64
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 15, crrc:$cc), abscondbrtarget:$dst) - 66
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 15, CR0), abscondbrtarget:$dst) - 68
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 44, crrc:$cc), abscondbrtarget:$dst) - 70
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 44, CR0), abscondbrtarget:$dst) - 72
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 46, crrc:$cc), abscondbrtarget:$dst) - 74
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 46, CR0), abscondbrtarget:$dst) - 76
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 47, crrc:$cc), abscondbrtarget:$dst) - 78
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 47, CR0), abscondbrtarget:$dst) - 80
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 76, crrc:$cc), abscondbrtarget:$dst) - 82
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 76, CR0), abscondbrtarget:$dst) - 84
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 78, crrc:$cc), abscondbrtarget:$dst) - 86
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 78, CR0), abscondbrtarget:$dst) - 88
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 79, crrc:$cc), abscondbrtarget:$dst) - 90
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 79, CR0), abscondbrtarget:$dst) - 92
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 68, crrc:$cc), abscondbrtarget:$dst) - 94
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 68, CR0), abscondbrtarget:$dst) - 96
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 70, crrc:$cc), abscondbrtarget:$dst) - 98
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 70, CR0), abscondbrtarget:$dst) - 100
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCA (pred 71, crrc:$cc), abscondbrtarget:$dst) - 102
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCA (pred 71, CR0), abscondbrtarget:$dst) - 104
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 12, crrc:$cc)) - 106
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 12, CR0)) - 108
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 14, crrc:$cc)) - 110
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 14, CR0)) - 112
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 15, crrc:$cc)) - 114
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 15, CR0)) - 116
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 44, crrc:$cc)) - 118
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 44, CR0)) - 120
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 46, crrc:$cc)) - 122
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 46, CR0)) - 124
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 47, crrc:$cc)) - 126
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 47, CR0)) - 128
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 76, crrc:$cc)) - 130
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 76, CR0)) - 132
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 78, crrc:$cc)) - 134
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 78, CR0)) - 136
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 79, crrc:$cc)) - 138
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 79, CR0)) - 140
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 68, crrc:$cc)) - 142
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 68, CR0)) - 144
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 70, crrc:$cc)) - 146
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 70, CR0)) - 148
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTR (pred 71, crrc:$cc)) - 150
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTR (pred 71, CR0)) - 152
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 12, crrc:$cc)) - 154
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 12, CR0)) - 156
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 14, crrc:$cc)) - 158
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 14, CR0)) - 160
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 15, crrc:$cc)) - 162
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 15, CR0)) - 164
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 44, crrc:$cc)) - 166
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 44, CR0)) - 168
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 46, crrc:$cc)) - 170
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 46, CR0)) - 172
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 47, crrc:$cc)) - 174
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 47, CR0)) - 176
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 76, crrc:$cc)) - 178
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 76, CR0)) - 180
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 78, crrc:$cc)) - 182
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 78, CR0)) - 184
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 79, crrc:$cc)) - 186
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 79, CR0)) - 188
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 68, crrc:$cc)) - 190
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 68, CR0)) - 192
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 70, crrc:$cc)) - 194
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 70, CR0)) - 196
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCCTRL (pred 71, crrc:$cc)) - 198
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCCTRL (pred 71, CR0)) - 200
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 12, crrc:$cc), condbrtarget:$dst) - 202
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 12, CR0), condbrtarget:$dst) - 204
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 14, crrc:$cc), condbrtarget:$dst) - 206
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 14, CR0), condbrtarget:$dst) - 208
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 15, crrc:$cc), condbrtarget:$dst) - 210
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 15, CR0), condbrtarget:$dst) - 212
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 44, crrc:$cc), condbrtarget:$dst) - 214
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 44, CR0), condbrtarget:$dst) - 216
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 46, crrc:$cc), condbrtarget:$dst) - 218
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 46, CR0), condbrtarget:$dst) - 220
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 47, crrc:$cc), condbrtarget:$dst) - 222
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 47, CR0), condbrtarget:$dst) - 224
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 76, crrc:$cc), condbrtarget:$dst) - 226
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 76, CR0), condbrtarget:$dst) - 228
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 78, crrc:$cc), condbrtarget:$dst) - 230
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 78, CR0), condbrtarget:$dst) - 232
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 79, crrc:$cc), condbrtarget:$dst) - 234
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 79, CR0), condbrtarget:$dst) - 236
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 68, crrc:$cc), condbrtarget:$dst) - 238
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 68, CR0), condbrtarget:$dst) - 240
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 70, crrc:$cc), condbrtarget:$dst) - 242
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 70, CR0), condbrtarget:$dst) - 244
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCL (pred 71, crrc:$cc), condbrtarget:$dst) - 246
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCL (pred 71, CR0), condbrtarget:$dst) - 248
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 12, crrc:$cc), abscondbrtarget:$dst) - 250
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 12, CR0), abscondbrtarget:$dst) - 252
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 14, crrc:$cc), abscondbrtarget:$dst) - 254
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 14, CR0), abscondbrtarget:$dst) - 256
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 15, crrc:$cc), abscondbrtarget:$dst) - 258
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 15, CR0), abscondbrtarget:$dst) - 260
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 44, crrc:$cc), abscondbrtarget:$dst) - 262
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 44, CR0), abscondbrtarget:$dst) - 264
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 46, crrc:$cc), abscondbrtarget:$dst) - 266
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 46, CR0), abscondbrtarget:$dst) - 268
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 47, crrc:$cc), abscondbrtarget:$dst) - 270
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 47, CR0), abscondbrtarget:$dst) - 272
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 76, crrc:$cc), abscondbrtarget:$dst) - 274
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 76, CR0), abscondbrtarget:$dst) - 276
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 78, crrc:$cc), abscondbrtarget:$dst) - 278
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 78, CR0), abscondbrtarget:$dst) - 280
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 79, crrc:$cc), abscondbrtarget:$dst) - 282
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 79, CR0), abscondbrtarget:$dst) - 284
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 68, crrc:$cc), abscondbrtarget:$dst) - 286
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 68, CR0), abscondbrtarget:$dst) - 288
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 70, crrc:$cc), abscondbrtarget:$dst) - 290
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 70, CR0), abscondbrtarget:$dst) - 292
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLA (pred 71, crrc:$cc), abscondbrtarget:$dst) - 294
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLA (pred 71, CR0), abscondbrtarget:$dst) - 296
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 12, crrc:$cc)) - 298
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 12, CR0)) - 300
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 14, crrc:$cc)) - 302
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 14, CR0)) - 304
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 15, crrc:$cc)) - 306
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 15, CR0)) - 308
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 44, crrc:$cc)) - 310
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 44, CR0)) - 312
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 46, crrc:$cc)) - 314
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 46, CR0)) - 316
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 47, crrc:$cc)) - 318
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 47, CR0)) - 320
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 76, crrc:$cc)) - 322
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 76, CR0)) - 324
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 78, crrc:$cc)) - 326
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 78, CR0)) - 328
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 79, crrc:$cc)) - 330
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 79, CR0)) - 332
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 68, crrc:$cc)) - 334
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 68, CR0)) - 336
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 70, crrc:$cc)) - 338
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 70, CR0)) - 340
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLR (pred 71, crrc:$cc)) - 342
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLR (pred 71, CR0)) - 344
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 12, crrc:$cc)) - 346
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 12, CR0)) - 348
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 14, crrc:$cc)) - 350
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 14, CR0)) - 352
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 15, crrc:$cc)) - 354
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 15, CR0)) - 356
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 44, crrc:$cc)) - 358
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 44, CR0)) - 360
    {AliasPatternCond::K_Imm, uint32_t(44)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 46, crrc:$cc)) - 362
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 46, CR0)) - 364
    {AliasPatternCond::K_Imm, uint32_t(46)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 47, crrc:$cc)) - 366
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 47, CR0)) - 368
    {AliasPatternCond::K_Imm, uint32_t(47)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 76, crrc:$cc)) - 370
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 76, CR0)) - 372
    {AliasPatternCond::K_Imm, uint32_t(76)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 78, crrc:$cc)) - 374
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 78, CR0)) - 376
    {AliasPatternCond::K_Imm, uint32_t(78)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 79, crrc:$cc)) - 378
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 79, CR0)) - 380
    {AliasPatternCond::K_Imm, uint32_t(79)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 68, crrc:$cc)) - 382
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 68, CR0)) - 384
    {AliasPatternCond::K_Imm, uint32_t(68)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 70, crrc:$cc)) - 386
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 70, CR0)) - 388
    {AliasPatternCond::K_Imm, uint32_t(70)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (BCCLRL (pred 71, crrc:$cc)) - 390
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_RegClass, PPC::CRRCRegClassID},
    // (BCCLRL (pred 71, CR0)) - 392
    {AliasPatternCond::K_Imm, uint32_t(71)},
    {AliasPatternCond::K_Reg, PPC::CR0},
    // (CMPD CR0, g8rc:$rA, g8rc:$rB) - 394
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (CMPDI CR0, g8rc:$rA, s16imm64:$imm) - 397
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (CMPLD CR0, g8rc:$rA, g8rc:$rB) - 399
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (CMPLDI CR0, g8rc:$rA, u16imm64:$imm) - 402
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (CMPLW CR0, gprc:$rA, gprc:$rB) - 404
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (CMPLWI CR0, gprc:$rA, u16imm:$imm) - 407
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (CMPW CR0, gprc:$rA, gprc:$rB) - 409
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (CMPWI CR0, gprc:$rA, s16imm:$imm) - 412
    {AliasPatternCond::K_Reg, PPC::CR0},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (CNTLZW gprc:$rA, gprc:$rS) - 414
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (CNTLZW8 g8rc:$rA, g8rc:$rS) - 416
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (CNTLZW8_rec g8rc:$rA, g8rc:$rS) - 418
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (CNTLZW_rec gprc:$rA, gprc:$rS) - 420
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (CP_PASTE_rec gprc:$RA, gprc:$RB, 1) - 422
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) - 425
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_TiedReg, 0},
    {AliasPatternCond::K_TiedReg, 0},
    // (CRNOR crbitrc:$bx, crbitrc:$by, crbitrc:$by) - 428
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by) - 431
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx) - 434
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_TiedReg, 0},
    {AliasPatternCond::K_TiedReg, 0},
    // (DMSHA2HASH dmr:$AT, dmr:$AB, 0) - 437
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (DMSHA2HASH dmr:$AT, dmr:$AB, 1) - 441
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (DMSHA3HASH dmrp:$ATp, 0) - 445
    {AliasPatternCond::K_RegClass, PPC::DMRpRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (DMSHA3HASH dmrp:$ATp, 12) - 448
    {AliasPatternCond::K_RegClass, PPC::DMRpRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(12)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 0) - 451
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 1) - 457
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 2) - 463
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 0, u1imm:$E, 3) - 469
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 1, u1imm:$E, 0) - 475
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 1, u1imm:$E, 1) - 481
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 2, 0, 0) - 487
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (DMXXSHAPAD dmr:$AT, vsrc:$XB, 3, 0, 0) - 493
    {AliasPatternCond::K_RegClass, PPC::DMRRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0LT) - 499
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRC_NOR0RegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Reg, PPC::CR0LT},
    // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0GT) - 503
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRC_NOR0RegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Reg, PPC::CR0GT},
    // (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0EQ) - 507
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRC_NOR0RegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Reg, PPC::CR0EQ},
    // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0LT) - 511
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RC_NOX0RegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Reg, PPC::CR0LT},
    // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0GT) - 515
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RC_NOX0RegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Reg, PPC::CR0GT},
    // (ISEL8 g8rc:$rT, g8rc_nox0:$rA, g8rc:$rB, CR0EQ) - 519
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RC_NOX0RegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Reg, PPC::CR0EQ},
    // (MBAR 0) - 523
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (MFDCR gprc:$Rx, 128) - 524
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(128)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFDCR gprc:$Rx, 129) - 529
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(129)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFDCR gprc:$Rx, 130) - 534
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(130)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFDCR gprc:$Rx, 131) - 539
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(131)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFDCR gprc:$Rx, 132) - 544
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(132)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFDCR gprc:$Rx, 133) - 549
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(133)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFDCR gprc:$Rx, 134) - 554
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(134)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFDCR gprc:$Rx, 135) - 559
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(135)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 1) - 564
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (MFSPR gprc:$Rx, 3) - 566
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 4) - 571
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 5) - 576
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(5)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 8) - 581
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 9) - 586
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(9)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 13) - 591
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(13)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 17) - 596
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(17)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 18) - 601
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(18)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 19) - 606
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(19)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 22) - 611
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(22)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 25) - 616
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(25)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 26) - 621
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(26)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 27) - 626
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(27)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 28) - 631
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(28)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 29) - 636
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(29)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$RT, 280) - 641
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(280)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$RT, 287) - 646
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(287)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 512) - 651
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(512)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 536) - 656
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(536)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 537) - 661
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(537)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 528) - 666
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(528)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 529) - 671
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(529)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 538) - 676
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(538)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 539) - 681
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(539)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 530) - 686
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(530)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 531) - 691
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(531)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 540) - 696
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(540)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 541) - 701
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(541)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 532) - 706
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(532)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 533) - 711
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(533)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 542) - 716
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(542)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 543) - 721
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(543)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 534) - 726
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(534)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 535) - 731
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(535)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$RT, 896) - 736
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(896)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 980) - 741
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(980)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 981) - 746
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(981)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 986) - 751
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(986)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 988) - 756
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(988)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 989) - 761
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(989)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 990) - 766
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(990)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 991) - 771
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(991)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 1018) - 776
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1018)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR gprc:$Rx, 1019) - 781
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1019)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 1) - 786
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (MFSPR8 g8rc:$Rx, 3) - 788
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 4) - 793
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 5) - 798
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(5)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 8) - 803
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 9) - 808
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(9)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 13) - 813
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(13)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 17) - 818
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(17)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 18) - 823
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(18)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 19) - 828
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(19)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 22) - 833
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(22)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 25) - 838
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(25)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 26) - 843
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(26)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 27) - 848
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(27)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 28) - 853
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(28)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 29) - 858
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(29)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$RT, 280) - 863
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(280)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$RT, 287) - 868
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(287)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFSPR8 g8rc:$Rx, 512) - 873
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(512)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFTB gprc:$Rx, 269) - 878
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(269)},
    // (MFUDSCR gprc:$Rx) - 880
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MFVRSAVE gprc:$rS) - 884
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (MFVSRD g8rc:$rA, f8rc:$src) - 885
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::F8RCRegClassID},
    // (MFVSRWZ gprc:$rA, f8rc:$src) - 887
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::F8RCRegClassID},
    // (MTCRF 255, gprc:$rA) - 889
    {AliasPatternCond::K_Imm, uint32_t(255)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (MTCRF8 255, g8rc:$rA) - 891
    {AliasPatternCond::K_Imm, uint32_t(255)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (MTDCR gprc:$Rx, 128) - 893
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(128)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTDCR gprc:$Rx, 129) - 898
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(129)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTDCR gprc:$Rx, 130) - 903
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(130)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTDCR gprc:$Rx, 131) - 908
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(131)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTDCR gprc:$Rx, 132) - 913
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(132)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTDCR gprc:$Rx, 133) - 918
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(133)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTDCR gprc:$Rx, 134) - 923
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(134)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTDCR gprc:$Rx, 135) - 928
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(135)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTFSF i32imm:$FLM, f8rc:$FRB, 0, 0) - 933
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::F8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (MTFSFI u3imm:$BF, u4imm:$U, 0) - 937
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (MTFSFI_rec u3imm:$BF, u4imm:$U, 0) - 940
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (MTFSF_rec i32imm:$FLM, f8rc:$FRB, 0, 0) - 943
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::F8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (MTMSR gprc:$RS, 0) - 947
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTMSRD gprc:$RS, 0) - 952
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 1, gprc:$Rx) - 957
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (MTSPR 3, gprc:$Rx) - 959
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 8, gprc:$Rx) - 964
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 9, gprc:$Rx) - 969
    {AliasPatternCond::K_Imm, uint32_t(9)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 13, gprc:$Rx) - 974
    {AliasPatternCond::K_Imm, uint32_t(13)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 17, gprc:$Rx) - 979
    {AliasPatternCond::K_Imm, uint32_t(17)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 18, gprc:$Rx) - 984
    {AliasPatternCond::K_Imm, uint32_t(18)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 19, gprc:$Rx) - 989
    {AliasPatternCond::K_Imm, uint32_t(19)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 22, gprc:$Rx) - 994
    {AliasPatternCond::K_Imm, uint32_t(22)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 25, gprc:$Rx) - 999
    {AliasPatternCond::K_Imm, uint32_t(25)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 26, gprc:$Rx) - 1004
    {AliasPatternCond::K_Imm, uint32_t(26)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 27, gprc:$Rx) - 1009
    {AliasPatternCond::K_Imm, uint32_t(27)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 28, gprc:$Rx) - 1014
    {AliasPatternCond::K_Imm, uint32_t(28)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 29, gprc:$Rx) - 1019
    {AliasPatternCond::K_Imm, uint32_t(29)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 280, gprc:$RT) - 1024
    {AliasPatternCond::K_Imm, uint32_t(280)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 284, gprc:$Rx) - 1029
    {AliasPatternCond::K_Imm, uint32_t(284)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 285, gprc:$Rx) - 1034
    {AliasPatternCond::K_Imm, uint32_t(285)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 512, gprc:$Rx) - 1039
    {AliasPatternCond::K_Imm, uint32_t(512)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 536, gprc:$Rx) - 1044
    {AliasPatternCond::K_Imm, uint32_t(536)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 537, gprc:$Rx) - 1049
    {AliasPatternCond::K_Imm, uint32_t(537)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 528, gprc:$Rx) - 1054
    {AliasPatternCond::K_Imm, uint32_t(528)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 529, gprc:$Rx) - 1059
    {AliasPatternCond::K_Imm, uint32_t(529)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 538, gprc:$Rx) - 1064
    {AliasPatternCond::K_Imm, uint32_t(538)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 539, gprc:$Rx) - 1069
    {AliasPatternCond::K_Imm, uint32_t(539)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 530, gprc:$Rx) - 1074
    {AliasPatternCond::K_Imm, uint32_t(530)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 531, gprc:$Rx) - 1079
    {AliasPatternCond::K_Imm, uint32_t(531)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 540, gprc:$Rx) - 1084
    {AliasPatternCond::K_Imm, uint32_t(540)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 541, gprc:$Rx) - 1089
    {AliasPatternCond::K_Imm, uint32_t(541)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 532, gprc:$Rx) - 1094
    {AliasPatternCond::K_Imm, uint32_t(532)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 533, gprc:$Rx) - 1099
    {AliasPatternCond::K_Imm, uint32_t(533)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 542, gprc:$Rx) - 1104
    {AliasPatternCond::K_Imm, uint32_t(542)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 543, gprc:$Rx) - 1109
    {AliasPatternCond::K_Imm, uint32_t(543)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 534, gprc:$Rx) - 1114
    {AliasPatternCond::K_Imm, uint32_t(534)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 535, gprc:$Rx) - 1119
    {AliasPatternCond::K_Imm, uint32_t(535)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 896, gprc:$RT) - 1124
    {AliasPatternCond::K_Imm, uint32_t(896)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 980, gprc:$Rx) - 1129
    {AliasPatternCond::K_Imm, uint32_t(980)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 981, gprc:$Rx) - 1134
    {AliasPatternCond::K_Imm, uint32_t(981)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 986, gprc:$Rx) - 1139
    {AliasPatternCond::K_Imm, uint32_t(986)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 988, gprc:$Rx) - 1144
    {AliasPatternCond::K_Imm, uint32_t(988)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 989, gprc:$Rx) - 1149
    {AliasPatternCond::K_Imm, uint32_t(989)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 990, gprc:$Rx) - 1154
    {AliasPatternCond::K_Imm, uint32_t(990)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 991, gprc:$Rx) - 1159
    {AliasPatternCond::K_Imm, uint32_t(991)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 1018, gprc:$Rx) - 1164
    {AliasPatternCond::K_Imm, uint32_t(1018)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR 1019, gprc:$Rx) - 1169
    {AliasPatternCond::K_Imm, uint32_t(1019)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 1, g8rc:$Rx) - 1174
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (MTSPR8 3, g8rc:$Rx) - 1176
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 8, g8rc:$Rx) - 1181
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 9, g8rc:$Rx) - 1186
    {AliasPatternCond::K_Imm, uint32_t(9)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 13, g8rc:$Rx) - 1191
    {AliasPatternCond::K_Imm, uint32_t(13)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 17, g8rc:$Rx) - 1196
    {AliasPatternCond::K_Imm, uint32_t(17)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 18, g8rc:$Rx) - 1201
    {AliasPatternCond::K_Imm, uint32_t(18)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 19, g8rc:$Rx) - 1206
    {AliasPatternCond::K_Imm, uint32_t(19)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 22, g8rc:$Rx) - 1211
    {AliasPatternCond::K_Imm, uint32_t(22)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 25, g8rc:$Rx) - 1216
    {AliasPatternCond::K_Imm, uint32_t(25)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 26, g8rc:$Rx) - 1221
    {AliasPatternCond::K_Imm, uint32_t(26)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 27, g8rc:$Rx) - 1226
    {AliasPatternCond::K_Imm, uint32_t(27)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 28, g8rc:$Rx) - 1231
    {AliasPatternCond::K_Imm, uint32_t(28)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 29, g8rc:$Rx) - 1236
    {AliasPatternCond::K_Imm, uint32_t(29)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 280, g8rc:$RT) - 1241
    {AliasPatternCond::K_Imm, uint32_t(280)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 284, g8rc:$Rx) - 1246
    {AliasPatternCond::K_Imm, uint32_t(284)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 285, g8rc:$Rx) - 1251
    {AliasPatternCond::K_Imm, uint32_t(285)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTSPR8 512, g8rc:$Rx) - 1256
    {AliasPatternCond::K_Imm, uint32_t(512)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTUDSCR gprc:$Rx) - 1261
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (MTVRSAVE gprc:$rS) - 1265
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (MTVSRD f8rc:$dst, g8rc:$rA) - 1266
    {AliasPatternCond::K_RegClass, PPC::F8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (MTVSRWA f8rc:$dst, gprc:$rA) - 1268
    {AliasPatternCond::K_RegClass, PPC::F8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (MTVSRWZ f8rc:$dst, gprc:$rA) - 1270
    {AliasPatternCond::K_RegClass, PPC::F8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (NOR gprc:$rA, gprc:$rS, gprc:$rS) - 1272
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (NOR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1275
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (NOR8_rec g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1278
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (NOR_rec gprc:$rA, gprc:$rS, gprc:$rS) - 1281
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (OR gprc:$rA, gprc:$rB, gprc:$rB) - 1284
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (OR8 g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1287
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (OR8_rec g8rc:$rA, g8rc:$rB, g8rc:$rB) - 1290
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (ORI R0, R0, 0) - 1293
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (ORI8 X0, X0, 0) - 1296
    {AliasPatternCond::K_Reg, PPC::X0},
    {AliasPatternCond::K_Reg, PPC::X0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (OR_rec gprc:$rA, gprc:$rB, gprc:$rB) - 1299
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (PADDI8 g8rc:$RT, g8rc_nox0:$RA, s34imm:$SI) - 1302
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RC_NOX0RegClassID},
    // (RFEBB 1) - 1304
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (RLDCL g8rc:$rA, g8rc:$rS, gprc:$rB, 0) - 1305
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLDCL_rec g8rc:$rA, g8rc:$rS, gprc:$rB, 0) - 1309
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLDICL g8rc:$rA, g8rc:$rS, u6imm:$n, 0) - 1313
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLDICL g8rc:$rA, g8rc:$rS, 0, u6imm:$n) - 1317
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLDICL_32_64 g8rc:$rA, gprc:$rS, u6imm:$n, 0) - 1320
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLDICL_32_64 g8rc:$rA, gprc:$rS, 0, u6imm:$n) - 1324
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLDICL_rec g8rc:$rA, g8rc:$rS, u6imm:$n, 0) - 1327
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLDICL_rec g8rc:$rA, g8rc:$rS, 0, u6imm:$n) - 1331
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (RLWINM gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) - 1334
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWINM gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) - 1339
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWINM8 g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31) - 1344
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWINM8 g8rc:$rA, g8rc:$rS, 0, u5imm:$n, 31) - 1349
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWINM8_rec g8rc:$rA, g8rc:$rS, u5imm:$n, 0, 31) - 1354
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWINM8_rec g8rc:$rA, g8rc:$rS, 0, u5imm:$n, 31) - 1359
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWINM_rec gprc:$rA, gprc:$rS, u5imm:$n, 0, 31) - 1364
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWINM_rec gprc:$rA, gprc:$rS, 0, u5imm:$n, 31) - 1369
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWNM gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) - 1374
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWNM8 g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31) - 1379
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWNM8_rec g8rc:$rA, g8rc:$rS, g8rc:$rB, 0, 31) - 1384
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (RLWNM_rec gprc:$rA, gprc:$rS, gprc:$rB, 0, 31) - 1389
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(31)},
    // (SC 0) - 1394
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (SUBF gprc:$rA, gprc:$rC, gprc:$rB) - 1395
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (SUBF8 g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1398
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (SUBF8_rec g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1401
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (SUBFC gprc:$rA, gprc:$rC, gprc:$rB) - 1404
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1407
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (SUBFC8_rec g8rc:$rA, g8rc:$rC, g8rc:$rB) - 1410
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (SUBFC_rec gprc:$rA, gprc:$rC, gprc:$rB) - 1413
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (SUBF_rec gprc:$rA, gprc:$rC, gprc:$rB) - 1416
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (SYNC 0) - 1419
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (SYNC 1) - 1420
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (SYNC 2) - 1421
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (SYNCP10 0, 0) - 1422
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (SYNCP10 2, 0) - 1424
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (SYNCP10 4, 0) - 1426
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (SYNCP10 5, 0) - 1428
    {AliasPatternCond::K_Imm, uint32_t(5)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (SYNCP10 u3imm:$L, 0) - 1430
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (SYNCP10 1, 1) - 1432
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (SYNCP10 0, 2) - 1434
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (SYNCP10 0, 3) - 1436
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    // (TD 16, g8rc:$rA, g8rc:$rB) - 1438
    {AliasPatternCond::K_Imm, uint32_t(16)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TD 4, g8rc:$rA, g8rc:$rB) - 1441
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TD 8, g8rc:$rA, g8rc:$rB) - 1444
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TD 24, g8rc:$rA, g8rc:$rB) - 1447
    {AliasPatternCond::K_Imm, uint32_t(24)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TD 2, g8rc:$rA, g8rc:$rB) - 1450
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TD 1, g8rc:$rA, g8rc:$rB) - 1453
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TD 31, g8rc:$rA, g8rc:$rB) - 1456
    {AliasPatternCond::K_Imm, uint32_t(31)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TDI 16, g8rc:$rA, s16imm:$imm) - 1459
    {AliasPatternCond::K_Imm, uint32_t(16)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TDI 4, g8rc:$rA, s16imm:$imm) - 1461
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TDI 8, g8rc:$rA, s16imm:$imm) - 1463
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TDI 24, g8rc:$rA, s16imm:$imm) - 1465
    {AliasPatternCond::K_Imm, uint32_t(24)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TDI 2, g8rc:$rA, s16imm:$imm) - 1467
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TDI 1, g8rc:$rA, s16imm:$imm) - 1469
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TDI 31, g8rc:$rA, s16imm:$imm) - 1471
    {AliasPatternCond::K_Imm, uint32_t(31)},
    {AliasPatternCond::K_RegClass, PPC::G8RCRegClassID},
    // (TEND 0) - 1473
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (TEND 1) - 1474
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (TLBIE R0, gprc:$RB) - 1475
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TLBIEP9 R0, gprc:$RB, 0, 0, 0) - 1477
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (TLBIEP9 gprc:$RB, gprc:$RS, 0, 0, 0) - 1482
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (TLBILX 0, R0, R0) - 1487
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_Reg, PPC::R0},
    // (TLBILX 1, R0, R0) - 1490
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_Reg, PPC::R0},
    // (TLBILX 3, gprc:$RA, gprc:$RB) - 1493
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TLBILX 3, R0, gprc:$RB) - 1496
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TLBRE2 gprc:$RS, gprc:$A, 0) - 1499
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (TLBRE2 gprc:$RS, gprc:$A, 1) - 1502
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (TLBWE2 gprc:$RS, gprc:$A, 0) - 1505
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (TLBWE2 gprc:$RS, gprc:$A, 1) - 1508
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (TSR 0) - 1511
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (TSR 1) - 1512
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (TW 31, R0, R0) - 1513
    {AliasPatternCond::K_Imm, uint32_t(31)},
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_Reg, PPC::R0},
    // (TW 16, gprc:$rA, gprc:$rB) - 1516
    {AliasPatternCond::K_Imm, uint32_t(16)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TW 4, gprc:$rA, gprc:$rB) - 1519
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TW 8, gprc:$rA, gprc:$rB) - 1522
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TW 24, gprc:$rA, gprc:$rB) - 1525
    {AliasPatternCond::K_Imm, uint32_t(24)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TW 2, gprc:$rA, gprc:$rB) - 1528
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TW 1, gprc:$rA, gprc:$rB) - 1531
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TW 31, gprc:$rA, gprc:$rB) - 1534
    {AliasPatternCond::K_Imm, uint32_t(31)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TWI 16, gprc:$rA, s16imm:$imm) - 1537
    {AliasPatternCond::K_Imm, uint32_t(16)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TWI 4, gprc:$rA, s16imm:$imm) - 1539
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TWI 8, gprc:$rA, s16imm:$imm) - 1541
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TWI 24, gprc:$rA, s16imm:$imm) - 1543
    {AliasPatternCond::K_Imm, uint32_t(24)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TWI 2, gprc:$rA, s16imm:$imm) - 1545
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TWI 1, gprc:$rA, s16imm:$imm) - 1547
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (TWI 31, gprc:$rA, s16imm:$imm) - 1549
    {AliasPatternCond::K_Imm, uint32_t(31)},
    {AliasPatternCond::K_RegClass, PPC::GPRCRegClassID},
    // (VNOR vrrc:$vD, vrrc:$vA, vrrc:$vA) - 1551
    {AliasPatternCond::K_RegClass, PPC::VRRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VRRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (VOR vrrc:$vD, vrrc:$vA, vrrc:$vA) - 1554
    {AliasPatternCond::K_RegClass, PPC::VRRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VRRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (WAIT 0) - 1557
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (WAIT 1) - 1558
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (WAIT 2) - 1559
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (WAITP10 0, 0) - 1560
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (WAITP10 1, 0) - 1562
    {AliasPatternCond::K_Imm, uint32_t(1)},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XORI R0, R0, 0) - 1564
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_Reg, PPC::R0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XORI8 X0, X0, 0) - 1567
    {AliasPatternCond::K_Reg, PPC::X0},
    {AliasPatternCond::K_Reg, PPC::X0},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XVCPSGNDP vsrc:$XT, vsrc:$XB, vsrc:$XB) - 1570
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (XVCPSGNSP vsrc:$XT, vsrc:$XB, vsrc:$XB) - 1573
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    // (XXAESDECP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 0) - 1576
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XXAESDECP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 1) - 1580
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (XXAESDECP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 2) - 1584
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (XXAESENCP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 0) - 1588
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XXAESENCP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 1) - 1592
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (XXAESENCP vsrprc:$XTp, vsrprc:$XAp, vsrprc:$XBp, 2) - 1596
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (XXAESGENLKP vsrprc:$XTp, vsrprc:$XBp, 0) - 1600
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XXAESGENLKP vsrprc:$XTp, vsrprc:$XBp, 1) - 1603
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (XXAESGENLKP vsrprc:$XTp, vsrprc:$XBp, 2) - 1606
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRpRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (XXGFMUL128 vsrc:$XT, vsrc:$XA, vsrc:$XB, 0) - 1609
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XXGFMUL128 vsrc:$XT, vsrc:$XA, vsrc:$XB, 1) - 1613
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(1)},
    // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 0) - 1617
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 3) - 1624
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 0) - 1631
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (XXPERMDI vsrc:$XT, vsrc:$XA, vsrc:$XB, 3) - 1635
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    // (XXPERMDI vsrc:$XT, vsrc:$XB, vsrc:$XB, 2) - 1639
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_TiedReg, 1},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 0) - 1643
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSFRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 3) - 1649
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSFRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_OrNegFeature, PPC::AIXOS},
    {AliasPatternCond::K_OrFeature, PPC::FeatureModernAIXAs},
    {AliasPatternCond::K_EndOrFeatures, 0},
    // (XXPERMDIs vsrc:$XT, vsfrc:$XB, 2) - 1655
    {AliasPatternCond::K_RegClass, PPC::VSRCRegClassID},
    {AliasPatternCond::K_RegClass, PPC::VSFRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    // (gBC 12, crbitrc:$bi, condbrtarget:$dst) - 1658
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 4, crbitrc:$bi, condbrtarget:$dst) - 1660
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 14, crbitrc:$bi, condbrtarget:$dst) - 1662
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 6, crbitrc:$bi, condbrtarget:$dst) - 1664
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 15, crbitrc:$bi, condbrtarget:$dst) - 1666
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 7, crbitrc:$bi, condbrtarget:$dst) - 1668
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 8, crbitrc:$bi, condbrtarget:$dst) - 1670
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 0, crbitrc:$bi, condbrtarget:$dst) - 1672
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 10, crbitrc:$bi, condbrtarget:$dst) - 1674
    {AliasPatternCond::K_Imm, uint32_t(10)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBC 2, crbitrc:$bi, condbrtarget:$dst) - 1676
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 12, crbitrc:$bi, abscondbrtarget:$dst) - 1678
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 4, crbitrc:$bi, abscondbrtarget:$dst) - 1680
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 14, crbitrc:$bi, abscondbrtarget:$dst) - 1682
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 6, crbitrc:$bi, abscondbrtarget:$dst) - 1684
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 15, crbitrc:$bi, abscondbrtarget:$dst) - 1686
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 7, crbitrc:$bi, abscondbrtarget:$dst) - 1688
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 8, crbitrc:$bi, abscondbrtarget:$dst) - 1690
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 0, crbitrc:$bi, abscondbrtarget:$dst) - 1692
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 10, crbitrc:$bi, abscondbrtarget:$dst) - 1694
    {AliasPatternCond::K_Imm, uint32_t(10)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCA 2, crbitrc:$bi, abscondbrtarget:$dst) - 1696
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCAat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1698
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCAat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1701
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCCTR u5imm:$bo, crbitrc:$bi, 0) - 1704
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTR 12, crbitrc:$bi, 0) - 1707
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTR 4, crbitrc:$bi, 0) - 1710
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTR 14, crbitrc:$bi, 0) - 1713
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTR 6, crbitrc:$bi, 0) - 1716
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTR 15, crbitrc:$bi, 0) - 1719
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTR 7, crbitrc:$bi, 0) - 1722
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTRL u5imm:$bo, crbitrc:$bi, 0) - 1725
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTRL 12, crbitrc:$bi, 0) - 1728
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTRL 4, crbitrc:$bi, 0) - 1731
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTRL 14, crbitrc:$bi, 0) - 1734
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTRL 6, crbitrc:$bi, 0) - 1737
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTRL 15, crbitrc:$bi, 0) - 1740
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCCTRL 7, crbitrc:$bi, 0) - 1743
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCL 12, crbitrc:$bi, condbrtarget:$dst) - 1746
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 4, crbitrc:$bi, condbrtarget:$dst) - 1748
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 14, crbitrc:$bi, condbrtarget:$dst) - 1750
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 6, crbitrc:$bi, condbrtarget:$dst) - 1752
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 15, crbitrc:$bi, condbrtarget:$dst) - 1754
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 7, crbitrc:$bi, condbrtarget:$dst) - 1756
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 8, crbitrc:$bi, condbrtarget:$dst) - 1758
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 0, crbitrc:$bi, condbrtarget:$dst) - 1760
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 10, crbitrc:$bi, condbrtarget:$dst) - 1762
    {AliasPatternCond::K_Imm, uint32_t(10)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCL 2, crbitrc:$bi, condbrtarget:$dst) - 1764
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 12, crbitrc:$bi, abscondbrtarget:$dst) - 1766
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 4, crbitrc:$bi, abscondbrtarget:$dst) - 1768
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 14, crbitrc:$bi, abscondbrtarget:$dst) - 1770
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 6, crbitrc:$bi, abscondbrtarget:$dst) - 1772
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 15, crbitrc:$bi, abscondbrtarget:$dst) - 1774
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 7, crbitrc:$bi, abscondbrtarget:$dst) - 1776
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 8, crbitrc:$bi, abscondbrtarget:$dst) - 1778
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 0, crbitrc:$bi, abscondbrtarget:$dst) - 1780
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 10, crbitrc:$bi, abscondbrtarget:$dst) - 1782
    {AliasPatternCond::K_Imm, uint32_t(10)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLA 2, crbitrc:$bi, abscondbrtarget:$dst) - 1784
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLAat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1786
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLAat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1789
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLR u5imm:$bo, crbitrc:$bi, 0) - 1792
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 12, crbitrc:$bi, 0) - 1795
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 4, crbitrc:$bi, 0) - 1798
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 14, crbitrc:$bi, 0) - 1801
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 6, crbitrc:$bi, 0) - 1804
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 15, crbitrc:$bi, 0) - 1807
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 7, crbitrc:$bi, 0) - 1810
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 8, crbitrc:$bi, 0) - 1813
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 0, crbitrc:$bi, 0) - 1816
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 10, crbitrc:$bi, 0) - 1819
    {AliasPatternCond::K_Imm, uint32_t(10)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLR 2, crbitrc:$bi, 0) - 1822
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL u5imm:$bo, crbitrc:$bi, 0) - 1825
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 12, crbitrc:$bi, 0) - 1828
    {AliasPatternCond::K_Imm, uint32_t(12)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 4, crbitrc:$bi, 0) - 1831
    {AliasPatternCond::K_Imm, uint32_t(4)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 14, crbitrc:$bi, 0) - 1834
    {AliasPatternCond::K_Imm, uint32_t(14)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 6, crbitrc:$bi, 0) - 1837
    {AliasPatternCond::K_Imm, uint32_t(6)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 15, crbitrc:$bi, 0) - 1840
    {AliasPatternCond::K_Imm, uint32_t(15)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 7, crbitrc:$bi, 0) - 1843
    {AliasPatternCond::K_Imm, uint32_t(7)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 8, crbitrc:$bi, 0) - 1846
    {AliasPatternCond::K_Imm, uint32_t(8)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 0, crbitrc:$bi, 0) - 1849
    {AliasPatternCond::K_Imm, uint32_t(0)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 10, crbitrc:$bi, 0) - 1852
    {AliasPatternCond::K_Imm, uint32_t(10)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLRL 2, crbitrc:$bi, 0) - 1855
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    {AliasPatternCond::K_Imm, uint32_t(0)},
    // (gBCLat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1858
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCLat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1861
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCat u5imm:$bo, 3, crbitrc:$bi, condbrtarget:$dst) - 1864
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(3)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
    // (gBCat u5imm:$bo, 2, crbitrc:$bi, condbrtarget:$dst) - 1867
    {AliasPatternCond::K_Ignore, 0},
    {AliasPatternCond::K_Imm, uint32_t(2)},
    {AliasPatternCond::K_RegClass, PPC::CRBITRCRegClassID},
  };

  static const char AsmStrings[] =
    /* 0 */ "li $\x01, $\xFF\x03\x01\0"
    /* 12 */ "lis $\x01, $\xFF\x03\x01\0"
    /* 25 */ "lnia $\x01\0"
    /* 33 */ "blt $\x02, $\xFF\x03\x02\0"
    /* 46 */ "blt $\xFF\x03\x02\0"
    /* 55 */ "blt- $\x02, $\xFF\x03\x02\0"
    /* 69 */ "blt- $\xFF\x03\x02\0"
    /* 79 */ "blt+ $\x02, $\xFF\x03\x02\0"
    /* 93 */ "blt+ $\xFF\x03\x02\0"
    /* 103 */ "bgt $\x02, $\xFF\x03\x02\0"
    /* 116 */ "bgt $\xFF\x03\x02\0"
    /* 125 */ "bgt- $\x02, $\xFF\x03\x02\0"
    /* 139 */ "bgt- $\xFF\x03\x02\0"
    /* 149 */ "bgt+ $\x02, $\xFF\x03\x02\0"
    /* 163 */ "bgt+ $\xFF\x03\x02\0"
    /* 173 */ "beq $\x02, $\xFF\x03\x02\0"
    /* 186 */ "beq $\xFF\x03\x02\0"
    /* 195 */ "beq- $\x02, $\xFF\x03\x02\0"
    /* 209 */ "beq- $\xFF\x03\x02\0"
    /* 219 */ "beq+ $\x02, $\xFF\x03\x02\0"
    /* 233 */ "beq+ $\xFF\x03\x02\0"
    /* 243 */ "bne $\x02, $\xFF\x03\x02\0"
    /* 256 */ "bne $\xFF\x03\x02\0"
    /* 265 */ "bne- $\x02, $\xFF\x03\x02\0"
    /* 279 */ "bne- $\xFF\x03\x02\0"
    /* 289 */ "bne+ $\x02, $\xFF\x03\x02\0"
    /* 303 */ "bne+ $\xFF\x03\x02\0"
    /* 313 */ "blta $\x02, $\xFF\x03\x03\0"
    /* 327 */ "blta $\xFF\x03\x03\0"
    /* 337 */ "blta- $\x02, $\xFF\x03\x03\0"
    /* 352 */ "blta- $\xFF\x03\x03\0"
    /* 363 */ "blta+ $\x02, $\xFF\x03\x03\0"
    /* 378 */ "blta+ $\xFF\x03\x03\0"
    /* 389 */ "bgta $\x02, $\xFF\x03\x03\0"
    /* 403 */ "bgta $\xFF\x03\x03\0"
    /* 413 */ "bgta- $\x02, $\xFF\x03\x03\0"
    /* 428 */ "bgta- $\xFF\x03\x03\0"
    /* 439 */ "bgta+ $\x02, $\xFF\x03\x03\0"
    /* 454 */ "bgta+ $\xFF\x03\x03\0"
    /* 465 */ "beqa $\x02, $\xFF\x03\x03\0"
    /* 479 */ "beqa $\xFF\x03\x03\0"
    /* 489 */ "beqa- $\x02, $\xFF\x03\x03\0"
    /* 504 */ "beqa- $\xFF\x03\x03\0"
    /* 515 */ "beqa+ $\x02, $\xFF\x03\x03\0"
    /* 530 */ "beqa+ $\xFF\x03\x03\0"
    /* 541 */ "bnea $\x02, $\xFF\x03\x03\0"
    /* 555 */ "bnea $\xFF\x03\x03\0"
    /* 565 */ "bnea- $\x02, $\xFF\x03\x03\0"
    /* 580 */ "bnea- $\xFF\x03\x03\0"
    /* 591 */ "bnea+ $\x02, $\xFF\x03\x03\0"
    /* 606 */ "bnea+ $\xFF\x03\x03\0"
    /* 617 */ "bltctr $\x02\0"
    /* 627 */ "bltctr\0"
    /* 634 */ "bltctr- $\x02\0"
    /* 645 */ "bltctr-\0"
    /* 653 */ "bltctr+ $\x02\0"
    /* 664 */ "bltctr+\0"
    /* 672 */ "bgtctr $\x02\0"
    /* 682 */ "bgtctr\0"
    /* 689 */ "bgtctr- $\x02\0"
    /* 700 */ "bgtctr-\0"
    /* 708 */ "bgtctr+ $\x02\0"
    /* 719 */ "bgtctr+\0"
    /* 727 */ "beqctr $\x02\0"
    /* 737 */ "beqctr\0"
    /* 744 */ "beqctr- $\x02\0"
    /* 755 */ "beqctr-\0"
    /* 763 */ "beqctr+ $\x02\0"
    /* 774 */ "beqctr+\0"
    /* 782 */ "bnectr $\x02\0"
    /* 792 */ "bnectr\0"
    /* 799 */ "bnectr- $\x02\0"
    /* 810 */ "bnectr-\0"
    /* 818 */ "bnectr+ $\x02\0"
    /* 829 */ "bnectr+\0"
    /* 837 */ "bltctrl $\x02\0"
    /* 848 */ "bltctrl\0"
    /* 856 */ "bltctrl- $\x02\0"
    /* 868 */ "bltctrl-\0"
    /* 877 */ "bltctrl+ $\x02\0"
    /* 889 */ "bltctrl+\0"
    /* 898 */ "bgtctrl $\x02\0"
    /* 909 */ "bgtctrl\0"
    /* 917 */ "bgtctrl- $\x02\0"
    /* 929 */ "bgtctrl-\0"
    /* 938 */ "bgtctrl+ $\x02\0"
    /* 950 */ "bgtctrl+\0"
    /* 959 */ "beqctrl $\x02\0"
    /* 970 */ "beqctrl\0"
    /* 978 */ "beqctrl- $\x02\0"
    /* 990 */ "beqctrl-\0"
    /* 999 */ "beqctrl+ $\x02\0"
    /* 1011 */ "beqctrl+\0"
    /* 1020 */ "bnectrl $\x02\0"
    /* 1031 */ "bnectrl\0"
    /* 1039 */ "bnectrl- $\x02\0"
    /* 1051 */ "bnectrl-\0"
    /* 1060 */ "bnectrl+ $\x02\0"
    /* 1072 */ "bnectrl+\0"
    /* 1081 */ "bltl $\x02, $\xFF\x03\x02\0"
    /* 1095 */ "bltl $\xFF\x03\x02\0"
    /* 1105 */ "bltl- $\x02, $\xFF\x03\x02\0"
    /* 1120 */ "bltl- $\xFF\x03\x02\0"
    /* 1131 */ "bltl+ $\x02, $\xFF\x03\x02\0"
    /* 1146 */ "bltl+ $\xFF\x03\x02\0"
    /* 1157 */ "bgtl $\x02, $\xFF\x03\x02\0"
    /* 1171 */ "bgtl $\xFF\x03\x02\0"
    /* 1181 */ "bgtl- $\x02, $\xFF\x03\x02\0"
    /* 1196 */ "bgtl- $\xFF\x03\x02\0"
    /* 1207 */ "bgtl+ $\x02, $\xFF\x03\x02\0"
    /* 1222 */ "bgtl+ $\xFF\x03\x02\0"
    /* 1233 */ "beql $\x02, $\xFF\x03\x02\0"
    /* 1247 */ "beql $\xFF\x03\x02\0"
    /* 1257 */ "beql- $\x02, $\xFF\x03\x02\0"
    /* 1272 */ "beql- $\xFF\x03\x02\0"
    /* 1283 */ "beql+ $\x02, $\xFF\x03\x02\0"
    /* 1298 */ "beql+ $\xFF\x03\x02\0"
    /* 1309 */ "bnel $\x02, $\xFF\x03\x02\0"
    /* 1323 */ "bnel $\xFF\x03\x02\0"
    /* 1333 */ "bnel- $\x02, $\xFF\x03\x02\0"
    /* 1348 */ "bnel- $\xFF\x03\x02\0"
    /* 1359 */ "bnel+ $\x02, $\xFF\x03\x02\0"
    /* 1374 */ "bnel+ $\xFF\x03\x02\0"
    /* 1385 */ "bltla $\x02, $\xFF\x03\x03\0"
    /* 1400 */ "bltla $\xFF\x03\x03\0"
    /* 1411 */ "bltla- $\x02, $\xFF\x03\x03\0"
    /* 1427 */ "bltla- $\xFF\x03\x03\0"
    /* 1439 */ "bltla+ $\x02, $\xFF\x03\x03\0"
    /* 1455 */ "bltla+ $\xFF\x03\x03\0"
    /* 1467 */ "bgtla $\x02, $\xFF\x03\x03\0"
    /* 1482 */ "bgtla $\xFF\x03\x03\0"
    /* 1493 */ "bgtla- $\x02, $\xFF\x03\x03\0"
    /* 1509 */ "bgtla- $\xFF\x03\x03\0"
    /* 1521 */ "bgtla+ $\x02, $\xFF\x03\x03\0"
    /* 1537 */ "bgtla+ $\xFF\x03\x03\0"
    /* 1549 */ "beqla $\x02, $\xFF\x03\x03\0"
    /* 1564 */ "beqla $\xFF\x03\x03\0"
    /* 1575 */ "beqla- $\x02, $\xFF\x03\x03\0"
    /* 1591 */ "beqla- $\xFF\x03\x03\0"
    /* 1603 */ "beqla+ $\x02, $\xFF\x03\x03\0"
    /* 1619 */ "beqla+ $\xFF\x03\x03\0"
    /* 1631 */ "bnela $\x02, $\xFF\x03\x03\0"
    /* 1646 */ "bnela $\xFF\x03\x03\0"
    /* 1657 */ "bnela- $\x02, $\xFF\x03\x03\0"
    /* 1673 */ "bnela- $\xFF\x03\x03\0"
    /* 1685 */ "bnela+ $\x02, $\xFF\x03\x03\0"
    /* 1701 */ "bnela+ $\xFF\x03\x03\0"
    /* 1713 */ "bltlr $\x02\0"
    /* 1722 */ "bltlr\0"
    /* 1728 */ "bltlr- $\x02\0"
    /* 1738 */ "bltlr-\0"
    /* 1745 */ "bltlr+ $\x02\0"
    /* 1755 */ "bltlr+\0"
    /* 1762 */ "bgtlr $\x02\0"
    /* 1771 */ "bgtlr\0"
    /* 1777 */ "bgtlr- $\x02\0"
    /* 1787 */ "bgtlr-\0"
    /* 1794 */ "bgtlr+ $\x02\0"
    /* 1804 */ "bgtlr+\0"
    /* 1811 */ "beqlr $\x02\0"
    /* 1820 */ "beqlr\0"
    /* 1826 */ "beqlr- $\x02\0"
    /* 1836 */ "beqlr-\0"
    /* 1843 */ "beqlr+ $\x02\0"
    /* 1853 */ "beqlr+\0"
    /* 1860 */ "bnelr $\x02\0"
    /* 1869 */ "bnelr\0"
    /* 1875 */ "bnelr- $\x02\0"
    /* 1885 */ "bnelr-\0"
    /* 1892 */ "bnelr+ $\x02\0"
    /* 1902 */ "bnelr+\0"
    /* 1909 */ "bltlrl $\x02\0"
    /* 1919 */ "bltlrl\0"
    /* 1926 */ "bltlrl- $\x02\0"
    /* 1937 */ "bltlrl-\0"
    /* 1945 */ "bltlrl+ $\x02\0"
    /* 1956 */ "bltlrl+\0"
    /* 1964 */ "bgtlrl $\x02\0"
    /* 1974 */ "bgtlrl\0"
    /* 1981 */ "bgtlrl- $\x02\0"
    /* 1992 */ "bgtlrl-\0"
    /* 2000 */ "bgtlrl+ $\x02\0"
    /* 2011 */ "bgtlrl+\0"
    /* 2019 */ "beqlrl $\x02\0"
    /* 2029 */ "beqlrl\0"
    /* 2036 */ "beqlrl- $\x02\0"
    /* 2047 */ "beqlrl-\0"
    /* 2055 */ "beqlrl+ $\x02\0"
    /* 2066 */ "beqlrl+\0"
    /* 2074 */ "bnelrl $\x02\0"
    /* 2084 */ "bnelrl\0"
    /* 2091 */ "bnelrl- $\x02\0"
    /* 2102 */ "bnelrl-\0"
    /* 2110 */ "bnelrl+ $\x02\0"
    /* 2121 */ "bnelrl+\0"
    /* 2129 */ "cmpd $\x02, $\x03\0"
    /* 2141 */ "cmpdi $\x02, $\xFF\x03\x01\0"
    /* 2156 */ "cmpld $\x02, $\x03\0"
    /* 2169 */ "cmpldi $\x02, $\xFF\x03\x04\0"
    /* 2185 */ "cmplw $\x02, $\x03\0"
    /* 2198 */ "cmplwi $\x02, $\xFF\x03\x04\0"
    /* 2214 */ "cmpw $\x02, $\x03\0"
    /* 2226 */ "cmpwi $\x02, $\xFF\x03\x01\0"
    /* 2241 */ "cntlzw $\x01, $\x02\0"
    /* 2255 */ "cntlzw. $\x01, $\x02\0"
    /* 2270 */ "paste. $\x01, $\x02\0"
    /* 2284 */ "crset $\x01\0"
    /* 2293 */ "crnot $\x01, $\x02\0"
    /* 2306 */ "crmove $\x01, $\x02\0"
    /* 2320 */ "crclr $\x01\0"
    /* 2329 */ "dmsha256hash $\x01, $\x03\0"
    /* 2349 */ "dmsha512hash $\x01, $\x03\0"
    /* 2369 */ "dmsha3dw $\x01\0"
    /* 2381 */ "dmcryshash $\x01\0"
    /* 2395 */ "dmxxsha3512pad $\x01, $\x03, $\xFF\x05\x05\0"
    /* 2423 */ "dmxxsha3384pad $\x01, $\x03, $\xFF\x05\x05\0"
    /* 2451 */ "dmxxsha3256pad $\x01, $\x03, $\xFF\x05\x05\0"
    /* 2479 */ "dmxxsha3224pad $\x01, $\x03, $\xFF\x05\x05\0"
    /* 2507 */ "dmxxshake256pad $\x01, $\x03, $\xFF\x05\x05\0"
    /* 2536 */ "dmxxshake128pad $\x01, $\x03, $\xFF\x05\x05\0"
    /* 2565 */ "dmxxsha384512pad $\x01, $\x03\0"
    /* 2589 */ "dmxxsha224256pad $\x01, $\x03\0"
    /* 2613 */ "isellt $\x01, $\x02, $\x03\0"
    /* 2631 */ "iselgt $\x01, $\x02, $\x03\0"
    /* 2649 */ "iseleq $\x01, $\x02, $\x03\0"
    /* 2667 */ "mbar\0"
    /* 2672 */ "mfbr0 $\x01\0"
    /* 2681 */ "mfbr1 $\x01\0"
    /* 2690 */ "mfbr2 $\x01\0"
    /* 2699 */ "mfbr3 $\x01\0"
    /* 2708 */ "mfbr4 $\x01\0"
    /* 2717 */ "mfbr5 $\x01\0"
    /* 2726 */ "mfbr6 $\x01\0"
    /* 2735 */ "mfbr7 $\x01\0"
    /* 2744 */ "mfxer $\x01\0"
    /* 2753 */ "mfudscr $\x01\0"
    /* 2764 */ "mfrtcu $\x01\0"
    /* 2774 */ "mfrtcl $\x01\0"
    /* 2784 */ "mflr $\x01\0"
    /* 2792 */ "mfctr $\x01\0"
    /* 2801 */ "mfuamr $\x01\0"
    /* 2811 */ "mfdscr $\x01\0"
    /* 2821 */ "mfdsisr $\x01\0"
    /* 2832 */ "mfdar $\x01\0"
    /* 2841 */ "mfdec $\x01\0"
    /* 2850 */ "mfsdr1 $\x01\0"
    /* 2860 */ "mfsrr0 $\x01\0"
    /* 2870 */ "mfsrr1 $\x01\0"
    /* 2880 */ "mfcfar $\x01\0"
    /* 2890 */ "mfamr $\x01\0"
    /* 2899 */ "mfasr $\x01\0"
    /* 2908 */ "mfpvr $\x01\0"
    /* 2917 */ "mfspefscr $\x01\0"
    /* 2930 */ "mfdbatu $\x01, 0\0"
    /* 2944 */ "mfdbatl $\x01, 0\0"
    /* 2958 */ "mfibatu $\x01, 0\0"
    /* 2972 */ "mfibatl $\x01, 0\0"
    /* 2986 */ "mfdbatu $\x01, 1\0"
    /* 3000 */ "mfdbatl $\x01, 1\0"
    /* 3014 */ "mfibatu $\x01, 1\0"
    /* 3028 */ "mfibatl $\x01, 1\0"
    /* 3042 */ "mfdbatu $\x01, 2\0"
    /* 3056 */ "mfdbatl $\x01, 2\0"
    /* 3070 */ "mfibatu $\x01, 2\0"
    /* 3084 */ "mfibatl $\x01, 2\0"
    /* 3098 */ "mfdbatu $\x01, 3\0"
    /* 3112 */ "mfdbatl $\x01, 3\0"
    /* 3126 */ "mfibatu $\x01, 3\0"
    /* 3140 */ "mfibatl $\x01, 3\0"
    /* 3154 */ "mfppr $\x01\0"
    /* 3163 */ "mfesr $\x01\0"
    /* 3172 */ "mfdear $\x01\0"
    /* 3182 */ "mftcr $\x01\0"
    /* 3191 */ "mftbhi $\x01\0"
    /* 3201 */ "mftblo $\x01\0"
    /* 3211 */ "mfsrr2 $\x01\0"
    /* 3221 */ "mfsrr3 $\x01\0"
    /* 3231 */ "mfdccr $\x01\0"
    /* 3241 */ "mficcr $\x01\0"
    /* 3251 */ "mftbu $\x01\0"
    /* 3260 */ "mfvrsave $\x01\0"
    /* 3272 */ "mffprd $\x01, $\x02\0"
    /* 3286 */ "mffprwz $\x01, $\x02\0"
    /* 3301 */ "mtcr $\x02\0"
    /* 3309 */ "mtbr0 $\x01\0"
    /* 3318 */ "mtbr1 $\x01\0"
    /* 3327 */ "mtbr2 $\x01\0"
    /* 3336 */ "mtbr3 $\x01\0"
    /* 3345 */ "mtbr4 $\x01\0"
    /* 3354 */ "mtbr5 $\x01\0"
    /* 3363 */ "mtbr6 $\x01\0"
    /* 3372 */ "mtbr7 $\x01\0"
    /* 3381 */ "mtfsf $\x01, $\x02\0"
    /* 3394 */ "mtfsfi $\xFF\x01\x06, $\xFF\x02\x07\0"
    /* 3412 */ "mtfsfi. $\xFF\x01\x06, $\xFF\x02\x07\0"
    /* 3431 */ "mtfsf. $\x01, $\x02\0"
    /* 3445 */ "mtmsr $\x01\0"
    /* 3454 */ "mtmsrd $\x01\0"
    /* 3464 */ "mtxer $\x02\0"
    /* 3473 */ "mtudscr $\x02\0"
    /* 3484 */ "mtlr $\x02\0"
    /* 3492 */ "mtctr $\x02\0"
    /* 3501 */ "mtuamr $\x02\0"
    /* 3511 */ "mtdscr $\x02\0"
    /* 3521 */ "mtdsisr $\x02\0"
    /* 3532 */ "mtdar $\x02\0"
    /* 3541 */ "mtdec $\x02\0"
    /* 3550 */ "mtsdr1 $\x02\0"
    /* 3560 */ "mtsrr0 $\x02\0"
    /* 3570 */ "mtsrr1 $\x02\0"
    /* 3580 */ "mtcfar $\x02\0"
    /* 3590 */ "mtamr $\x02\0"
    /* 3599 */ "mtasr $\x02\0"
    /* 3608 */ "mttbl $\x02\0"
    /* 3617 */ "mttbu $\x02\0"
    /* 3626 */ "mtspefscr $\x02\0"
    /* 3639 */ "mtdbatu 0, $\x02\0"
    /* 3653 */ "mtdbatl 0, $\x02\0"
    /* 3667 */ "mtibatu 0, $\x02\0"
    /* 3681 */ "mtibatl 0, $\x02\0"
    /* 3695 */ "mtdbatu 1, $\x02\0"
    /* 3709 */ "mtdbatl 1, $\x02\0"
    /* 3723 */ "mtibatu 1, $\x02\0"
    /* 3737 */ "mtibatl 1, $\x02\0"
    /* 3751 */ "mtdbatu 2, $\x02\0"
    /* 3765 */ "mtdbatl 2, $\x02\0"
    /* 3779 */ "mtibatu 2, $\x02\0"
    /* 3793 */ "mtibatl 2, $\x02\0"
    /* 3807 */ "mtdbatu 3, $\x02\0"
    /* 3821 */ "mtdbatl 3, $\x02\0"
    /* 3835 */ "mtibatu 3, $\x02\0"
    /* 3849 */ "mtibatl 3, $\x02\0"
    /* 3863 */ "mtppr $\x02\0"
    /* 3872 */ "mtesr $\x02\0"
    /* 3881 */ "mtdear $\x02\0"
    /* 3891 */ "mttcr $\x02\0"
    /* 3900 */ "mttbhi $\x02\0"
    /* 3910 */ "mttblo $\x02\0"
    /* 3920 */ "mtsrr2 $\x02\0"
    /* 3930 */ "mtsrr3 $\x02\0"
    /* 3940 */ "mtdccr $\x02\0"
    /* 3950 */ "mticcr $\x02\0"
    /* 3960 */ "mtudscr $\x01\0"
    /* 3971 */ "mtvrsave $\x01\0"
    /* 3983 */ "mtfprd $\x01, $\x02\0"
    /* 3997 */ "mtfprwa $\x01, $\x02\0"
    /* 4012 */ "mtfprwz $\x01, $\x02\0"
    /* 4027 */ "not $\x01, $\x02\0"
    /* 4038 */ "not. $\x01, $\x02\0"
    /* 4050 */ "mr $\x01, $\x02\0"
    /* 4060 */ "mr. $\x01, $\x02\0"
    /* 4071 */ "nop\0"
    /* 4075 */ "paddi $\x01, $\x02, $\xFF\x03\x08\0"
    /* 4094 */ "rfebb\0"
    /* 4100 */ "rotld $\x01, $\x02, $\x03\0"
    /* 4117 */ "rotld. $\x01, $\x02, $\x03\0"
    /* 4135 */ "rotldi $\x01, $\x02, $\xFF\x03\x09\0"
    /* 4155 */ "clrldi $\x01, $\x02, $\xFF\x04\x09\0"
    /* 4175 */ "rotldi. $\x01, $\x02, $\xFF\x03\x09\0"
    /* 4196 */ "clrldi. $\x01, $\x02, $\xFF\x04\x09\0"
    /* 4217 */ "rotlwi $\x01, $\x02, $\xFF\x03\x0A\0"
    /* 4237 */ "clrlwi $\x01, $\x02, $\xFF\x04\x0A\0"
    /* 4257 */ "rotlwi. $\x01, $\x02, $\xFF\x03\x0A\0"
    /* 4278 */ "clrlwi. $\x01, $\x02, $\xFF\x04\x0A\0"
    /* 4299 */ "rotlw $\x01, $\x02, $\x03\0"
    /* 4316 */ "rotlw. $\x01, $\x02, $\x03\0"
    /* 4334 */ "sc\0"
    /* 4337 */ "sub $\x01, $\x03, $\x02\0"
    /* 4352 */ "sub. $\x01, $\x03, $\x02\0"
    /* 4368 */ "subc $\x01, $\x03, $\x02\0"
    /* 4384 */ "subc. $\x01, $\x03, $\x02\0"
    /* 4401 */ "sync\0"
    /* 4406 */ "lwsync\0"
    /* 4413 */ "ptesync\0"
    /* 4421 */ "phwsync\0"
    /* 4429 */ "plwsync\0"
    /* 4437 */ "sync $\xFF\x01\x06\0"
    /* 4447 */ "stncisync\0"
    /* 4457 */ "stcisync\0"
    /* 4466 */ "stsync\0"
    /* 4473 */ "tdlt $\x02, $\x03\0"
    /* 4485 */ "tdeq $\x02, $\x03\0"
    /* 4497 */ "tdgt $\x02, $\x03\0"
    /* 4509 */ "tdne $\x02, $\x03\0"
    /* 4521 */ "tdllt $\x02, $\x03\0"
    /* 4534 */ "tdlgt $\x02, $\x03\0"
    /* 4547 */ "tdu $\x02, $\x03\0"
    /* 4558 */ "tdlti $\x02, $\xFF\x03\x01\0"
    /* 4573 */ "tdeqi $\x02, $\xFF\x03\x01\0"
    /* 4588 */ "tdgti $\x02, $\xFF\x03\x01\0"
    /* 4603 */ "tdnei $\x02, $\xFF\x03\x01\0"
    /* 4618 */ "tdllti $\x02, $\xFF\x03\x01\0"
    /* 4634 */ "tdlgti $\x02, $\xFF\x03\x01\0"
    /* 4650 */ "tdui $\x02, $\xFF\x03\x01\0"
    /* 4664 */ "tend.\0"
    /* 4670 */ "tendall.\0"
    /* 4679 */ "tlbie $\x02\0"
    /* 4688 */ "tlbie $\x01, $\x02\0"
    /* 4701 */ "tlbilxlpid\0"
    /* 4712 */ "tlbilxpid\0"
    /* 4722 */ "tlbilxva $\x02, $\x03\0"
    /* 4738 */ "tlbilxva $\x03\0"
    /* 4750 */ "tlbrehi $\x01, $\x02\0"
    /* 4765 */ "tlbrelo $\x01, $\x02\0"
    /* 4780 */ "tlbwehi $\x01, $\x02\0"
    /* 4795 */ "tlbwelo $\x01, $\x02\0"
    /* 4810 */ "tsuspend.\0"
    /* 4820 */ "tresume.\0"
    /* 4829 */ "trap\0"
    /* 4834 */ "twlt $\x02, $\x03\0"
    /* 4846 */ "tweq $\x02, $\x03\0"
    /* 4858 */ "twgt $\x02, $\x03\0"
    /* 4870 */ "twne $\x02, $\x03\0"
    /* 4882 */ "twllt $\x02, $\x03\0"
    /* 4895 */ "twlgt $\x02, $\x03\0"
    /* 4908 */ "twu $\x02, $\x03\0"
    /* 4919 */ "twlti $\x02, $\xFF\x03\x01\0"
    /* 4934 */ "tweqi $\x02, $\xFF\x03\x01\0"
    /* 4949 */ "twgti $\x02, $\xFF\x03\x01\0"
    /* 4964 */ "twnei $\x02, $\xFF\x03\x01\0"
    /* 4979 */ "twllti $\x02, $\xFF\x03\x01\0"
    /* 4995 */ "twlgti $\x02, $\xFF\x03\x01\0"
    /* 5011 */ "twui $\x02, $\xFF\x03\x01\0"
    /* 5025 */ "vnot $\x01, $\x02\0"
    /* 5037 */ "vmr $\x01, $\x02\0"
    /* 5048 */ "wait\0"
    /* 5053 */ "waitrsv\0"
    /* 5061 */ "waitimpl\0"
    /* 5070 */ "xnop\0"
    /* 5075 */ "xvmovdp $\x01, $\x02\0"
    /* 5090 */ "xvmovsp $\x01, $\x02\0"
    /* 5105 */ "xxaes128decp $\x01, $\x02, $\x03\0"
    /* 5129 */ "xxaes192decp $\x01, $\x02, $\x03\0"
    /* 5153 */ "xxaes256decp $\x01, $\x02, $\x03\0"
    /* 5177 */ "xxaes128encp $\x01, $\x02, $\x03\0"
    /* 5201 */ "xxaes192encp $\x01, $\x02, $\x03\0"
    /* 5225 */ "xxaes256encp $\x01, $\x02, $\x03\0"
    /* 5249 */ "xxaes128genlkp $\x01, $\x02\0"
    /* 5271 */ "xxaes192genlkp $\x01, $\x02\0"
    /* 5293 */ "xxaes256genlkp $\x01, $\x02\0"
    /* 5315 */ "xxgfmul128gcm $\x01, $\x02, $\x03\0"
    /* 5340 */ "xxgfmul128xts $\x01, $\x02, $\x03\0"
    /* 5365 */ "xxspltd $\x01, $\x02, 0\0"
    /* 5383 */ "xxspltd $\x01, $\x02, 1\0"
    /* 5401 */ "xxmrghd $\x01, $\x02, $\x03\0"
    /* 5420 */ "xxmrgld $\x01, $\x02, $\x03\0"
    /* 5439 */ "xxswapd $\x01, $\x02\0"
    /* 5454 */ "bt $\x02, $\xFF\x03\x02\0"
    /* 5466 */ "bf $\x02, $\xFF\x03\x02\0"
    /* 5478 */ "bt- $\x02, $\xFF\x03\x02\0"
    /* 5491 */ "bf- $\x02, $\xFF\x03\x02\0"
    /* 5504 */ "bt+ $\x02, $\xFF\x03\x02\0"
    /* 5517 */ "bf+ $\x02, $\xFF\x03\x02\0"
    /* 5530 */ "bdnzt $\x02, $\xFF\x03\x02\0"
    /* 5545 */ "bdnzf $\x02, $\xFF\x03\x02\0"
    /* 5560 */ "bdzt $\x02, $\xFF\x03\x02\0"
    /* 5574 */ "bdzf $\x02, $\xFF\x03\x02\0"
    /* 5588 */ "bta $\x02, $\xFF\x03\x03\0"
    /* 5601 */ "bfa $\x02, $\xFF\x03\x03\0"
    /* 5614 */ "bta- $\x02, $\xFF\x03\x03\0"
    /* 5628 */ "bfa- $\x02, $\xFF\x03\x03\0"
    /* 5642 */ "bta+ $\x02, $\xFF\x03\x03\0"
    /* 5656 */ "bfa+ $\x02, $\xFF\x03\x03\0"
    /* 5670 */ "bdnzta $\x02, $\xFF\x03\x03\0"
    /* 5686 */ "bdnzfa $\x02, $\xFF\x03\x03\0"
    /* 5702 */ "bdzta $\x02, $\xFF\x03\x03\0"
    /* 5717 */ "bdzfa $\x02, $\xFF\x03\x03\0"
    /* 5732 */ "bca+ $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
    /* 5752 */ "bca- $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
    /* 5772 */ "bcctr $\xFF\x01\x0A, $\x02\0"
    /* 5787 */ "btctr $\x02\0"
    /* 5796 */ "bfctr $\x02\0"
    /* 5805 */ "btctr- $\x02\0"
    /* 5815 */ "bfctr- $\x02\0"
    /* 5825 */ "btctr+ $\x02\0"
    /* 5835 */ "bfctr+ $\x02\0"
    /* 5845 */ "bcctrl $\xFF\x01\x0A, $\x02\0"
    /* 5861 */ "btctrl $\x02\0"
    /* 5871 */ "bfctrl $\x02\0"
    /* 5881 */ "btctrl- $\x02\0"
    /* 5892 */ "bfctrl- $\x02\0"
    /* 5903 */ "btctrl+ $\x02\0"
    /* 5914 */ "bfctrl+ $\x02\0"
    /* 5925 */ "btl $\x02, $\xFF\x03\x02\0"
    /* 5938 */ "bfl $\x02, $\xFF\x03\x02\0"
    /* 5951 */ "btl- $\x02, $\xFF\x03\x02\0"
    /* 5965 */ "bfl- $\x02, $\xFF\x03\x02\0"
    /* 5979 */ "btl+ $\x02, $\xFF\x03\x02\0"
    /* 5993 */ "bfl+ $\x02, $\xFF\x03\x02\0"
    /* 6007 */ "bdnztl $\x02, $\xFF\x03\x02\0"
    /* 6023 */ "bdnzfl $\x02, $\xFF\x03\x02\0"
    /* 6039 */ "bdztl $\x02, $\xFF\x03\x02\0"
    /* 6054 */ "bdzfl $\x02, $\xFF\x03\x02\0"
    /* 6069 */ "btla $\x02, $\xFF\x03\x03\0"
    /* 6083 */ "bfla $\x02, $\xFF\x03\x03\0"
    /* 6097 */ "btla- $\x02, $\xFF\x03\x03\0"
    /* 6112 */ "bfla- $\x02, $\xFF\x03\x03\0"
    /* 6127 */ "btla+ $\x02, $\xFF\x03\x03\0"
    /* 6142 */ "bfla+ $\x02, $\xFF\x03\x03\0"
    /* 6157 */ "bdnztla $\x02, $\xFF\x03\x03\0"
    /* 6174 */ "bdnzfla $\x02, $\xFF\x03\x03\0"
    /* 6191 */ "bdztla $\x02, $\xFF\x03\x03\0"
    /* 6207 */ "bdzfla $\x02, $\xFF\x03\x03\0"
    /* 6223 */ "bcla+ $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
    /* 6244 */ "bcla- $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
    /* 6265 */ "bclr $\xFF\x01\x0A, $\x02\0"
    /* 6279 */ "btlr $\x02\0"
    /* 6287 */ "bflr $\x02\0"
    /* 6295 */ "btlr- $\x02\0"
    /* 6304 */ "bflr- $\x02\0"
    /* 6313 */ "btlr+ $\x02\0"
    /* 6322 */ "bflr+ $\x02\0"
    /* 6331 */ "bdnztlr $\x02\0"
    /* 6342 */ "bdnzflr $\x02\0"
    /* 6353 */ "bdztlr $\x02\0"
    /* 6363 */ "bdzflr $\x02\0"
    /* 6373 */ "bclrl $\xFF\x01\x0A, $\x02\0"
    /* 6388 */ "btlrl $\x02\0"
    /* 6397 */ "bflrl $\x02\0"
    /* 6406 */ "btlrl- $\x02\0"
    /* 6416 */ "bflrl- $\x02\0"
    /* 6426 */ "btlrl+ $\x02\0"
    /* 6436 */ "bflrl+ $\x02\0"
    /* 6446 */ "bdnztlrl $\x02\0"
    /* 6458 */ "bdnzflrl $\x02\0"
    /* 6470 */ "bdztlrl $\x02\0"
    /* 6481 */ "bdzflrl $\x02\0"
    /* 6492 */ "bcl+ $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
    /* 6512 */ "bcl- $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
    /* 6532 */ "bc+ $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
    /* 6551 */ "bc- $\xFF\x01\x0A, $\x03, $\xFF\x04\x02\0"
  ;

#ifndef NDEBUG
  static struct SortCheck {
    SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) {
      assert(std::is_sorted(
                 OpToPatterns.begin(), OpToPatterns.end(),
                 [](const PatternsForOpcode &L, const PatternsForOpcode &R) {
                   return L.Opcode < R.Opcode;
                 }) &&
             "tablegen failed to sort opcode patterns");
    }
  } sortCheckVar(OpToPatterns);
#endif

  AliasMatchingData M {
    ArrayRef(OpToPatterns),
    ArrayRef(Patterns),
    ArrayRef(Conds),
    StringRef(AsmStrings, std::size(AsmStrings)),
    nullptr,
  };
  const char *AsmString = matchAliasPatterns(MI, &STI, M);
  if (!AsmString) return false;

  unsigned I = 0;
  while (AsmString[I] != ' ' && AsmString[I] != '\t' &&
         AsmString[I] != '$' && AsmString[I] != '\0')
    ++I;
  OS << '\t' << StringRef(AsmString, I);
  if (AsmString[I] != '\0') {
    if (AsmString[I] == ' ' || AsmString[I] == '\t') {
      OS << '\t';
      ++I;
    }
    do {
      if (AsmString[I] == '$') {
        ++I;
        if (AsmString[I] == (char)0xff) {
          ++I;
          int OpIdx = AsmString[I++] - 1;
          int PrintMethodIdx = AsmString[I++] - 1;
          printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, STI, OS);
        } else
          printOperand(MI, unsigned(AsmString[I++]) - 1, STI, OS);
      } else {
        OS << AsmString[I++];
      }
    } while (AsmString[I] != '\0');
  }

  return true;
}

void PPCInstPrinter::printCustomAliasOperand(
         const MCInst *MI, uint64_t Address, unsigned OpIdx,
         unsigned PrintMethodIdx,
         const MCSubtargetInfo &STI,
         raw_ostream &OS) {
  switch (PrintMethodIdx) {
  default:
    llvm_unreachable("Unknown PrintMethod kind");
    break;
  case 0:
    printS16ImmOperand(MI, OpIdx, STI, OS);
    break;
  case 1:
    printBranchOperand(MI, Address, OpIdx, STI, OS);
    break;
  case 2:
    printAbsBranchOperand(MI, OpIdx, STI, OS);
    break;
  case 3:
    printU16ImmOperand(MI, OpIdx, STI, OS);
    break;
  case 4:
    printU1ImmOperand(MI, OpIdx, STI, OS);
    break;
  case 5:
    printU3ImmOperand(MI, OpIdx, STI, OS);
    break;
  case 6:
    printU4ImmOperand(MI, OpIdx, STI, OS);
    break;
  case 7:
    printS34ImmOperand(MI, OpIdx, STI, OS);
    break;
  case 8:
    printU6ImmOperand(MI, OpIdx, STI, OS);
    break;
  case 9:
    printU5ImmOperand(MI, OpIdx, STI, OS);
    break;
  }
}

#endif // PRINT_ALIAS_INSTR
