/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Calling Convention Implementation Fragment                                 *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

#if !defined(GET_CC_REGISTER_LISTS)

static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
                      ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
                               ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
                           ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
                      ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
                         ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
                              MVT LocVT, CCValAssign::LocInfo LocInfo,
                              ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
                         ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
                            ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);


static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
                      ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (State.getMachineFunction().getSubtarget<GCNSubtarget>().getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
    if (!CC_SI_SHADER(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
      return false;
  }

  if (State.getMachineFunction().getSubtarget<GCNSubtarget>().getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS && State.getCallingConv() == CallingConv::C) {
    if (!CC_AMDGPU_Func(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
      return false;
  }

  return true; // CC didn't match.
}


static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
                               ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList1[] = {
        AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104
      };
      if (MCRegister Reg = State.AllocateReg(RegList1)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  if (!ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList2[] = {
        AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254
      };
      if (MCRegister Reg = State.AllocateReg(RegList2)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  return true; // CC didn't match.
}


static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
                           ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (ArgFlags.isByVal()) {
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, Align(4), ArgFlags);
    return false;
  }

  if (LocVT == MVT::i1) {
    LocVT = MVT::i32;
    if (ArgFlags.isSExt())
      LocInfo = CCValAssign::SExt;
    else if (ArgFlags.isZExt())
      LocInfo = CCValAssign::ZExt;
    else
      LocInfo = CCValAssign::AExt;
  }

  if (LocVT == MVT::i8 ||
      LocVT == MVT::i16) {
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
      LocVT = MVT::i32;
      if (ArgFlags.isSExt())
        LocInfo = CCValAssign::SExt;
      else if (ArgFlags.isZExt())
        LocInfo = CCValAssign::ZExt;
      else
        LocInfo = CCValAssign::AExt;
    }
  }

  if (ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList1[] = {
        AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
      };
      if (MCRegister Reg = State.AllocateReg(RegList1)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  if (LocVT == MVT::i32 ||
      LocVT == MVT::f32 ||
      LocVT == MVT::i16 ||
      LocVT == MVT::f16 ||
      LocVT == MVT::v2i16 ||
      LocVT == MVT::v2f16 ||
      LocVT == MVT::i1 ||
      LocVT == MVT::bf16 ||
      LocVT == MVT::v2bf16) {
    static const MCPhysReg RegList2[] = {
      AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
    };
    if (MCRegister Reg = State.AllocateReg(RegList2)) {
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
      return false;
    }
  }

  if (LocVT == MVT::i32 ||
      LocVT == MVT::f32 ||
      LocVT == MVT::v2i16 ||
      LocVT == MVT::v2f16 ||
      LocVT == MVT::i16 ||
      LocVT == MVT::f16 ||
      LocVT == MVT::i1 ||
      LocVT == MVT::bf16 ||
      LocVT == MVT::v2bf16) {
    int64_t Offset3 = State.AllocateStack(4, Align(4));
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
    return false;
  }

  return true; // CC didn't match.
}


static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
                      ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList1[] = {
        AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
      };
      if (MCRegister Reg = State.AllocateReg(RegList1)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  if (!ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList2[] = {
        AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
      };
      if (MCRegister Reg = State.AllocateReg(RegList2)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  if (LocVT == MVT::i32 ||
      LocVT == MVT::f32 ||
      LocVT == MVT::v2i16 ||
      LocVT == MVT::v2f16 ||
      LocVT == MVT::i16 ||
      LocVT == MVT::f16 ||
      LocVT == MVT::i1 ||
      LocVT == MVT::bf16 ||
      LocVT == MVT::v2bf16) {
    int64_t Offset3 = State.AllocateStack(4, Align(4));
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
    return false;
  }

  return true; // CC didn't match.
}


static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
                         ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (LocVT == MVT::i1) {
    LocVT = MVT::i32;
    if (ArgFlags.isSExt())
      LocInfo = CCValAssign::SExt;
    else if (ArgFlags.isZExt())
      LocInfo = CCValAssign::ZExt;
    else
      LocInfo = CCValAssign::AExt;
  }

  if (ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList1[] = {
        AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
      };
      if (MCRegister Reg = State.AllocateReg(RegList1)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  if (!ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList2[] = {
        AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
      };
      if (MCRegister Reg = State.AllocateReg(RegList2)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  return true; // CC didn't match.
}


static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
                              MVT LocVT, CCValAssign::LocInfo LocInfo,
                              ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (LocVT == MVT::i1) {
    LocVT = MVT::i32;
    if (ArgFlags.isSExt())
      LocInfo = CCValAssign::SExt;
    else if (ArgFlags.isZExt())
      LocInfo = CCValAssign::ZExt;
    else
      LocInfo = CCValAssign::AExt;
  }

  if (LocVT == MVT::i1 ||
      LocVT == MVT::i16) {
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
      LocVT = MVT::i32;
      if (ArgFlags.isSExt())
        LocInfo = CCValAssign::SExt;
      else if (ArgFlags.isZExt())
        LocInfo = CCValAssign::ZExt;
      else
        LocInfo = CCValAssign::AExt;
    }
  }

  if (LocVT == MVT::i32 ||
      LocVT == MVT::f32 ||
      LocVT == MVT::i16 ||
      LocVT == MVT::f16 ||
      LocVT == MVT::v2i16 ||
      LocVT == MVT::v2f16 ||
      LocVT == MVT::bf16 ||
      LocVT == MVT::v2bf16) {
    static const MCPhysReg RegList1[] = {
      AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
    };
    if (MCRegister Reg = State.AllocateReg(RegList1)) {
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
      return false;
    }
  }

  return true; // CC didn't match.
}


static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
                         ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (LocVT == MVT::i1) {
    LocVT = MVT::i32;
    if (ArgFlags.isSExt())
      LocInfo = CCValAssign::SExt;
    else if (ArgFlags.isZExt())
      LocInfo = CCValAssign::ZExt;
    else
      LocInfo = CCValAssign::AExt;
  }

  if (LocVT == MVT::i1 ||
      LocVT == MVT::i16) {
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
      LocVT = MVT::i32;
      if (ArgFlags.isSExt())
        LocInfo = CCValAssign::SExt;
      else if (ArgFlags.isZExt())
        LocInfo = CCValAssign::ZExt;
      else
        LocInfo = CCValAssign::AExt;
    }
  }

  if (!ArgFlags.isInReg()) {
    if (LocVT == MVT::f32 ||
        LocVT == MVT::i32 ||
        LocVT == MVT::f16 ||
        LocVT == MVT::i16 ||
        LocVT == MVT::v2i16 ||
        LocVT == MVT::v2f16 ||
        LocVT == MVT::bf16 ||
        LocVT == MVT::v2bf16) {
      static const MCPhysReg RegList1[] = {
        AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
      };
      if (MCRegister Reg = State.AllocateReg(RegList1)) {
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
        return false;
      }
    }
  }

  return true; // CC didn't match.
}


static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
                            ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {

  if (LocVT == MVT::i1 ||
      LocVT == MVT::i16) {
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
      LocVT = MVT::i32;
      if (ArgFlags.isSExt())
        LocInfo = CCValAssign::SExt;
      else if (ArgFlags.isZExt())
        LocInfo = CCValAssign::ZExt;
      else
        LocInfo = CCValAssign::AExt;
    }
  }

  if (LocVT == MVT::i32 ||
      LocVT == MVT::i16 ||
      LocVT == MVT::v2i16) {
    static const MCPhysReg RegList1[] = {
      AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
    };
    if (MCRegister Reg = State.AllocateReg(RegList1)) {
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
      return false;
    }
  }

  if (LocVT == MVT::f32 ||
      LocVT == MVT::f16 ||
      LocVT == MVT::v2f16 ||
      LocVT == MVT::bf16 ||
      LocVT == MVT::v2bf16) {
    static const MCPhysReg RegList2[] = {
      AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
    };
    if (MCRegister Reg = State.AllocateReg(RegList2)) {
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
      return false;
    }
  }

  return true; // CC didn't match.
}

#else

const MCRegister CC_AMDGPU_ArgRegs[] = { 0 };
const MCRegister CC_AMDGPU_CS_CHAIN_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR5, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR6, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR7, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR8, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR9, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR14, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR15, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR16, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR17, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR18, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR19, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR20, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR21, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR22, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR23, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR24, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR25, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
const MCRegister CC_AMDGPU_Func_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
const MCRegister CC_SI_Gfx_ArgRegs[] = { AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
const MCRegister CC_SI_SHADER_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
const MCRegister RetCC_AMDGPU_Func_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
const MCRegister RetCC_SI_Gfx_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
const MCRegister RetCC_SI_Shader_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };

#endif // !defined(GET_CC_REGISTER_LISTS)

