/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Register Information Header Fragment                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

#include "llvm/CodeGen/TargetRegisterInfo.h"

namespace llvm {

class MipsFrameLowering;

struct MipsGenRegisterInfo : public TargetRegisterInfo {
  explicit MipsGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0,
      unsigned PC = 0, unsigned HwMode = 0);
  unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override;
  unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override;
  LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override;
  const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override;
  const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override;
  unsigned getRegUnitWeight(MCRegUnit RegUnit) const override;
  unsigned getNumRegPressureSets() const override;
  const char *getRegPressureSetName(unsigned Idx) const override;
  unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override;
  const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override;
  const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override;
  ArrayRef<const char *> getRegMaskNames() const override;
  ArrayRef<const uint32_t *> getRegMasks() const override;
  bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override;
  bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override;
  bool isFixedRegister(const MachineFunction &, MCRegister) const override;
  bool isArgumentRegister(const MachineFunction &, MCRegister) const override;
  bool isConstantPhysReg(MCRegister PhysReg) const override final;
  /// Devirtualized TargetFrameLowering.
  static const MipsFrameLowering *getFrameLowering(
      const MachineFunction &MF);
};

namespace Mips { // Register classes
  extern const TargetRegisterClass MSA128F16RegClass;
  extern const TargetRegisterClass CCRRegClass;
  extern const TargetRegisterClass COP0RegClass;
  extern const TargetRegisterClass COP2RegClass;
  extern const TargetRegisterClass COP3RegClass;
  extern const TargetRegisterClass DSPRRegClass;
  extern const TargetRegisterClass FGR32RegClass;
  extern const TargetRegisterClass FGR32CCRegClass;
  extern const TargetRegisterClass GPR32RegClass;
  extern const TargetRegisterClass HWRegsRegClass;
  extern const TargetRegisterClass MSACtrlRegClass;
  extern const TargetRegisterClass GPR32NONZERORegClass;
  extern const TargetRegisterClass CPU16RegsPlusSPRegClass;
  extern const TargetRegisterClass CPU16RegsRegClass;
  extern const TargetRegisterClass FCCRegClass;
  extern const TargetRegisterClass GPRMM16RegClass;
  extern const TargetRegisterClass GPRMM16MovePRegClass;
  extern const TargetRegisterClass GPRMM16ZeroRegClass;
  extern const TargetRegisterClass CPU16Regs_and_GPRMM16ZeroRegClass;
  extern const TargetRegisterClass GPR32NONZERO_and_GPRMM16MovePRegClass;
  extern const TargetRegisterClass GPRMM16MovePPairSecondRegClass;
  extern const TargetRegisterClass CPU16Regs_and_GPRMM16MovePRegClass;
  extern const TargetRegisterClass GPRMM16MoveP_and_GPRMM16ZeroRegClass;
  extern const TargetRegisterClass HI32DSPRegClass;
  extern const TargetRegisterClass LO32DSPRegClass;
  extern const TargetRegisterClass CPU16Regs_and_GPRMM16MovePPairSecondRegClass;
  extern const TargetRegisterClass GPRMM16MovePPairFirstRegClass;
  extern const TargetRegisterClass GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClass;
  extern const TargetRegisterClass GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClass;
  extern const TargetRegisterClass CPURARegRegClass;
  extern const TargetRegisterClass CPUSPRegRegClass;
  extern const TargetRegisterClass DSPCCRegClass;
  extern const TargetRegisterClass GP32RegClass;
  extern const TargetRegisterClass GPR32ZERORegClass;
  extern const TargetRegisterClass HI32RegClass;
  extern const TargetRegisterClass LO32RegClass;
  extern const TargetRegisterClass SP32RegClass;
  extern const TargetRegisterClass FGR64CCRegClass;
  extern const TargetRegisterClass FGR64RegClass;
  extern const TargetRegisterClass GPR64RegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPR32NONZERORegClass;
  extern const TargetRegisterClass AFGR64RegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16RegsPlusSPRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16RegsRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16ZeroRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16ZeroRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPR32NONZERO_and_GPRMM16MovePRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePPairSecondRegClass;
  extern const TargetRegisterClass ACC64DSPRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_CPU16Regs_and_GPRMM16MovePPairSecondRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePPairFirstRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MoveP_and_CPU16Regs_and_GPRMM16ZeroRegClass;
  extern const TargetRegisterClass OCTEON_MPLRegClass;
  extern const TargetRegisterClass OCTEON_PRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClass;
  extern const TargetRegisterClass ACC64RegClass;
  extern const TargetRegisterClass GP64RegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_CPURARegRegClass;
  extern const TargetRegisterClass GPR64_with_sub_32_in_GPR32ZERORegClass;
  extern const TargetRegisterClass HI64RegClass;
  extern const TargetRegisterClass LO64RegClass;
  extern const TargetRegisterClass SP64RegClass;
  extern const TargetRegisterClass MSA128BRegClass;
  extern const TargetRegisterClass MSA128DRegClass;
  extern const TargetRegisterClass MSA128HRegClass;
  extern const TargetRegisterClass MSA128WRegClass;
  extern const TargetRegisterClass MSA128WEvensRegClass;
  extern const TargetRegisterClass ACC128RegClass;
} // end namespace Mips

} // end namespace llvm

