/* parsed class NVC097 */

#include "nvtypes.h"
#include "clc097.h"

#include <assert.h>
#include <stdio.h>
#include "util/macros.h"

struct nv_nvc097_SET_OBJECT {
    uint32_t class_id;
    uint32_t engine_id;
};

static inline void
__NVC097_SET_OBJECT(uint32_t *val_out, struct nv_nvc097_SET_OBJECT st)
{
    uint32_t val = 0;
    
    assert(st.class_id < (UINT64_C(1) << 16));
    val |= st.class_id << 0;
    
    assert(st.engine_id < (UINT64_C(1) << 5));
    val |= st.engine_id << 16;
    *val_out = val;
}

#define V_NVC097_SET_OBJECT(val, args...) { \
    struct nv_nvc097_SET_OBJECT __data = args; \
    __NVC097_SET_OBJECT(&val, __data); \
}

#define VA_NVC097_SET_OBJECT V_NVC097_SET_OBJECT

#define P_NVC097_SET_OBJECT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_OBJECT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_OBJECT, nvk_p_ret); \
} while(0)

struct nv_nvc097_NO_OPERATION {
    uint32_t v;
};

static inline void
__NVC097_NO_OPERATION(uint32_t *val_out, struct nv_nvc097_NO_OPERATION st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_NO_OPERATION(val, args...) { \
    struct nv_nvc097_NO_OPERATION __data = { .v = (args) }; \
    __NVC097_NO_OPERATION(&val, __data); \
}

#define VA_NVC097_NO_OPERATION V_NVC097_NO_OPERATION

#define P_NVC097_NO_OPERATION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_NO_OPERATION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_NO_OPERATION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_NOTIFY_A {
    uint32_t address_upper;
};

static inline void
__NVC097_SET_NOTIFY_A(uint32_t *val_out, struct nv_nvc097_SET_NOTIFY_A st)
{
    uint32_t val = 0;
    
    assert(st.address_upper < (UINT64_C(1) << 8));
    val |= st.address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_NOTIFY_A(val, args...) { \
    struct nv_nvc097_SET_NOTIFY_A __data = { .address_upper = (args) }; \
    __NVC097_SET_NOTIFY_A(&val, __data); \
}

#define VA_NVC097_SET_NOTIFY_A V_NVC097_SET_NOTIFY_A

#define P_NVC097_SET_NOTIFY_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_NOTIFY_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_NOTIFY_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_NOTIFY_B {
    uint32_t address_lower;
};

static inline void
__NVC097_SET_NOTIFY_B(uint32_t *val_out, struct nv_nvc097_SET_NOTIFY_B st)
{
    uint32_t val = 0;
    
    val |= st.address_lower;
    *val_out = val;
}

#define V_NVC097_SET_NOTIFY_B(val, args...) { \
    struct nv_nvc097_SET_NOTIFY_B __data = { .address_lower = (args) }; \
    __NVC097_SET_NOTIFY_B(&val, __data); \
}

#define VA_NVC097_SET_NOTIFY_B V_NVC097_SET_NOTIFY_B

#define P_NVC097_SET_NOTIFY_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_NOTIFY_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_NOTIFY_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_NOTIFY {
    uint32_t type;
};

static inline void
__NVC097_NOTIFY(uint32_t *val_out, struct nv_nvc097_NOTIFY st)
{
    uint32_t val = 0;
    
    val |= st.type;
    *val_out = val;
}

#define V_NVC097_NOTIFY(val, args...) { \
    UNUSED uint32_t TYPE_WRITE_ONLY = NVC097_NOTIFY_TYPE_WRITE_ONLY; \
    UNUSED uint32_t TYPE_WRITE_THEN_AWAKEN = NVC097_NOTIFY_TYPE_WRITE_THEN_AWAKEN; \
    struct nv_nvc097_NOTIFY __data = { .type = (args) }; \
    __NVC097_NOTIFY(&val, __data); \
}

#define VA_NVC097_NOTIFY V_NVC097_NOTIFY

#define P_NVC097_NOTIFY(push, args...) do { \
    UNUSED uint32_t TYPE_WRITE_ONLY = NVC097_NOTIFY_TYPE_WRITE_ONLY; \
    UNUSED uint32_t TYPE_WRITE_THEN_AWAKEN = NVC097_NOTIFY_TYPE_WRITE_THEN_AWAKEN; \
    uint32_t nvk_p_ret; \
    V_NVC097_NOTIFY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_NOTIFY, nvk_p_ret); \
} while(0)

struct nv_nvc097_WAIT_FOR_IDLE {
    uint32_t v;
};

static inline void
__NVC097_WAIT_FOR_IDLE(uint32_t *val_out, struct nv_nvc097_WAIT_FOR_IDLE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_WAIT_FOR_IDLE(val, args...) { \
    struct nv_nvc097_WAIT_FOR_IDLE __data = { .v = (args) }; \
    __NVC097_WAIT_FOR_IDLE(&val, __data); \
}

#define VA_NVC097_WAIT_FOR_IDLE V_NVC097_WAIT_FOR_IDLE

#define P_NVC097_WAIT_FOR_IDLE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_WAIT_FOR_IDLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_WAIT_FOR_IDLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_MME_INSTRUCTION_RAM_POINTER {
    uint32_t v;
};

static inline void
__NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER(uint32_t *val_out, struct nv_nvc097_LOAD_MME_INSTRUCTION_RAM_POINTER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER(val, args...) { \
    struct nv_nvc097_LOAD_MME_INSTRUCTION_RAM_POINTER __data = { .v = (args) }; \
    __NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER(&val, __data); \
}

#define VA_NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER V_NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER

#define P_NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_MME_INSTRUCTION_RAM {
    uint32_t v;
};

static inline void
__NVC097_LOAD_MME_INSTRUCTION_RAM(uint32_t *val_out, struct nv_nvc097_LOAD_MME_INSTRUCTION_RAM st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_LOAD_MME_INSTRUCTION_RAM(val, args...) { \
    struct nv_nvc097_LOAD_MME_INSTRUCTION_RAM __data = { .v = (args) }; \
    __NVC097_LOAD_MME_INSTRUCTION_RAM(&val, __data); \
}

#define VA_NVC097_LOAD_MME_INSTRUCTION_RAM V_NVC097_LOAD_MME_INSTRUCTION_RAM

#define P_NVC097_LOAD_MME_INSTRUCTION_RAM(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_MME_INSTRUCTION_RAM(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_MME_INSTRUCTION_RAM, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_MME_START_ADDRESS_RAM_POINTER {
    uint32_t v;
};

static inline void
__NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER(uint32_t *val_out, struct nv_nvc097_LOAD_MME_START_ADDRESS_RAM_POINTER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER(val, args...) { \
    struct nv_nvc097_LOAD_MME_START_ADDRESS_RAM_POINTER __data = { .v = (args) }; \
    __NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER(&val, __data); \
}

#define VA_NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER V_NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER

#define P_NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_MME_START_ADDRESS_RAM {
    uint32_t v;
};

static inline void
__NVC097_LOAD_MME_START_ADDRESS_RAM(uint32_t *val_out, struct nv_nvc097_LOAD_MME_START_ADDRESS_RAM st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_LOAD_MME_START_ADDRESS_RAM(val, args...) { \
    struct nv_nvc097_LOAD_MME_START_ADDRESS_RAM __data = { .v = (args) }; \
    __NVC097_LOAD_MME_START_ADDRESS_RAM(&val, __data); \
}

#define VA_NVC097_LOAD_MME_START_ADDRESS_RAM V_NVC097_LOAD_MME_START_ADDRESS_RAM

#define P_NVC097_LOAD_MME_START_ADDRESS_RAM(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_MME_START_ADDRESS_RAM(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_MME_START_ADDRESS_RAM, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_MME_SHADOW_RAM_CONTROL {
    uint32_t mode;
};

static inline void
__NVC097_SET_MME_SHADOW_RAM_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_MME_SHADOW_RAM_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 2));
    val |= st.mode << 0;
    *val_out = val;
}

#define V_NVC097_SET_MME_SHADOW_RAM_CONTROL(val, args...) { \
    UNUSED uint32_t MODE_METHOD_TRACK = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK; \
    UNUSED uint32_t MODE_METHOD_TRACK_WITH_FILTER = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER; \
    UNUSED uint32_t MODE_METHOD_PASSTHROUGH = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH; \
    UNUSED uint32_t MODE_METHOD_REPLAY = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY; \
    struct nv_nvc097_SET_MME_SHADOW_RAM_CONTROL __data = { .mode = (args) }; \
    __NVC097_SET_MME_SHADOW_RAM_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_MME_SHADOW_RAM_CONTROL V_NVC097_SET_MME_SHADOW_RAM_CONTROL

#define P_NVC097_SET_MME_SHADOW_RAM_CONTROL(push, args...) do { \
    UNUSED uint32_t MODE_METHOD_TRACK = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK; \
    UNUSED uint32_t MODE_METHOD_TRACK_WITH_FILTER = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER; \
    UNUSED uint32_t MODE_METHOD_PASSTHROUGH = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH; \
    UNUSED uint32_t MODE_METHOD_REPLAY = NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_MME_SHADOW_RAM_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_MME_SHADOW_RAM_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER {
    uint32_t v;
};

static inline void
__NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER(uint32_t *val_out, struct nv_nvc097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER(val, args...) { \
    struct nv_nvc097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER __data = { .v = (args) }; \
    __NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER(&val, __data); \
}

#define VA_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER V_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER

#define P_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER, nvk_p_ret); \
} while(0)

struct nv_nvc097_PEER_SEMAPHORE_RELEASE_OFFSET {
    uint32_t v;
};

static inline void
__NVC097_PEER_SEMAPHORE_RELEASE_OFFSET(uint32_t *val_out, struct nv_nvc097_PEER_SEMAPHORE_RELEASE_OFFSET st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET(val, args...) { \
    struct nv_nvc097_PEER_SEMAPHORE_RELEASE_OFFSET __data = { .v = (args) }; \
    __NVC097_PEER_SEMAPHORE_RELEASE_OFFSET(&val, __data); \
}

#define VA_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET V_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET

#define P_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PEER_SEMAPHORE_RELEASE_OFFSET(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PEER_SEMAPHORE_RELEASE_OFFSET, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_GLOBAL_RENDER_ENABLE_A(uint32_t *val_out, struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_GLOBAL_RENDER_ENABLE_A(val, args...) { \
    struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_GLOBAL_RENDER_ENABLE_A(&val, __data); \
}

#define VA_NVC097_SET_GLOBAL_RENDER_ENABLE_A V_NVC097_SET_GLOBAL_RENDER_ENABLE_A

#define P_NVC097_SET_GLOBAL_RENDER_ENABLE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GLOBAL_RENDER_ENABLE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GLOBAL_RENDER_ENABLE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_GLOBAL_RENDER_ENABLE_B(uint32_t *val_out, struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_GLOBAL_RENDER_ENABLE_B(val, args...) { \
    struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_GLOBAL_RENDER_ENABLE_B(&val, __data); \
}

#define VA_NVC097_SET_GLOBAL_RENDER_ENABLE_B V_NVC097_SET_GLOBAL_RENDER_ENABLE_B

#define P_NVC097_SET_GLOBAL_RENDER_ENABLE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GLOBAL_RENDER_ENABLE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GLOBAL_RENDER_ENABLE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_C {
    uint32_t mode;
};

static inline void
__NVC097_SET_GLOBAL_RENDER_ENABLE_C(uint32_t *val_out, struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_C st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 3));
    val |= st.mode << 0;
    *val_out = val;
}

#define V_NVC097_SET_GLOBAL_RENDER_ENABLE_C(val, args...) { \
    UNUSED uint32_t MODE_FALSE = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE; \
    UNUSED uint32_t MODE_TRUE = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE; \
    UNUSED uint32_t MODE_CONDITIONAL = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL; \
    UNUSED uint32_t MODE_RENDER_IF_EQUAL = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL; \
    UNUSED uint32_t MODE_RENDER_IF_NOT_EQUAL = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL; \
    struct nv_nvc097_SET_GLOBAL_RENDER_ENABLE_C __data = { .mode = (args) }; \
    __NVC097_SET_GLOBAL_RENDER_ENABLE_C(&val, __data); \
}

#define VA_NVC097_SET_GLOBAL_RENDER_ENABLE_C V_NVC097_SET_GLOBAL_RENDER_ENABLE_C

#define P_NVC097_SET_GLOBAL_RENDER_ENABLE_C(push, args...) do { \
    UNUSED uint32_t MODE_FALSE = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE; \
    UNUSED uint32_t MODE_TRUE = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE; \
    UNUSED uint32_t MODE_CONDITIONAL = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL; \
    UNUSED uint32_t MODE_RENDER_IF_EQUAL = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL; \
    UNUSED uint32_t MODE_RENDER_IF_NOT_EQUAL = NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GLOBAL_RENDER_ENABLE_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GLOBAL_RENDER_ENABLE_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SEND_GO_IDLE {
    uint32_t v;
};

static inline void
__NVC097_SEND_GO_IDLE(uint32_t *val_out, struct nv_nvc097_SEND_GO_IDLE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SEND_GO_IDLE(val, args...) { \
    struct nv_nvc097_SEND_GO_IDLE __data = { .v = (args) }; \
    __NVC097_SEND_GO_IDLE(&val, __data); \
}

#define VA_NVC097_SEND_GO_IDLE V_NVC097_SEND_GO_IDLE

#define P_NVC097_SEND_GO_IDLE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SEND_GO_IDLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SEND_GO_IDLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_PM_TRIGGER {
    uint32_t v;
};

static inline void
__NVC097_PM_TRIGGER(uint32_t *val_out, struct nv_nvc097_PM_TRIGGER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_PM_TRIGGER(val, args...) { \
    struct nv_nvc097_PM_TRIGGER __data = { .v = (args) }; \
    __NVC097_PM_TRIGGER(&val, __data); \
}

#define VA_NVC097_PM_TRIGGER V_NVC097_PM_TRIGGER

#define P_NVC097_PM_TRIGGER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PM_TRIGGER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PM_TRIGGER, nvk_p_ret); \
} while(0)

struct nv_nvc097_PM_TRIGGER_WFI {
    uint32_t v;
};

static inline void
__NVC097_PM_TRIGGER_WFI(uint32_t *val_out, struct nv_nvc097_PM_TRIGGER_WFI st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_PM_TRIGGER_WFI(val, args...) { \
    struct nv_nvc097_PM_TRIGGER_WFI __data = { .v = (args) }; \
    __NVC097_PM_TRIGGER_WFI(&val, __data); \
}

#define VA_NVC097_PM_TRIGGER_WFI V_NVC097_PM_TRIGGER_WFI

#define P_NVC097_PM_TRIGGER_WFI(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PM_TRIGGER_WFI(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PM_TRIGGER_WFI, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INSTRUMENTATION_METHOD_HEADER {
    uint32_t v;
};

static inline void
__NVC097_SET_INSTRUMENTATION_METHOD_HEADER(uint32_t *val_out, struct nv_nvc097_SET_INSTRUMENTATION_METHOD_HEADER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_INSTRUMENTATION_METHOD_HEADER(val, args...) { \
    struct nv_nvc097_SET_INSTRUMENTATION_METHOD_HEADER __data = { .v = (args) }; \
    __NVC097_SET_INSTRUMENTATION_METHOD_HEADER(&val, __data); \
}

#define VA_NVC097_SET_INSTRUMENTATION_METHOD_HEADER V_NVC097_SET_INSTRUMENTATION_METHOD_HEADER

#define P_NVC097_SET_INSTRUMENTATION_METHOD_HEADER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INSTRUMENTATION_METHOD_HEADER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INSTRUMENTATION_METHOD_HEADER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INSTRUMENTATION_METHOD_DATA {
    uint32_t v;
};

static inline void
__NVC097_SET_INSTRUMENTATION_METHOD_DATA(uint32_t *val_out, struct nv_nvc097_SET_INSTRUMENTATION_METHOD_DATA st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_INSTRUMENTATION_METHOD_DATA(val, args...) { \
    struct nv_nvc097_SET_INSTRUMENTATION_METHOD_DATA __data = { .v = (args) }; \
    __NVC097_SET_INSTRUMENTATION_METHOD_DATA(&val, __data); \
}

#define VA_NVC097_SET_INSTRUMENTATION_METHOD_DATA V_NVC097_SET_INSTRUMENTATION_METHOD_DATA

#define P_NVC097_SET_INSTRUMENTATION_METHOD_DATA(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INSTRUMENTATION_METHOD_DATA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INSTRUMENTATION_METHOD_DATA, nvk_p_ret); \
} while(0)

struct nv_nvc097_LINE_LENGTH_IN {
    uint32_t value;
};

static inline void
__NVC097_LINE_LENGTH_IN(uint32_t *val_out, struct nv_nvc097_LINE_LENGTH_IN st)
{
    uint32_t val = 0;
    
    val |= st.value;
    *val_out = val;
}

#define V_NVC097_LINE_LENGTH_IN(val, args...) { \
    struct nv_nvc097_LINE_LENGTH_IN __data = { .value = (args) }; \
    __NVC097_LINE_LENGTH_IN(&val, __data); \
}

#define VA_NVC097_LINE_LENGTH_IN V_NVC097_LINE_LENGTH_IN

#define P_NVC097_LINE_LENGTH_IN(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LINE_LENGTH_IN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LINE_LENGTH_IN, nvk_p_ret); \
} while(0)

struct nv_nvc097_LINE_COUNT {
    uint32_t value;
};

static inline void
__NVC097_LINE_COUNT(uint32_t *val_out, struct nv_nvc097_LINE_COUNT st)
{
    uint32_t val = 0;
    
    val |= st.value;
    *val_out = val;
}

#define V_NVC097_LINE_COUNT(val, args...) { \
    struct nv_nvc097_LINE_COUNT __data = { .value = (args) }; \
    __NVC097_LINE_COUNT(&val, __data); \
}

#define VA_NVC097_LINE_COUNT V_NVC097_LINE_COUNT

#define P_NVC097_LINE_COUNT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LINE_COUNT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LINE_COUNT, nvk_p_ret); \
} while(0)

struct nv_nvc097_OFFSET_OUT_UPPER {
    uint32_t value;
};

static inline void
__NVC097_OFFSET_OUT_UPPER(uint32_t *val_out, struct nv_nvc097_OFFSET_OUT_UPPER st)
{
    uint32_t val = 0;
    
    assert(st.value < (UINT64_C(1) << 8));
    val |= st.value << 0;
    *val_out = val;
}

#define V_NVC097_OFFSET_OUT_UPPER(val, args...) { \
    struct nv_nvc097_OFFSET_OUT_UPPER __data = { .value = (args) }; \
    __NVC097_OFFSET_OUT_UPPER(&val, __data); \
}

#define VA_NVC097_OFFSET_OUT_UPPER V_NVC097_OFFSET_OUT_UPPER

#define P_NVC097_OFFSET_OUT_UPPER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_OFFSET_OUT_UPPER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_OFFSET_OUT_UPPER, nvk_p_ret); \
} while(0)

struct nv_nvc097_OFFSET_OUT {
    uint32_t value;
};

static inline void
__NVC097_OFFSET_OUT(uint32_t *val_out, struct nv_nvc097_OFFSET_OUT st)
{
    uint32_t val = 0;
    
    val |= st.value;
    *val_out = val;
}

#define V_NVC097_OFFSET_OUT(val, args...) { \
    struct nv_nvc097_OFFSET_OUT __data = { .value = (args) }; \
    __NVC097_OFFSET_OUT(&val, __data); \
}

#define VA_NVC097_OFFSET_OUT V_NVC097_OFFSET_OUT

#define P_NVC097_OFFSET_OUT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_OFFSET_OUT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_OFFSET_OUT, nvk_p_ret); \
} while(0)

struct nv_nvc097_PITCH_OUT {
    uint32_t value;
};

static inline void
__NVC097_PITCH_OUT(uint32_t *val_out, struct nv_nvc097_PITCH_OUT st)
{
    uint32_t val = 0;
    
    val |= st.value;
    *val_out = val;
}

#define V_NVC097_PITCH_OUT(val, args...) { \
    struct nv_nvc097_PITCH_OUT __data = { .value = (args) }; \
    __NVC097_PITCH_OUT(&val, __data); \
}

#define VA_NVC097_PITCH_OUT V_NVC097_PITCH_OUT

#define P_NVC097_PITCH_OUT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PITCH_OUT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PITCH_OUT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DST_BLOCK_SIZE {
    uint32_t width;
    uint32_t height;
    uint32_t depth;
};

static inline void
__NVC097_SET_DST_BLOCK_SIZE(uint32_t *val_out, struct nv_nvc097_SET_DST_BLOCK_SIZE st)
{
    uint32_t val = 0;
    
    assert(st.width < (UINT64_C(1) << 4));
    val |= st.width << 0;
    
    assert(st.height < (UINT64_C(1) << 4));
    val |= st.height << 4;
    
    assert(st.depth < (UINT64_C(1) << 4));
    val |= st.depth << 8;
    *val_out = val;
}

#define V_NVC097_SET_DST_BLOCK_SIZE(val, args...) { \
    UNUSED uint32_t WIDTH_ONE_GOB = NVC097_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB; \
    UNUSED uint32_t HEIGHT_ONE_GOB = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB; \
    UNUSED uint32_t HEIGHT_TWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t HEIGHT_FOUR_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t HEIGHT_EIGHT_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t HEIGHT_SIXTEEN_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t HEIGHT_THIRTYTWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t DEPTH_ONE_GOB = NVC097_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB; \
    UNUSED uint32_t DEPTH_TWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS; \
    UNUSED uint32_t DEPTH_FOUR_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS; \
    UNUSED uint32_t DEPTH_EIGHT_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS; \
    UNUSED uint32_t DEPTH_SIXTEEN_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS; \
    UNUSED uint32_t DEPTH_THIRTYTWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS; \
    struct nv_nvc097_SET_DST_BLOCK_SIZE __data = args; \
    __NVC097_SET_DST_BLOCK_SIZE(&val, __data); \
}

#define VA_NVC097_SET_DST_BLOCK_SIZE V_NVC097_SET_DST_BLOCK_SIZE

#define P_NVC097_SET_DST_BLOCK_SIZE(push, args...) do { \
    UNUSED uint32_t WIDTH_ONE_GOB = NVC097_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB; \
    UNUSED uint32_t HEIGHT_ONE_GOB = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB; \
    UNUSED uint32_t HEIGHT_TWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t HEIGHT_FOUR_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t HEIGHT_EIGHT_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t HEIGHT_SIXTEEN_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t HEIGHT_THIRTYTWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t DEPTH_ONE_GOB = NVC097_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB; \
    UNUSED uint32_t DEPTH_TWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS; \
    UNUSED uint32_t DEPTH_FOUR_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS; \
    UNUSED uint32_t DEPTH_EIGHT_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS; \
    UNUSED uint32_t DEPTH_SIXTEEN_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS; \
    UNUSED uint32_t DEPTH_THIRTYTWO_GOBS = NVC097_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DST_BLOCK_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DST_BLOCK_SIZE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DST_WIDTH {
    uint32_t v;
};

static inline void
__NVC097_SET_DST_WIDTH(uint32_t *val_out, struct nv_nvc097_SET_DST_WIDTH st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DST_WIDTH(val, args...) { \
    struct nv_nvc097_SET_DST_WIDTH __data = { .v = (args) }; \
    __NVC097_SET_DST_WIDTH(&val, __data); \
}

#define VA_NVC097_SET_DST_WIDTH V_NVC097_SET_DST_WIDTH

#define P_NVC097_SET_DST_WIDTH(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DST_WIDTH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DST_WIDTH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DST_HEIGHT {
    uint32_t v;
};

static inline void
__NVC097_SET_DST_HEIGHT(uint32_t *val_out, struct nv_nvc097_SET_DST_HEIGHT st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DST_HEIGHT(val, args...) { \
    struct nv_nvc097_SET_DST_HEIGHT __data = { .v = (args) }; \
    __NVC097_SET_DST_HEIGHT(&val, __data); \
}

#define VA_NVC097_SET_DST_HEIGHT V_NVC097_SET_DST_HEIGHT

#define P_NVC097_SET_DST_HEIGHT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DST_HEIGHT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DST_HEIGHT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DST_DEPTH {
    uint32_t v;
};

static inline void
__NVC097_SET_DST_DEPTH(uint32_t *val_out, struct nv_nvc097_SET_DST_DEPTH st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DST_DEPTH(val, args...) { \
    struct nv_nvc097_SET_DST_DEPTH __data = { .v = (args) }; \
    __NVC097_SET_DST_DEPTH(&val, __data); \
}

#define VA_NVC097_SET_DST_DEPTH V_NVC097_SET_DST_DEPTH

#define P_NVC097_SET_DST_DEPTH(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DST_DEPTH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DST_DEPTH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DST_LAYER {
    uint32_t v;
};

static inline void
__NVC097_SET_DST_LAYER(uint32_t *val_out, struct nv_nvc097_SET_DST_LAYER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DST_LAYER(val, args...) { \
    struct nv_nvc097_SET_DST_LAYER __data = { .v = (args) }; \
    __NVC097_SET_DST_LAYER(&val, __data); \
}

#define VA_NVC097_SET_DST_LAYER V_NVC097_SET_DST_LAYER

#define P_NVC097_SET_DST_LAYER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DST_LAYER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DST_LAYER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DST_ORIGIN_BYTES_X {
    uint32_t v;
};

static inline void
__NVC097_SET_DST_ORIGIN_BYTES_X(uint32_t *val_out, struct nv_nvc097_SET_DST_ORIGIN_BYTES_X st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 21));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_DST_ORIGIN_BYTES_X(val, args...) { \
    struct nv_nvc097_SET_DST_ORIGIN_BYTES_X __data = { .v = (args) }; \
    __NVC097_SET_DST_ORIGIN_BYTES_X(&val, __data); \
}

#define VA_NVC097_SET_DST_ORIGIN_BYTES_X V_NVC097_SET_DST_ORIGIN_BYTES_X

#define P_NVC097_SET_DST_ORIGIN_BYTES_X(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DST_ORIGIN_BYTES_X(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DST_ORIGIN_BYTES_X, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DST_ORIGIN_SAMPLES_Y {
    uint32_t v;
};

static inline void
__NVC097_SET_DST_ORIGIN_SAMPLES_Y(uint32_t *val_out, struct nv_nvc097_SET_DST_ORIGIN_SAMPLES_Y st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 17));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_DST_ORIGIN_SAMPLES_Y(val, args...) { \
    struct nv_nvc097_SET_DST_ORIGIN_SAMPLES_Y __data = { .v = (args) }; \
    __NVC097_SET_DST_ORIGIN_SAMPLES_Y(&val, __data); \
}

#define VA_NVC097_SET_DST_ORIGIN_SAMPLES_Y V_NVC097_SET_DST_ORIGIN_SAMPLES_Y

#define P_NVC097_SET_DST_ORIGIN_SAMPLES_Y(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DST_ORIGIN_SAMPLES_Y(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DST_ORIGIN_SAMPLES_Y, nvk_p_ret); \
} while(0)

struct nv_nvc097_LAUNCH_DMA {
    uint32_t dst_memory_layout;
    uint32_t completion_type;
    uint32_t interrupt_type;
    uint32_t semaphore_struct_size;
    uint32_t reduction_enable;
    uint32_t reduction_op;
    uint32_t reduction_format;
    uint32_t sysmembar_disable;
};

static inline void
__NVC097_LAUNCH_DMA(uint32_t *val_out, struct nv_nvc097_LAUNCH_DMA st)
{
    uint32_t val = 0;
    
    assert(st.dst_memory_layout < (UINT64_C(1) << 1));
    val |= st.dst_memory_layout << 0;
    
    assert(st.completion_type < (UINT64_C(1) << 2));
    val |= st.completion_type << 4;
    
    assert(st.interrupt_type < (UINT64_C(1) << 2));
    val |= st.interrupt_type << 8;
    
    assert(st.semaphore_struct_size < (UINT64_C(1) << 1));
    val |= st.semaphore_struct_size << 12;
    
    assert(st.reduction_enable < (UINT64_C(1) << 1));
    val |= st.reduction_enable << 1;
    
    assert(st.reduction_op < (UINT64_C(1) << 3));
    val |= st.reduction_op << 13;
    
    assert(st.reduction_format < (UINT64_C(1) << 2));
    val |= st.reduction_format << 2;
    
    assert(st.sysmembar_disable < (UINT64_C(1) << 1));
    val |= st.sysmembar_disable << 6;
    *val_out = val;
}

#define V_NVC097_LAUNCH_DMA(val, args...) { \
    UNUSED uint32_t DST_MEMORY_LAYOUT_BLOCKLINEAR = NVC097_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR; \
    UNUSED uint32_t DST_MEMORY_LAYOUT_PITCH = NVC097_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH; \
    UNUSED uint32_t COMPLETION_TYPE_FLUSH_DISABLE = NVC097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE; \
    UNUSED uint32_t COMPLETION_TYPE_FLUSH_ONLY = NVC097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY; \
    UNUSED uint32_t COMPLETION_TYPE_RELEASE_SEMAPHORE = NVC097_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE; \
    UNUSED uint32_t INTERRUPT_TYPE_NONE = NVC097_LAUNCH_DMA_INTERRUPT_TYPE_NONE; \
    UNUSED uint32_t INTERRUPT_TYPE_INTERRUPT = NVC097_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT; \
    UNUSED uint32_t SEMAPHORE_STRUCT_SIZE_FOUR_WORDS = NVC097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS; \
    UNUSED uint32_t SEMAPHORE_STRUCT_SIZE_ONE_WORD = NVC097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD; \
    UNUSED uint32_t REDUCTION_ENABLE_FALSE = NVC097_LAUNCH_DMA_REDUCTION_ENABLE_FALSE; \
    UNUSED uint32_t REDUCTION_ENABLE_TRUE = NVC097_LAUNCH_DMA_REDUCTION_ENABLE_TRUE; \
    UNUSED uint32_t REDUCTION_OP_RED_ADD = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_ADD; \
    UNUSED uint32_t REDUCTION_OP_RED_MIN = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_MIN; \
    UNUSED uint32_t REDUCTION_OP_RED_MAX = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_MAX; \
    UNUSED uint32_t REDUCTION_OP_RED_INC = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_INC; \
    UNUSED uint32_t REDUCTION_OP_RED_DEC = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_DEC; \
    UNUSED uint32_t REDUCTION_OP_RED_AND = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_AND; \
    UNUSED uint32_t REDUCTION_OP_RED_OR = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_OR; \
    UNUSED uint32_t REDUCTION_OP_RED_XOR = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_XOR; \
    UNUSED uint32_t REDUCTION_FORMAT_UNSIGNED_32 = NVC097_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32; \
    UNUSED uint32_t REDUCTION_FORMAT_SIGNED_32 = NVC097_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32; \
    UNUSED uint32_t SYSMEMBAR_DISABLE_FALSE = NVC097_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE; \
    UNUSED uint32_t SYSMEMBAR_DISABLE_TRUE = NVC097_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE; \
    struct nv_nvc097_LAUNCH_DMA __data = args; \
    __NVC097_LAUNCH_DMA(&val, __data); \
}

#define VA_NVC097_LAUNCH_DMA V_NVC097_LAUNCH_DMA

#define P_NVC097_LAUNCH_DMA(push, args...) do { \
    UNUSED uint32_t DST_MEMORY_LAYOUT_BLOCKLINEAR = NVC097_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR; \
    UNUSED uint32_t DST_MEMORY_LAYOUT_PITCH = NVC097_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH; \
    UNUSED uint32_t COMPLETION_TYPE_FLUSH_DISABLE = NVC097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE; \
    UNUSED uint32_t COMPLETION_TYPE_FLUSH_ONLY = NVC097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY; \
    UNUSED uint32_t COMPLETION_TYPE_RELEASE_SEMAPHORE = NVC097_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE; \
    UNUSED uint32_t INTERRUPT_TYPE_NONE = NVC097_LAUNCH_DMA_INTERRUPT_TYPE_NONE; \
    UNUSED uint32_t INTERRUPT_TYPE_INTERRUPT = NVC097_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT; \
    UNUSED uint32_t SEMAPHORE_STRUCT_SIZE_FOUR_WORDS = NVC097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS; \
    UNUSED uint32_t SEMAPHORE_STRUCT_SIZE_ONE_WORD = NVC097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD; \
    UNUSED uint32_t REDUCTION_ENABLE_FALSE = NVC097_LAUNCH_DMA_REDUCTION_ENABLE_FALSE; \
    UNUSED uint32_t REDUCTION_ENABLE_TRUE = NVC097_LAUNCH_DMA_REDUCTION_ENABLE_TRUE; \
    UNUSED uint32_t REDUCTION_OP_RED_ADD = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_ADD; \
    UNUSED uint32_t REDUCTION_OP_RED_MIN = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_MIN; \
    UNUSED uint32_t REDUCTION_OP_RED_MAX = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_MAX; \
    UNUSED uint32_t REDUCTION_OP_RED_INC = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_INC; \
    UNUSED uint32_t REDUCTION_OP_RED_DEC = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_DEC; \
    UNUSED uint32_t REDUCTION_OP_RED_AND = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_AND; \
    UNUSED uint32_t REDUCTION_OP_RED_OR = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_OR; \
    UNUSED uint32_t REDUCTION_OP_RED_XOR = NVC097_LAUNCH_DMA_REDUCTION_OP_RED_XOR; \
    UNUSED uint32_t REDUCTION_FORMAT_UNSIGNED_32 = NVC097_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32; \
    UNUSED uint32_t REDUCTION_FORMAT_SIGNED_32 = NVC097_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32; \
    UNUSED uint32_t SYSMEMBAR_DISABLE_FALSE = NVC097_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE; \
    UNUSED uint32_t SYSMEMBAR_DISABLE_TRUE = NVC097_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_LAUNCH_DMA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LAUNCH_DMA, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_INLINE_DATA {
    uint32_t v;
};

static inline void
__NVC097_LOAD_INLINE_DATA(uint32_t *val_out, struct nv_nvc097_LOAD_INLINE_DATA st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_LOAD_INLINE_DATA(val, args...) { \
    struct nv_nvc097_LOAD_INLINE_DATA __data = { .v = (args) }; \
    __NVC097_LOAD_INLINE_DATA(&val, __data); \
}

#define VA_NVC097_LOAD_INLINE_DATA V_NVC097_LOAD_INLINE_DATA

#define P_NVC097_LOAD_INLINE_DATA(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_INLINE_DATA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_INLINE_DATA, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_I2M_SEMAPHORE_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_I2M_SEMAPHORE_A(uint32_t *val_out, struct nv_nvc097_SET_I2M_SEMAPHORE_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_I2M_SEMAPHORE_A(val, args...) { \
    struct nv_nvc097_SET_I2M_SEMAPHORE_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_I2M_SEMAPHORE_A(&val, __data); \
}

#define VA_NVC097_SET_I2M_SEMAPHORE_A V_NVC097_SET_I2M_SEMAPHORE_A

#define P_NVC097_SET_I2M_SEMAPHORE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_I2M_SEMAPHORE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_I2M_SEMAPHORE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_I2M_SEMAPHORE_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_I2M_SEMAPHORE_B(uint32_t *val_out, struct nv_nvc097_SET_I2M_SEMAPHORE_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_I2M_SEMAPHORE_B(val, args...) { \
    struct nv_nvc097_SET_I2M_SEMAPHORE_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_I2M_SEMAPHORE_B(&val, __data); \
}

#define VA_NVC097_SET_I2M_SEMAPHORE_B V_NVC097_SET_I2M_SEMAPHORE_B

#define P_NVC097_SET_I2M_SEMAPHORE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_I2M_SEMAPHORE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_I2M_SEMAPHORE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_I2M_SEMAPHORE_C {
    uint32_t payload;
};

static inline void
__NVC097_SET_I2M_SEMAPHORE_C(uint32_t *val_out, struct nv_nvc097_SET_I2M_SEMAPHORE_C st)
{
    uint32_t val = 0;
    
    val |= st.payload;
    *val_out = val;
}

#define V_NVC097_SET_I2M_SEMAPHORE_C(val, args...) { \
    struct nv_nvc097_SET_I2M_SEMAPHORE_C __data = { .payload = (args) }; \
    __NVC097_SET_I2M_SEMAPHORE_C(&val, __data); \
}

#define VA_NVC097_SET_I2M_SEMAPHORE_C V_NVC097_SET_I2M_SEMAPHORE_C

#define P_NVC097_SET_I2M_SEMAPHORE_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_I2M_SEMAPHORE_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_I2M_SEMAPHORE_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_I2M_SPARE_NOOP00 {
    uint32_t v;
};

static inline void
__NVC097_SET_I2M_SPARE_NOOP00(uint32_t *val_out, struct nv_nvc097_SET_I2M_SPARE_NOOP00 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_I2M_SPARE_NOOP00(val, args...) { \
    struct nv_nvc097_SET_I2M_SPARE_NOOP00 __data = { .v = (args) }; \
    __NVC097_SET_I2M_SPARE_NOOP00(&val, __data); \
}

#define VA_NVC097_SET_I2M_SPARE_NOOP00 V_NVC097_SET_I2M_SPARE_NOOP00

#define P_NVC097_SET_I2M_SPARE_NOOP00(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_I2M_SPARE_NOOP00(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_I2M_SPARE_NOOP00, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_I2M_SPARE_NOOP01 {
    uint32_t v;
};

static inline void
__NVC097_SET_I2M_SPARE_NOOP01(uint32_t *val_out, struct nv_nvc097_SET_I2M_SPARE_NOOP01 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_I2M_SPARE_NOOP01(val, args...) { \
    struct nv_nvc097_SET_I2M_SPARE_NOOP01 __data = { .v = (args) }; \
    __NVC097_SET_I2M_SPARE_NOOP01(&val, __data); \
}

#define VA_NVC097_SET_I2M_SPARE_NOOP01 V_NVC097_SET_I2M_SPARE_NOOP01

#define P_NVC097_SET_I2M_SPARE_NOOP01(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_I2M_SPARE_NOOP01(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_I2M_SPARE_NOOP01, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_I2M_SPARE_NOOP02 {
    uint32_t v;
};

static inline void
__NVC097_SET_I2M_SPARE_NOOP02(uint32_t *val_out, struct nv_nvc097_SET_I2M_SPARE_NOOP02 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_I2M_SPARE_NOOP02(val, args...) { \
    struct nv_nvc097_SET_I2M_SPARE_NOOP02 __data = { .v = (args) }; \
    __NVC097_SET_I2M_SPARE_NOOP02(&val, __data); \
}

#define VA_NVC097_SET_I2M_SPARE_NOOP02 V_NVC097_SET_I2M_SPARE_NOOP02

#define P_NVC097_SET_I2M_SPARE_NOOP02(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_I2M_SPARE_NOOP02(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_I2M_SPARE_NOOP02, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_I2M_SPARE_NOOP03 {
    uint32_t v;
};

static inline void
__NVC097_SET_I2M_SPARE_NOOP03(uint32_t *val_out, struct nv_nvc097_SET_I2M_SPARE_NOOP03 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_I2M_SPARE_NOOP03(val, args...) { \
    struct nv_nvc097_SET_I2M_SPARE_NOOP03 __data = { .v = (args) }; \
    __NVC097_SET_I2M_SPARE_NOOP03(&val, __data); \
}

#define VA_NVC097_SET_I2M_SPARE_NOOP03 V_NVC097_SET_I2M_SPARE_NOOP03

#define P_NVC097_SET_I2M_SPARE_NOOP03(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_I2M_SPARE_NOOP03(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_I2M_SPARE_NOOP03, nvk_p_ret); \
} while(0)

struct nv_nvc097_RUN_DS_NOW {
    uint32_t v;
};

static inline void
__NVC097_RUN_DS_NOW(uint32_t *val_out, struct nv_nvc097_RUN_DS_NOW st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_RUN_DS_NOW(val, args...) { \
    struct nv_nvc097_RUN_DS_NOW __data = { .v = (args) }; \
    __NVC097_RUN_DS_NOW(&val, __data); \
}

#define VA_NVC097_RUN_DS_NOW V_NVC097_RUN_DS_NOW

#define P_NVC097_RUN_DS_NOW(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RUN_DS_NOW(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RUN_DS_NOW, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS {
    uint32_t accumulated_prim_area_threshold;
};

static inline void
__NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS(uint32_t *val_out, struct nv_nvc097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS st)
{
    uint32_t val = 0;
    
    assert(st.accumulated_prim_area_threshold < (UINT64_C(1) << 5));
    val |= st.accumulated_prim_area_threshold << 0;
    *val_out = val;
}

#define V_NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS(val, args...) { \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__16 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__32 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__64 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__128 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__256 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__512 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__1024 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__2048 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__4096 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__8192 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__16384 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__32768 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__65536 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__131072 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__262144 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__524288 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS; \
    struct nv_nvc097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS __data = { .accumulated_prim_area_threshold = (args) }; \
    __NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS(&val, __data); \
}

#define VA_NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS V_NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS

#define P_NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS(push, args...) do { \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__16 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__32 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__64 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__128 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__256 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__512 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__1024 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__2048 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__4096 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__8192 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__16384 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__32768 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__65536 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__131072 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__262144 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__524288 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304; \
    UNUSED uint32_t ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS = NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALIASED_LINE_WIDTH_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_ALIASED_LINE_WIDTH_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_ALIASED_LINE_WIDTH_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_ALIASED_LINE_WIDTH_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_ALIASED_LINE_WIDTH_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_ALIASED_LINE_WIDTH_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_ALIASED_LINE_WIDTH_ENABLE V_NVC097_SET_ALIASED_LINE_WIDTH_ENABLE

#define P_NVC097_SET_ALIASED_LINE_WIDTH_ENABLE(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALIASED_LINE_WIDTH_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALIASED_LINE_WIDTH_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_API_MANDATED_EARLY_Z {
    uint32_t enable;
};

static inline void
__NVC097_SET_API_MANDATED_EARLY_Z(uint32_t *val_out, struct nv_nvc097_SET_API_MANDATED_EARLY_Z st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_API_MANDATED_EARLY_Z(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE; \
    struct nv_nvc097_SET_API_MANDATED_EARLY_Z __data = { .enable = (args) }; \
    __NVC097_SET_API_MANDATED_EARLY_Z(&val, __data); \
}

#define VA_NVC097_SET_API_MANDATED_EARLY_Z V_NVC097_SET_API_MANDATED_EARLY_Z

#define P_NVC097_SET_API_MANDATED_EARLY_Z(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_API_MANDATED_EARLY_Z(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_API_MANDATED_EARLY_Z, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GS_DM_FIFO {
    uint32_t size_raster_on;
    uint32_t size_raster_off;
    uint32_t spill_enabled;
};

static inline void
__NVC097_SET_GS_DM_FIFO(uint32_t *val_out, struct nv_nvc097_SET_GS_DM_FIFO st)
{
    uint32_t val = 0;
    
    assert(st.size_raster_on < (UINT64_C(1) << 13));
    val |= st.size_raster_on << 0;
    
    assert(st.size_raster_off < (UINT64_C(1) << 13));
    val |= st.size_raster_off << 16;
    
    assert(st.spill_enabled < (UINT64_C(1) << 1));
    val |= st.spill_enabled << 31;
    *val_out = val;
}

#define V_NVC097_SET_GS_DM_FIFO(val, args...) { \
    UNUSED uint32_t SPILL_ENABLED_FALSE = NVC097_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE; \
    UNUSED uint32_t SPILL_ENABLED_TRUE = NVC097_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE; \
    struct nv_nvc097_SET_GS_DM_FIFO __data = args; \
    __NVC097_SET_GS_DM_FIFO(&val, __data); \
}

#define VA_NVC097_SET_GS_DM_FIFO V_NVC097_SET_GS_DM_FIFO

#define P_NVC097_SET_GS_DM_FIFO(push, args...) do { \
    UNUSED uint32_t SPILL_ENABLED_FALSE = NVC097_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE; \
    UNUSED uint32_t SPILL_ENABLED_TRUE = NVC097_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GS_DM_FIFO(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GS_DM_FIFO, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS {
    uint32_t policy;
};

static inline void
__NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS(uint32_t *val_out, struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS st)
{
    uint32_t val = 0;
    
    assert(st.policy < (UINT64_C(1) << 2));
    val |= st.policy << 4;
    *val_out = val;
}

#define V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS(val, args...) { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST; \
    struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS __data = { .policy = (args) }; \
    __NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS(&val, __data); \
}

#define VA_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS

#define P_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS(push, args...) do { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_SHADER_CACHES {
    uint32_t instruction;
    uint32_t data;
    uint32_t constant;
    uint32_t locks;
    uint32_t flush_data;
};

static inline void
__NVC097_INVALIDATE_SHADER_CACHES(uint32_t *val_out, struct nv_nvc097_INVALIDATE_SHADER_CACHES st)
{
    uint32_t val = 0;
    
    assert(st.instruction < (UINT64_C(1) << 1));
    val |= st.instruction << 0;
    
    assert(st.data < (UINT64_C(1) << 1));
    val |= st.data << 4;
    
    assert(st.constant < (UINT64_C(1) << 1));
    val |= st.constant << 12;
    
    assert(st.locks < (UINT64_C(1) << 1));
    val |= st.locks << 1;
    
    assert(st.flush_data < (UINT64_C(1) << 1));
    val |= st.flush_data << 2;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_SHADER_CACHES(val, args...) { \
    UNUSED uint32_t INSTRUCTION_FALSE = NVC097_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE; \
    UNUSED uint32_t INSTRUCTION_TRUE = NVC097_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE; \
    UNUSED uint32_t DATA_FALSE = NVC097_INVALIDATE_SHADER_CACHES_DATA_FALSE; \
    UNUSED uint32_t DATA_TRUE = NVC097_INVALIDATE_SHADER_CACHES_DATA_TRUE; \
    UNUSED uint32_t CONSTANT_FALSE = NVC097_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE; \
    UNUSED uint32_t CONSTANT_TRUE = NVC097_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE; \
    UNUSED uint32_t LOCKS_FALSE = NVC097_INVALIDATE_SHADER_CACHES_LOCKS_FALSE; \
    UNUSED uint32_t LOCKS_TRUE = NVC097_INVALIDATE_SHADER_CACHES_LOCKS_TRUE; \
    UNUSED uint32_t FLUSH_DATA_FALSE = NVC097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE; \
    UNUSED uint32_t FLUSH_DATA_TRUE = NVC097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE; \
    struct nv_nvc097_INVALIDATE_SHADER_CACHES __data = args; \
    __NVC097_INVALIDATE_SHADER_CACHES(&val, __data); \
}

#define VA_NVC097_INVALIDATE_SHADER_CACHES V_NVC097_INVALIDATE_SHADER_CACHES

#define P_NVC097_INVALIDATE_SHADER_CACHES(push, args...) do { \
    UNUSED uint32_t INSTRUCTION_FALSE = NVC097_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE; \
    UNUSED uint32_t INSTRUCTION_TRUE = NVC097_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE; \
    UNUSED uint32_t DATA_FALSE = NVC097_INVALIDATE_SHADER_CACHES_DATA_FALSE; \
    UNUSED uint32_t DATA_TRUE = NVC097_INVALIDATE_SHADER_CACHES_DATA_TRUE; \
    UNUSED uint32_t CONSTANT_FALSE = NVC097_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE; \
    UNUSED uint32_t CONSTANT_TRUE = NVC097_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE; \
    UNUSED uint32_t LOCKS_FALSE = NVC097_INVALIDATE_SHADER_CACHES_LOCKS_FALSE; \
    UNUSED uint32_t LOCKS_TRUE = NVC097_INVALIDATE_SHADER_CACHES_LOCKS_TRUE; \
    UNUSED uint32_t FLUSH_DATA_FALSE = NVC097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE; \
    UNUSED uint32_t FLUSH_DATA_TRUE = NVC097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_SHADER_CACHES(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_SHADER_CACHES, nvk_p_ret); \
} while(0)

struct nv_nvc097_INCREMENT_SYNC_POINT {
    uint32_t index;
    uint32_t clean_l2;
    uint32_t condition;
};

static inline void
__NVC097_INCREMENT_SYNC_POINT(uint32_t *val_out, struct nv_nvc097_INCREMENT_SYNC_POINT st)
{
    uint32_t val = 0;
    
    assert(st.index < (UINT64_C(1) << 12));
    val |= st.index << 0;
    
    assert(st.clean_l2 < (UINT64_C(1) << 1));
    val |= st.clean_l2 << 16;
    
    assert(st.condition < (UINT64_C(1) << 1));
    val |= st.condition << 20;
    *val_out = val;
}

#define V_NVC097_INCREMENT_SYNC_POINT(val, args...) { \
    UNUSED uint32_t CLEAN_L2_FALSE = NVC097_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE; \
    UNUSED uint32_t CLEAN_L2_TRUE = NVC097_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE; \
    UNUSED uint32_t CONDITION_STREAM_OUT_WRITES_DONE = NVC097_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE; \
    UNUSED uint32_t CONDITION_ROP_WRITES_DONE = NVC097_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE; \
    struct nv_nvc097_INCREMENT_SYNC_POINT __data = args; \
    __NVC097_INCREMENT_SYNC_POINT(&val, __data); \
}

#define VA_NVC097_INCREMENT_SYNC_POINT V_NVC097_INCREMENT_SYNC_POINT

#define P_NVC097_INCREMENT_SYNC_POINT(push, args...) do { \
    UNUSED uint32_t CLEAN_L2_FALSE = NVC097_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE; \
    UNUSED uint32_t CLEAN_L2_TRUE = NVC097_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE; \
    UNUSED uint32_t CONDITION_STREAM_OUT_WRITES_DONE = NVC097_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE; \
    UNUSED uint32_t CONDITION_ROP_WRITES_DONE = NVC097_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INCREMENT_SYNC_POINT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INCREMENT_SYNC_POINT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE {
    uint32_t prim_area;
};

static inline void
__NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE(uint32_t *val_out, struct nv_nvc097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE st)
{
    uint32_t val = 0;
    
    assert(st.prim_area < (UINT64_C(1) << 22));
    val |= st.prim_area << 0;
    *val_out = val;
}

#define V_NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE(val, args...) { \
    struct nv_nvc097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE __data = { .prim_area = (args) }; \
    __NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE(&val, __data); \
}

#define VA_NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE V_NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE

#define P_NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE {
    uint32_t v;
};

static inline void
__NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE(uint32_t *val_out, struct nv_nvc097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE(val, args...) { \
    struct nv_nvc097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE __data = { .v = (args) }; \
    __NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE(&val, __data); \
}

#define VA_NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE V_NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE

#define P_NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SURFACE_CLIP_ID_BLOCK_SIZE {
    uint32_t width;
    uint32_t height;
    uint32_t depth;
};

static inline void
__NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE(uint32_t *val_out, struct nv_nvc097_SET_SURFACE_CLIP_ID_BLOCK_SIZE st)
{
    uint32_t val = 0;
    
    assert(st.width < (UINT64_C(1) << 4));
    val |= st.width << 0;
    
    assert(st.height < (UINT64_C(1) << 4));
    val |= st.height << 4;
    
    assert(st.depth < (UINT64_C(1) << 4));
    val |= st.depth << 8;
    *val_out = val;
}

#define V_NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE(val, args...) { \
    UNUSED uint32_t WIDTH_ONE_GOB = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB; \
    UNUSED uint32_t HEIGHT_ONE_GOB = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB; \
    UNUSED uint32_t HEIGHT_TWO_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t HEIGHT_FOUR_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t HEIGHT_EIGHT_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t HEIGHT_SIXTEEN_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t HEIGHT_THIRTYTWO_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t DEPTH_ONE_GOB = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB; \
    struct nv_nvc097_SET_SURFACE_CLIP_ID_BLOCK_SIZE __data = args; \
    __NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE(&val, __data); \
}

#define VA_NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE V_NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE

#define P_NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE(push, args...) do { \
    UNUSED uint32_t WIDTH_ONE_GOB = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB; \
    UNUSED uint32_t HEIGHT_ONE_GOB = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB; \
    UNUSED uint32_t HEIGHT_TWO_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t HEIGHT_FOUR_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t HEIGHT_EIGHT_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t HEIGHT_SIXTEEN_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t HEIGHT_THIRTYTWO_GOBS = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t DEPTH_ONE_GOB = NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_CIRCULAR_BUFFER_SIZE {
    uint32_t cache_lines_per_sm;
};

static inline void
__NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_CIRCULAR_BUFFER_SIZE st)
{
    uint32_t val = 0;
    
    assert(st.cache_lines_per_sm < (UINT64_C(1) << 22));
    val |= st.cache_lines_per_sm << 0;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE(val, args...) { \
    struct nv_nvc097_SET_ALPHA_CIRCULAR_BUFFER_SIZE __data = { .cache_lines_per_sm = (args) }; \
    __NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE V_NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE

#define P_NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE, nvk_p_ret); \
} while(0)

struct nv_nvc097_DECOMPRESS_SURFACE {
    uint32_t mrt_select;
    uint32_t rt_array_index;
};

static inline void
__NVC097_DECOMPRESS_SURFACE(uint32_t *val_out, struct nv_nvc097_DECOMPRESS_SURFACE st)
{
    uint32_t val = 0;
    
    assert(st.mrt_select < (UINT64_C(1) << 3));
    val |= st.mrt_select << 0;
    
    assert(st.rt_array_index < (UINT64_C(1) << 16));
    val |= st.rt_array_index << 4;
    *val_out = val;
}

#define V_NVC097_DECOMPRESS_SURFACE(val, args...) { \
    struct nv_nvc097_DECOMPRESS_SURFACE __data = args; \
    __NVC097_DECOMPRESS_SURFACE(&val, __data); \
}

#define VA_NVC097_DECOMPRESS_SURFACE V_NVC097_DECOMPRESS_SURFACE

#define P_NVC097_DECOMPRESS_SURFACE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DECOMPRESS_SURFACE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DECOMPRESS_SURFACE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_ROP_BYPASS {
    uint32_t enable;
    uint32_t no_stall;
    uint32_t cull_everything;
    uint32_t threshold;
};

static inline void
__NVC097_SET_ZCULL_ROP_BYPASS(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_ROP_BYPASS st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.no_stall < (UINT64_C(1) << 1));
    val |= st.no_stall << 4;
    
    assert(st.cull_everything < (UINT64_C(1) << 1));
    val |= st.cull_everything << 8;
    
    assert(st.threshold < (UINT64_C(1) << 4));
    val |= st.threshold << 12;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_ROP_BYPASS(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE; \
    UNUSED uint32_t NO_STALL_FALSE = NVC097_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE; \
    UNUSED uint32_t NO_STALL_TRUE = NVC097_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE; \
    UNUSED uint32_t CULL_EVERYTHING_FALSE = NVC097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE; \
    UNUSED uint32_t CULL_EVERYTHING_TRUE = NVC097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE; \
    struct nv_nvc097_SET_ZCULL_ROP_BYPASS __data = args; \
    __NVC097_SET_ZCULL_ROP_BYPASS(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_ROP_BYPASS V_NVC097_SET_ZCULL_ROP_BYPASS

#define P_NVC097_SET_ZCULL_ROP_BYPASS(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE; \
    UNUSED uint32_t NO_STALL_FALSE = NVC097_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE; \
    UNUSED uint32_t NO_STALL_TRUE = NVC097_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE; \
    UNUSED uint32_t CULL_EVERYTHING_FALSE = NVC097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE; \
    UNUSED uint32_t CULL_EVERYTHING_TRUE = NVC097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_ROP_BYPASS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_ROP_BYPASS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_SUBREGION {
    uint32_t enable;
    uint32_t normalized_aliquots;
};

static inline void
__NVC097_SET_ZCULL_SUBREGION(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_SUBREGION st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.normalized_aliquots < (UINT64_C(1) << 24));
    val |= st.normalized_aliquots << 4;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_SUBREGION(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SUBREGION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SUBREGION_ENABLE_TRUE; \
    struct nv_nvc097_SET_ZCULL_SUBREGION __data = args; \
    __NVC097_SET_ZCULL_SUBREGION(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_SUBREGION V_NVC097_SET_ZCULL_SUBREGION

#define P_NVC097_SET_ZCULL_SUBREGION(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SUBREGION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SUBREGION_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_SUBREGION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_SUBREGION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RASTER_BOUNDING_BOX {
    uint32_t mode;
    uint32_t pad;
};

static inline void
__NVC097_SET_RASTER_BOUNDING_BOX(uint32_t *val_out, struct nv_nvc097_SET_RASTER_BOUNDING_BOX st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 1));
    val |= st.mode << 0;
    
    assert(st.pad < (UINT64_C(1) << 8));
    val |= st.pad << 4;
    *val_out = val;
}

#define V_NVC097_SET_RASTER_BOUNDING_BOX(val, args...) { \
    UNUSED uint32_t MODE_BOUNDING_BOX = NVC097_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX; \
    UNUSED uint32_t MODE_FULL_VIEWPORT = NVC097_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT; \
    struct nv_nvc097_SET_RASTER_BOUNDING_BOX __data = args; \
    __NVC097_SET_RASTER_BOUNDING_BOX(&val, __data); \
}

#define VA_NVC097_SET_RASTER_BOUNDING_BOX V_NVC097_SET_RASTER_BOUNDING_BOX

#define P_NVC097_SET_RASTER_BOUNDING_BOX(push, args...) do { \
    UNUSED uint32_t MODE_BOUNDING_BOX = NVC097_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX; \
    UNUSED uint32_t MODE_FULL_VIEWPORT = NVC097_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RASTER_BOUNDING_BOX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RASTER_BOUNDING_BOX, nvk_p_ret); \
} while(0)

struct nv_nvc097_PEER_SEMAPHORE_RELEASE {
    uint32_t v;
};

static inline void
__NVC097_PEER_SEMAPHORE_RELEASE(uint32_t *val_out, struct nv_nvc097_PEER_SEMAPHORE_RELEASE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_PEER_SEMAPHORE_RELEASE(val, args...) { \
    struct nv_nvc097_PEER_SEMAPHORE_RELEASE __data = { .v = (args) }; \
    __NVC097_PEER_SEMAPHORE_RELEASE(&val, __data); \
}

#define VA_NVC097_PEER_SEMAPHORE_RELEASE V_NVC097_PEER_SEMAPHORE_RELEASE

#define P_NVC097_PEER_SEMAPHORE_RELEASE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PEER_SEMAPHORE_RELEASE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PEER_SEMAPHORE_RELEASE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ITERATED_BLEND_OPTIMIZATION {
    uint32_t noop;
};

static inline void
__NVC097_SET_ITERATED_BLEND_OPTIMIZATION(uint32_t *val_out, struct nv_nvc097_SET_ITERATED_BLEND_OPTIMIZATION st)
{
    uint32_t val = 0;
    
    assert(st.noop < (UINT64_C(1) << 2));
    val |= st.noop << 0;
    *val_out = val;
}

#define V_NVC097_SET_ITERATED_BLEND_OPTIMIZATION(val, args...) { \
    UNUSED uint32_t NOOP_NEVER = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER; \
    UNUSED uint32_t NOOP_SOURCE_RGBA_0000 = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000; \
    UNUSED uint32_t NOOP_SOURCE_ALPHA_0 = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0; \
    UNUSED uint32_t NOOP_SOURCE_RGBA_0001 = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001; \
    struct nv_nvc097_SET_ITERATED_BLEND_OPTIMIZATION __data = { .noop = (args) }; \
    __NVC097_SET_ITERATED_BLEND_OPTIMIZATION(&val, __data); \
}

#define VA_NVC097_SET_ITERATED_BLEND_OPTIMIZATION V_NVC097_SET_ITERATED_BLEND_OPTIMIZATION

#define P_NVC097_SET_ITERATED_BLEND_OPTIMIZATION(push, args...) do { \
    UNUSED uint32_t NOOP_NEVER = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER; \
    UNUSED uint32_t NOOP_SOURCE_RGBA_0000 = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000; \
    UNUSED uint32_t NOOP_SOURCE_ALPHA_0 = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0; \
    UNUSED uint32_t NOOP_SOURCE_RGBA_0001 = NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ITERATED_BLEND_OPTIMIZATION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ITERATED_BLEND_OPTIMIZATION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_SUBREGION_ALLOCATION {
    uint32_t subregion_id;
    uint32_t aliquots;
    uint32_t format;
};

static inline void
__NVC097_SET_ZCULL_SUBREGION_ALLOCATION(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_SUBREGION_ALLOCATION st)
{
    uint32_t val = 0;
    
    assert(st.subregion_id < (UINT64_C(1) << 8));
    val |= st.subregion_id << 0;
    
    assert(st.aliquots < (UINT64_C(1) << 16));
    val |= st.aliquots << 8;
    
    assert(st.format < (UINT64_C(1) << 4));
    val |= st.format << 24;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_SUBREGION_ALLOCATION(val, args...) { \
    UNUSED uint32_t FORMAT_Z_16X16X2_4X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4; \
    UNUSED uint32_t FORMAT_ZS_16X16_4X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4; \
    UNUSED uint32_t FORMAT_Z_16X16_4X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2; \
    UNUSED uint32_t FORMAT_Z_16X16_2X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4; \
    UNUSED uint32_t FORMAT_Z_16X8_4X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4; \
    UNUSED uint32_t FORMAT_Z_8X8_4X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2; \
    UNUSED uint32_t FORMAT_Z_8X8_2X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4; \
    UNUSED uint32_t FORMAT_Z_16X16_4X8 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8; \
    UNUSED uint32_t FORMAT_Z_4X8_2X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2; \
    UNUSED uint32_t FORMAT_ZS_16X8_4X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2; \
    UNUSED uint32_t FORMAT_ZS_16X8_2X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4; \
    UNUSED uint32_t FORMAT_ZS_8X8_2X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2; \
    UNUSED uint32_t FORMAT_Z_4X8_1X1 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1; \
    UNUSED uint32_t FORMAT_NONE = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE; \
    struct nv_nvc097_SET_ZCULL_SUBREGION_ALLOCATION __data = args; \
    __NVC097_SET_ZCULL_SUBREGION_ALLOCATION(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_SUBREGION_ALLOCATION V_NVC097_SET_ZCULL_SUBREGION_ALLOCATION

#define P_NVC097_SET_ZCULL_SUBREGION_ALLOCATION(push, args...) do { \
    UNUSED uint32_t FORMAT_Z_16X16X2_4X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4; \
    UNUSED uint32_t FORMAT_ZS_16X16_4X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4; \
    UNUSED uint32_t FORMAT_Z_16X16_4X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2; \
    UNUSED uint32_t FORMAT_Z_16X16_2X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4; \
    UNUSED uint32_t FORMAT_Z_16X8_4X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4; \
    UNUSED uint32_t FORMAT_Z_8X8_4X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2; \
    UNUSED uint32_t FORMAT_Z_8X8_2X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4; \
    UNUSED uint32_t FORMAT_Z_16X16_4X8 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8; \
    UNUSED uint32_t FORMAT_Z_4X8_2X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2; \
    UNUSED uint32_t FORMAT_ZS_16X8_4X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2; \
    UNUSED uint32_t FORMAT_ZS_16X8_2X4 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4; \
    UNUSED uint32_t FORMAT_ZS_8X8_2X2 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2; \
    UNUSED uint32_t FORMAT_Z_4X8_1X1 = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1; \
    UNUSED uint32_t FORMAT_NONE = NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_SUBREGION_ALLOCATION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_SUBREGION_ALLOCATION, nvk_p_ret); \
} while(0)

struct nv_nvc097_ASSIGN_ZCULL_SUBREGIONS {
    uint32_t algorithm;
};

static inline void
__NVC097_ASSIGN_ZCULL_SUBREGIONS(uint32_t *val_out, struct nv_nvc097_ASSIGN_ZCULL_SUBREGIONS st)
{
    uint32_t val = 0;
    
    assert(st.algorithm < (UINT64_C(1) << 2));
    val |= st.algorithm << 0;
    *val_out = val;
}

#define V_NVC097_ASSIGN_ZCULL_SUBREGIONS(val, args...) { \
    UNUSED uint32_t ALGORITHM_Static = NVC097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static; \
    UNUSED uint32_t ALGORITHM_Adaptive = NVC097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive; \
    struct nv_nvc097_ASSIGN_ZCULL_SUBREGIONS __data = { .algorithm = (args) }; \
    __NVC097_ASSIGN_ZCULL_SUBREGIONS(&val, __data); \
}

#define VA_NVC097_ASSIGN_ZCULL_SUBREGIONS V_NVC097_ASSIGN_ZCULL_SUBREGIONS

#define P_NVC097_ASSIGN_ZCULL_SUBREGIONS(push, args...) do { \
    UNUSED uint32_t ALGORITHM_Static = NVC097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static; \
    UNUSED uint32_t ALGORITHM_Adaptive = NVC097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive; \
    uint32_t nvk_p_ret; \
    V_NVC097_ASSIGN_ZCULL_SUBREGIONS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_ASSIGN_ZCULL_SUBREGIONS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE {
    uint32_t enable;
    uint32_t qualify_by_anti_alias_enable;
};

static inline void
__NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE(uint32_t *val_out, struct nv_nvc097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.qualify_by_anti_alias_enable < (UINT64_C(1) << 1));
    val |= st.qualify_by_anti_alias_enable << 1;
    *val_out = val;
}

#define V_NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE; \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE; \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE; \
    struct nv_nvc097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE __data = args; \
    __NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE(&val, __data); \
}

#define VA_NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE V_NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE

#define P_NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE; \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE; \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE = NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_ZERO_INDEX {
    uint32_t count;
};

static inline void
__NVC097_DRAW_ZERO_INDEX(uint32_t *val_out, struct nv_nvc097_DRAW_ZERO_INDEX st)
{
    uint32_t val = 0;
    
    val |= st.count;
    *val_out = val;
}

#define V_NVC097_DRAW_ZERO_INDEX(val, args...) { \
    struct nv_nvc097_DRAW_ZERO_INDEX __data = { .count = (args) }; \
    __NVC097_DRAW_ZERO_INDEX(&val, __data); \
}

#define VA_NVC097_DRAW_ZERO_INDEX V_NVC097_DRAW_ZERO_INDEX

#define P_NVC097_DRAW_ZERO_INDEX(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_ZERO_INDEX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_ZERO_INDEX, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_L1_CONFIGURATION {
    uint32_t directly_addressable_memory;
};

static inline void
__NVC097_SET_L1_CONFIGURATION(uint32_t *val_out, struct nv_nvc097_SET_L1_CONFIGURATION st)
{
    uint32_t val = 0;
    
    assert(st.directly_addressable_memory < (UINT64_C(1) << 3));
    val |= st.directly_addressable_memory << 0;
    *val_out = val;
}

#define V_NVC097_SET_L1_CONFIGURATION(val, args...) { \
    UNUSED uint32_t DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB = NVC097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB; \
    UNUSED uint32_t DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB = NVC097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB; \
    struct nv_nvc097_SET_L1_CONFIGURATION __data = { .directly_addressable_memory = (args) }; \
    __NVC097_SET_L1_CONFIGURATION(&val, __data); \
}

#define VA_NVC097_SET_L1_CONFIGURATION V_NVC097_SET_L1_CONFIGURATION

#define P_NVC097_SET_L1_CONFIGURATION(push, args...) do { \
    UNUSED uint32_t DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB = NVC097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB; \
    UNUSED uint32_t DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB = NVC097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_L1_CONFIGURATION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_L1_CONFIGURATION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RENDER_ENABLE_CONTROL {
    uint32_t conditional_load_constant_buffer;
};

static inline void
__NVC097_SET_RENDER_ENABLE_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_RENDER_ENABLE_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.conditional_load_constant_buffer < (UINT64_C(1) << 1));
    val |= st.conditional_load_constant_buffer << 0;
    *val_out = val;
}

#define V_NVC097_SET_RENDER_ENABLE_CONTROL(val, args...) { \
    UNUSED uint32_t CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE = NVC097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE; \
    UNUSED uint32_t CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE = NVC097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE; \
    struct nv_nvc097_SET_RENDER_ENABLE_CONTROL __data = { .conditional_load_constant_buffer = (args) }; \
    __NVC097_SET_RENDER_ENABLE_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_RENDER_ENABLE_CONTROL V_NVC097_SET_RENDER_ENABLE_CONTROL

#define P_NVC097_SET_RENDER_ENABLE_CONTROL(push, args...) do { \
    UNUSED uint32_t CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE = NVC097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE; \
    UNUSED uint32_t CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE = NVC097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RENDER_ENABLE_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RENDER_ENABLE_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPA_VERSION {
    uint32_t minor;
    uint32_t major;
};

static inline void
__NVC097_SET_SPA_VERSION(uint32_t *val_out, struct nv_nvc097_SET_SPA_VERSION st)
{
    uint32_t val = 0;
    
    assert(st.minor < (UINT64_C(1) << 8));
    val |= st.minor << 0;
    
    assert(st.major < (UINT64_C(1) << 8));
    val |= st.major << 8;
    *val_out = val;
}

#define V_NVC097_SET_SPA_VERSION(val, args...) { \
    struct nv_nvc097_SET_SPA_VERSION __data = args; \
    __NVC097_SET_SPA_VERSION(&val, __data); \
}

#define VA_NVC097_SET_SPA_VERSION V_NVC097_SET_SPA_VERSION

#define P_NVC097_SET_SPA_VERSION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPA_VERSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPA_VERSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_IEEE_CLEAN_UPDATE {
    uint32_t enable;
};

static inline void
__NVC097_SET_IEEE_CLEAN_UPDATE(uint32_t *val_out, struct nv_nvc097_SET_IEEE_CLEAN_UPDATE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_IEEE_CLEAN_UPDATE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE; \
    struct nv_nvc097_SET_IEEE_CLEAN_UPDATE __data = { .enable = (args) }; \
    __NVC097_SET_IEEE_CLEAN_UPDATE(&val, __data); \
}

#define VA_NVC097_SET_IEEE_CLEAN_UPDATE V_NVC097_SET_IEEE_CLEAN_UPDATE

#define P_NVC097_SET_IEEE_CLEAN_UPDATE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_IEEE_CLEAN_UPDATE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_IEEE_CLEAN_UPDATE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SNAP_GRID_LINE {
    uint32_t locations_per_pixel;
    uint32_t rounding_mode;
};

static inline void
__NVC097_SET_SNAP_GRID_LINE(uint32_t *val_out, struct nv_nvc097_SET_SNAP_GRID_LINE st)
{
    uint32_t val = 0;
    
    assert(st.locations_per_pixel < (UINT64_C(1) << 4));
    val |= st.locations_per_pixel << 0;
    
    assert(st.rounding_mode < (UINT64_C(1) << 1));
    val |= st.rounding_mode << 8;
    *val_out = val;
}

#define V_NVC097_SET_SNAP_GRID_LINE(val, args...) { \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__2X2 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__4X4 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__8X8 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__16X16 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__32X32 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__64X64 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__128X128 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__256X256 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256; \
    UNUSED uint32_t ROUNDING_MODE_RTNE = NVC097_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE; \
    UNUSED uint32_t ROUNDING_MODE_TESLA = NVC097_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA; \
    struct nv_nvc097_SET_SNAP_GRID_LINE __data = args; \
    __NVC097_SET_SNAP_GRID_LINE(&val, __data); \
}

#define VA_NVC097_SET_SNAP_GRID_LINE V_NVC097_SET_SNAP_GRID_LINE

#define P_NVC097_SET_SNAP_GRID_LINE(push, args...) do { \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__2X2 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__4X4 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__8X8 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__16X16 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__32X32 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__64X64 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__128X128 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__256X256 = NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256; \
    UNUSED uint32_t ROUNDING_MODE_RTNE = NVC097_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE; \
    UNUSED uint32_t ROUNDING_MODE_TESLA = NVC097_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SNAP_GRID_LINE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SNAP_GRID_LINE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SNAP_GRID_NON_LINE {
    uint32_t locations_per_pixel;
    uint32_t rounding_mode;
};

static inline void
__NVC097_SET_SNAP_GRID_NON_LINE(uint32_t *val_out, struct nv_nvc097_SET_SNAP_GRID_NON_LINE st)
{
    uint32_t val = 0;
    
    assert(st.locations_per_pixel < (UINT64_C(1) << 4));
    val |= st.locations_per_pixel << 0;
    
    assert(st.rounding_mode < (UINT64_C(1) << 1));
    val |= st.rounding_mode << 8;
    *val_out = val;
}

#define V_NVC097_SET_SNAP_GRID_NON_LINE(val, args...) { \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__2X2 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__4X4 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__8X8 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__16X16 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__32X32 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__64X64 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__128X128 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__256X256 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256; \
    UNUSED uint32_t ROUNDING_MODE_RTNE = NVC097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE; \
    UNUSED uint32_t ROUNDING_MODE_TESLA = NVC097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA; \
    struct nv_nvc097_SET_SNAP_GRID_NON_LINE __data = args; \
    __NVC097_SET_SNAP_GRID_NON_LINE(&val, __data); \
}

#define VA_NVC097_SET_SNAP_GRID_NON_LINE V_NVC097_SET_SNAP_GRID_NON_LINE

#define P_NVC097_SET_SNAP_GRID_NON_LINE(push, args...) do { \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__2X2 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__4X4 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__8X8 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__16X16 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__32X32 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__64X64 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__128X128 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128; \
    UNUSED uint32_t LOCATIONS_PER_PIXEL__256X256 = NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256; \
    UNUSED uint32_t ROUNDING_MODE_RTNE = NVC097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE; \
    UNUSED uint32_t ROUNDING_MODE_TESLA = NVC097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SNAP_GRID_NON_LINE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SNAP_GRID_NON_LINE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TESSELLATION_PARAMETERS {
    uint32_t domain_type;
    uint32_t spacing;
    uint32_t output_primitives;
};

static inline void
__NVC097_SET_TESSELLATION_PARAMETERS(uint32_t *val_out, struct nv_nvc097_SET_TESSELLATION_PARAMETERS st)
{
    uint32_t val = 0;
    
    assert(st.domain_type < (UINT64_C(1) << 2));
    val |= st.domain_type << 0;
    
    assert(st.spacing < (UINT64_C(1) << 2));
    val |= st.spacing << 4;
    
    assert(st.output_primitives < (UINT64_C(1) << 2));
    val |= st.output_primitives << 8;
    *val_out = val;
}

#define V_NVC097_SET_TESSELLATION_PARAMETERS(val, args...) { \
    UNUSED uint32_t DOMAIN_TYPE_ISOLINE = NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE; \
    UNUSED uint32_t DOMAIN_TYPE_TRIANGLE = NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE; \
    UNUSED uint32_t DOMAIN_TYPE_QUAD = NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD; \
    UNUSED uint32_t SPACING_INTEGER = NVC097_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER; \
    UNUSED uint32_t SPACING_FRACTIONAL_ODD = NVC097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD; \
    UNUSED uint32_t SPACING_FRACTIONAL_EVEN = NVC097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_POINTS = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_LINES = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_TRIANGLES_CW = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_TRIANGLES_CCW = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW; \
    struct nv_nvc097_SET_TESSELLATION_PARAMETERS __data = args; \
    __NVC097_SET_TESSELLATION_PARAMETERS(&val, __data); \
}

#define VA_NVC097_SET_TESSELLATION_PARAMETERS V_NVC097_SET_TESSELLATION_PARAMETERS

#define P_NVC097_SET_TESSELLATION_PARAMETERS(push, args...) do { \
    UNUSED uint32_t DOMAIN_TYPE_ISOLINE = NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE; \
    UNUSED uint32_t DOMAIN_TYPE_TRIANGLE = NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE; \
    UNUSED uint32_t DOMAIN_TYPE_QUAD = NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD; \
    UNUSED uint32_t SPACING_INTEGER = NVC097_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER; \
    UNUSED uint32_t SPACING_FRACTIONAL_ODD = NVC097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD; \
    UNUSED uint32_t SPACING_FRACTIONAL_EVEN = NVC097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_POINTS = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_LINES = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_TRIANGLES_CW = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW; \
    UNUSED uint32_t OUTPUT_PRIMITIVES_TRIANGLES_CCW = NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TESSELLATION_PARAMETERS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TESSELLATION_PARAMETERS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TESSELLATION_LOD_U0_OR_DENSITY {
    uint32_t v;
};

static inline void
__NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY(uint32_t *val_out, struct nv_nvc097_SET_TESSELLATION_LOD_U0_OR_DENSITY st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY(val, args...) { \
    struct nv_nvc097_SET_TESSELLATION_LOD_U0_OR_DENSITY __data = { .v = (args) }; \
    __NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY(&val, __data); \
}

#define VA_NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY V_NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY

#define P_NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TESSELLATION_LOD_V0_OR_DETAIL {
    uint32_t v;
};

static inline void
__NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL(uint32_t *val_out, struct nv_nvc097_SET_TESSELLATION_LOD_V0_OR_DETAIL st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL(val, args...) { \
    struct nv_nvc097_SET_TESSELLATION_LOD_V0_OR_DETAIL __data = { .v = (args) }; \
    __NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL(&val, __data); \
}

#define VA_NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL V_NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL

#define P_NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TESSELLATION_LOD_U1_OR_W0 {
    uint32_t v;
};

static inline void
__NVC097_SET_TESSELLATION_LOD_U1_OR_W0(uint32_t *val_out, struct nv_nvc097_SET_TESSELLATION_LOD_U1_OR_W0 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_TESSELLATION_LOD_U1_OR_W0(val, args...) { \
    struct nv_nvc097_SET_TESSELLATION_LOD_U1_OR_W0 __data = { .v = (args) }; \
    __NVC097_SET_TESSELLATION_LOD_U1_OR_W0(&val, __data); \
}

#define VA_NVC097_SET_TESSELLATION_LOD_U1_OR_W0 V_NVC097_SET_TESSELLATION_LOD_U1_OR_W0

#define P_NVC097_SET_TESSELLATION_LOD_U1_OR_W0(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TESSELLATION_LOD_U1_OR_W0(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TESSELLATION_LOD_U1_OR_W0, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TESSELLATION_LOD_V1 {
    uint32_t v;
};

static inline void
__NVC097_SET_TESSELLATION_LOD_V1(uint32_t *val_out, struct nv_nvc097_SET_TESSELLATION_LOD_V1 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_TESSELLATION_LOD_V1(val, args...) { \
    struct nv_nvc097_SET_TESSELLATION_LOD_V1 __data = { .v = (args) }; \
    __NVC097_SET_TESSELLATION_LOD_V1(&val, __data); \
}

#define VA_NVC097_SET_TESSELLATION_LOD_V1 V_NVC097_SET_TESSELLATION_LOD_V1

#define P_NVC097_SET_TESSELLATION_LOD_V1(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TESSELLATION_LOD_V1(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TESSELLATION_LOD_V1, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TG_LOD_INTERIOR_U {
    uint32_t v;
};

static inline void
__NVC097_SET_TG_LOD_INTERIOR_U(uint32_t *val_out, struct nv_nvc097_SET_TG_LOD_INTERIOR_U st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_TG_LOD_INTERIOR_U(val, args...) { \
    struct nv_nvc097_SET_TG_LOD_INTERIOR_U __data = { .v = (args) }; \
    __NVC097_SET_TG_LOD_INTERIOR_U(&val, __data); \
}

#define VA_NVC097_SET_TG_LOD_INTERIOR_U V_NVC097_SET_TG_LOD_INTERIOR_U

#define P_NVC097_SET_TG_LOD_INTERIOR_U(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TG_LOD_INTERIOR_U(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TG_LOD_INTERIOR_U, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TG_LOD_INTERIOR_V {
    uint32_t v;
};

static inline void
__NVC097_SET_TG_LOD_INTERIOR_V(uint32_t *val_out, struct nv_nvc097_SET_TG_LOD_INTERIOR_V st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_TG_LOD_INTERIOR_V(val, args...) { \
    struct nv_nvc097_SET_TG_LOD_INTERIOR_V __data = { .v = (args) }; \
    __NVC097_SET_TG_LOD_INTERIOR_V(&val, __data); \
}

#define VA_NVC097_SET_TG_LOD_INTERIOR_V V_NVC097_SET_TG_LOD_INTERIOR_V

#define P_NVC097_SET_TG_LOD_INTERIOR_V(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TG_LOD_INTERIOR_V(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TG_LOD_INTERIOR_V, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG07 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG07(uint32_t *val_out, struct nv_nvc097_RESERVED_TG07 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG07(val, args...) { \
    struct nv_nvc097_RESERVED_TG07 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG07(&val, __data); \
}

#define VA_NVC097_RESERVED_TG07 V_NVC097_RESERVED_TG07

#define P_NVC097_RESERVED_TG07(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG07(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG07, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG08 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG08(uint32_t *val_out, struct nv_nvc097_RESERVED_TG08 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG08(val, args...) { \
    struct nv_nvc097_RESERVED_TG08 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG08(&val, __data); \
}

#define VA_NVC097_RESERVED_TG08 V_NVC097_RESERVED_TG08

#define P_NVC097_RESERVED_TG08(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG08(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG08, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG09 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG09(uint32_t *val_out, struct nv_nvc097_RESERVED_TG09 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG09(val, args...) { \
    struct nv_nvc097_RESERVED_TG09 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG09(&val, __data); \
}

#define VA_NVC097_RESERVED_TG09 V_NVC097_RESERVED_TG09

#define P_NVC097_RESERVED_TG09(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG09(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG09, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG10 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG10(uint32_t *val_out, struct nv_nvc097_RESERVED_TG10 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG10(val, args...) { \
    struct nv_nvc097_RESERVED_TG10 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG10(&val, __data); \
}

#define VA_NVC097_RESERVED_TG10 V_NVC097_RESERVED_TG10

#define P_NVC097_RESERVED_TG10(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG10(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG10, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG11 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG11(uint32_t *val_out, struct nv_nvc097_RESERVED_TG11 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG11(val, args...) { \
    struct nv_nvc097_RESERVED_TG11 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG11(&val, __data); \
}

#define VA_NVC097_RESERVED_TG11 V_NVC097_RESERVED_TG11

#define P_NVC097_RESERVED_TG11(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG11(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG11, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG12 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG12(uint32_t *val_out, struct nv_nvc097_RESERVED_TG12 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG12(val, args...) { \
    struct nv_nvc097_RESERVED_TG12 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG12(&val, __data); \
}

#define VA_NVC097_RESERVED_TG12 V_NVC097_RESERVED_TG12

#define P_NVC097_RESERVED_TG12(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG12(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG12, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG13 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG13(uint32_t *val_out, struct nv_nvc097_RESERVED_TG13 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG13(val, args...) { \
    struct nv_nvc097_RESERVED_TG13 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG13(&val, __data); \
}

#define VA_NVC097_RESERVED_TG13 V_NVC097_RESERVED_TG13

#define P_NVC097_RESERVED_TG13(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG13(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG13, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG14 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG14(uint32_t *val_out, struct nv_nvc097_RESERVED_TG14 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG14(val, args...) { \
    struct nv_nvc097_RESERVED_TG14 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG14(&val, __data); \
}

#define VA_NVC097_RESERVED_TG14 V_NVC097_RESERVED_TG14

#define P_NVC097_RESERVED_TG14(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG14(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG14, nvk_p_ret); \
} while(0)

struct nv_nvc097_RESERVED_TG15 {
    uint32_t v;
};

static inline void
__NVC097_RESERVED_TG15(uint32_t *val_out, struct nv_nvc097_RESERVED_TG15 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_RESERVED_TG15(val, args...) { \
    struct nv_nvc097_RESERVED_TG15 __data = { .v = (args) }; \
    __NVC097_RESERVED_TG15(&val, __data); \
}

#define VA_NVC097_RESERVED_TG15 V_NVC097_RESERVED_TG15

#define P_NVC097_RESERVED_TG15(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_RESERVED_TG15(nvk_p_ret, args); \
    nv_push_val(push, NVC097_RESERVED_TG15, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SUBTILING_PERF_KNOB_A {
    uint32_t fraction_of_spm_register_file_per_subtile;
    uint32_t fraction_of_spm_pixel_output_buffer_per_subtile;
    uint32_t fraction_of_spm_triangle_ram_per_subtile;
    uint32_t fraction_of_max_quads_per_subtile;
};

static inline void
__NVC097_SET_SUBTILING_PERF_KNOB_A(uint32_t *val_out, struct nv_nvc097_SET_SUBTILING_PERF_KNOB_A st)
{
    uint32_t val = 0;
    
    assert(st.fraction_of_spm_register_file_per_subtile < (UINT64_C(1) << 8));
    val |= st.fraction_of_spm_register_file_per_subtile << 0;
    
    assert(st.fraction_of_spm_pixel_output_buffer_per_subtile < (UINT64_C(1) << 8));
    val |= st.fraction_of_spm_pixel_output_buffer_per_subtile << 8;
    
    assert(st.fraction_of_spm_triangle_ram_per_subtile < (UINT64_C(1) << 8));
    val |= st.fraction_of_spm_triangle_ram_per_subtile << 16;
    
    assert(st.fraction_of_max_quads_per_subtile < (UINT64_C(1) << 8));
    val |= st.fraction_of_max_quads_per_subtile << 24;
    *val_out = val;
}

#define V_NVC097_SET_SUBTILING_PERF_KNOB_A(val, args...) { \
    struct nv_nvc097_SET_SUBTILING_PERF_KNOB_A __data = args; \
    __NVC097_SET_SUBTILING_PERF_KNOB_A(&val, __data); \
}

#define VA_NVC097_SET_SUBTILING_PERF_KNOB_A V_NVC097_SET_SUBTILING_PERF_KNOB_A

#define P_NVC097_SET_SUBTILING_PERF_KNOB_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SUBTILING_PERF_KNOB_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SUBTILING_PERF_KNOB_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SUBTILING_PERF_KNOB_B {
    uint32_t fraction_of_max_primitives_per_subtile;
};

static inline void
__NVC097_SET_SUBTILING_PERF_KNOB_B(uint32_t *val_out, struct nv_nvc097_SET_SUBTILING_PERF_KNOB_B st)
{
    uint32_t val = 0;
    
    assert(st.fraction_of_max_primitives_per_subtile < (UINT64_C(1) << 8));
    val |= st.fraction_of_max_primitives_per_subtile << 0;
    *val_out = val;
}

#define V_NVC097_SET_SUBTILING_PERF_KNOB_B(val, args...) { \
    struct nv_nvc097_SET_SUBTILING_PERF_KNOB_B __data = { .fraction_of_max_primitives_per_subtile = (args) }; \
    __NVC097_SET_SUBTILING_PERF_KNOB_B(&val, __data); \
}

#define VA_NVC097_SET_SUBTILING_PERF_KNOB_B V_NVC097_SET_SUBTILING_PERF_KNOB_B

#define P_NVC097_SET_SUBTILING_PERF_KNOB_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SUBTILING_PERF_KNOB_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SUBTILING_PERF_KNOB_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SUBTILING_PERF_KNOB_C {
    uint32_t reserved;
};

static inline void
__NVC097_SET_SUBTILING_PERF_KNOB_C(uint32_t *val_out, struct nv_nvc097_SET_SUBTILING_PERF_KNOB_C st)
{
    uint32_t val = 0;
    
    assert(st.reserved < (UINT64_C(1) << 1));
    val |= st.reserved << 0;
    *val_out = val;
}

#define V_NVC097_SET_SUBTILING_PERF_KNOB_C(val, args...) { \
    struct nv_nvc097_SET_SUBTILING_PERF_KNOB_C __data = { .reserved = (args) }; \
    __NVC097_SET_SUBTILING_PERF_KNOB_C(&val, __data); \
}

#define VA_NVC097_SET_SUBTILING_PERF_KNOB_C V_NVC097_SET_SUBTILING_PERF_KNOB_C

#define P_NVC097_SET_SUBTILING_PERF_KNOB_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SUBTILING_PERF_KNOB_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SUBTILING_PERF_KNOB_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_SUBREGION_TO_REPORT {
    uint32_t enable;
    uint32_t subregion_id;
};

static inline void
__NVC097_SET_ZCULL_SUBREGION_TO_REPORT(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_SUBREGION_TO_REPORT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.subregion_id < (UINT64_C(1) << 8));
    val |= st.subregion_id << 4;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_SUBREGION_TO_REPORT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE; \
    struct nv_nvc097_SET_ZCULL_SUBREGION_TO_REPORT __data = args; \
    __NVC097_SET_ZCULL_SUBREGION_TO_REPORT(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_SUBREGION_TO_REPORT V_NVC097_SET_ZCULL_SUBREGION_TO_REPORT

#define P_NVC097_SET_ZCULL_SUBREGION_TO_REPORT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_SUBREGION_TO_REPORT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_SUBREGION_TO_REPORT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_SUBREGION_REPORT_TYPE {
    uint32_t enable;
    uint32_t type;
};

static inline void
__NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_SUBREGION_REPORT_TYPE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.type < (UINT64_C(1) << 3));
    val |= st.type << 4;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE; \
    UNUSED uint32_t TYPE_DEPTH_TEST = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST; \
    UNUSED uint32_t TYPE_DEPTH_TEST_NO_ACCEPT = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT; \
    UNUSED uint32_t TYPE_DEPTH_TEST_LATE_Z = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z; \
    UNUSED uint32_t TYPE_STENCIL_TEST = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST; \
    struct nv_nvc097_SET_ZCULL_SUBREGION_REPORT_TYPE __data = args; \
    __NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE V_NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE

#define P_NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE; \
    UNUSED uint32_t TYPE_DEPTH_TEST = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST; \
    UNUSED uint32_t TYPE_DEPTH_TEST_NO_ACCEPT = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT; \
    UNUSED uint32_t TYPE_DEPTH_TEST_LATE_Z = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z; \
    UNUSED uint32_t TYPE_STENCIL_TEST = NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BALANCED_PRIMITIVE_WORKLOAD {
    uint32_t in_unpartitioned_mode;
    uint32_t in_timesliced_mode;
};

static inline void
__NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD(uint32_t *val_out, struct nv_nvc097_SET_BALANCED_PRIMITIVE_WORKLOAD st)
{
    uint32_t val = 0;
    
    assert(st.in_unpartitioned_mode < (UINT64_C(1) << 1));
    val |= st.in_unpartitioned_mode << 0;
    
    assert(st.in_timesliced_mode < (UINT64_C(1) << 1));
    val |= st.in_timesliced_mode << 4;
    *val_out = val;
}

#define V_NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD(val, args...) { \
    UNUSED uint32_t IN_UNPARTITIONED_MODE_FALSE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE; \
    UNUSED uint32_t IN_UNPARTITIONED_MODE_TRUE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE; \
    UNUSED uint32_t IN_TIMESLICED_MODE_FALSE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE; \
    UNUSED uint32_t IN_TIMESLICED_MODE_TRUE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE; \
    struct nv_nvc097_SET_BALANCED_PRIMITIVE_WORKLOAD __data = args; \
    __NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD(&val, __data); \
}

#define VA_NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD V_NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD

#define P_NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD(push, args...) do { \
    UNUSED uint32_t IN_UNPARTITIONED_MODE_FALSE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE; \
    UNUSED uint32_t IN_UNPARTITIONED_MODE_TRUE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE; \
    UNUSED uint32_t IN_TIMESLICED_MODE_FALSE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE; \
    UNUSED uint32_t IN_TIMESLICED_MODE_TRUE = NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_MAX_PATCHES_PER_BATCH {
    uint32_t v;
};

static inline void
__NVC097_SET_MAX_PATCHES_PER_BATCH(uint32_t *val_out, struct nv_nvc097_SET_MAX_PATCHES_PER_BATCH st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 6));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_MAX_PATCHES_PER_BATCH(val, args...) { \
    struct nv_nvc097_SET_MAX_PATCHES_PER_BATCH __data = { .v = (args) }; \
    __NVC097_SET_MAX_PATCHES_PER_BATCH(&val, __data); \
}

#define VA_NVC097_SET_MAX_PATCHES_PER_BATCH V_NVC097_SET_MAX_PATCHES_PER_BATCH

#define P_NVC097_SET_MAX_PATCHES_PER_BATCH(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_MAX_PATCHES_PER_BATCH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_MAX_PATCHES_PER_BATCH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RASTER_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_RASTER_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_RASTER_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_RASTER_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_RASTER_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_RASTER_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_RASTER_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_RASTER_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_RASTER_ENABLE V_NVC097_SET_RASTER_ENABLE

#define P_NVC097_SET_RASTER_ENABLE(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_RASTER_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_RASTER_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RASTER_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RASTER_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_BUFFER_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_STREAM_OUT_BUFFER_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_BUFFER_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_BUFFER_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_STREAM_OUT_BUFFER_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_STREAM_OUT_BUFFER_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_BUFFER_ENABLE(i) V_NVC097_SET_STREAM_OUT_BUFFER_ENABLE

#define P_NVC097_SET_STREAM_OUT_BUFFER_ENABLE(push, idx, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_BUFFER_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_BUFFER_ENABLE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_BUFFER_ADDRESS_A {
    uint32_t upper;
};

static inline void
__NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_BUFFER_ADDRESS_A st)
{
    uint32_t val = 0;
    
    assert(st.upper < (UINT64_C(1) << 8));
    val |= st.upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(val, args...) { \
    struct nv_nvc097_SET_STREAM_OUT_BUFFER_ADDRESS_A __data = { .upper = (args) }; \
    __NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(i) V_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A

#define P_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_BUFFER_ADDRESS_B {
    uint32_t lower;
};

static inline void
__NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_BUFFER_ADDRESS_B st)
{
    uint32_t val = 0;
    
    val |= st.lower;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(val, args...) { \
    struct nv_nvc097_SET_STREAM_OUT_BUFFER_ADDRESS_B __data = { .lower = (args) }; \
    __NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(i) V_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B

#define P_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_BUFFER_SIZE {
    uint32_t bytes;
};

static inline void
__NVC097_SET_STREAM_OUT_BUFFER_SIZE(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_BUFFER_SIZE st)
{
    uint32_t val = 0;
    
    val |= st.bytes;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_BUFFER_SIZE(val, args...) { \
    struct nv_nvc097_SET_STREAM_OUT_BUFFER_SIZE __data = { .bytes = (args) }; \
    __NVC097_SET_STREAM_OUT_BUFFER_SIZE(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_BUFFER_SIZE(i) V_NVC097_SET_STREAM_OUT_BUFFER_SIZE

#define P_NVC097_SET_STREAM_OUT_BUFFER_SIZE(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_BUFFER_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_BUFFER_SIZE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER {
    uint32_t start_offset;
};

static inline void
__NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER st)
{
    uint32_t val = 0;
    
    val |= st.start_offset;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(val, args...) { \
    struct nv_nvc097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER __data = { .start_offset = (args) }; \
    __NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(i) V_NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER

#define P_NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_CONTROL_STREAM {
    uint32_t select;
};

static inline void
__NVC097_SET_STREAM_OUT_CONTROL_STREAM(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_CONTROL_STREAM st)
{
    uint32_t val = 0;
    
    assert(st.select < (UINT64_C(1) << 2));
    val |= st.select << 0;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_CONTROL_STREAM(val, args...) { \
    struct nv_nvc097_SET_STREAM_OUT_CONTROL_STREAM __data = { .select = (args) }; \
    __NVC097_SET_STREAM_OUT_CONTROL_STREAM(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_CONTROL_STREAM(i) V_NVC097_SET_STREAM_OUT_CONTROL_STREAM

#define P_NVC097_SET_STREAM_OUT_CONTROL_STREAM(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_CONTROL_STREAM(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_CONTROL_STREAM(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT {
    uint32_t max;
};

static inline void
__NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT st)
{
    uint32_t val = 0;
    
    assert(st.max < (UINT64_C(1) << 8));
    val |= st.max << 0;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(val, args...) { \
    struct nv_nvc097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT __data = { .max = (args) }; \
    __NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(i) V_NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT

#define P_NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUT_CONTROL_STRIDE {
    uint32_t bytes;
};

static inline void
__NVC097_SET_STREAM_OUT_CONTROL_STRIDE(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUT_CONTROL_STRIDE st)
{
    uint32_t val = 0;
    
    val |= st.bytes;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUT_CONTROL_STRIDE(val, args...) { \
    struct nv_nvc097_SET_STREAM_OUT_CONTROL_STRIDE __data = { .bytes = (args) }; \
    __NVC097_SET_STREAM_OUT_CONTROL_STRIDE(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUT_CONTROL_STRIDE(i) V_NVC097_SET_STREAM_OUT_CONTROL_STRIDE

#define P_NVC097_SET_STREAM_OUT_CONTROL_STRIDE(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUT_CONTROL_STRIDE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUT_CONTROL_STRIDE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RASTER_INPUT {
    uint32_t stream_select;
};

static inline void
__NVC097_SET_RASTER_INPUT(uint32_t *val_out, struct nv_nvc097_SET_RASTER_INPUT st)
{
    uint32_t val = 0;
    
    assert(st.stream_select < (UINT64_C(1) << 2));
    val |= st.stream_select << 0;
    *val_out = val;
}

#define V_NVC097_SET_RASTER_INPUT(val, args...) { \
    struct nv_nvc097_SET_RASTER_INPUT __data = { .stream_select = (args) }; \
    __NVC097_SET_RASTER_INPUT(&val, __data); \
}

#define VA_NVC097_SET_RASTER_INPUT V_NVC097_SET_RASTER_INPUT

#define P_NVC097_SET_RASTER_INPUT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RASTER_INPUT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RASTER_INPUT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STREAM_OUTPUT {
    uint32_t enable;
};

static inline void
__NVC097_SET_STREAM_OUTPUT(uint32_t *val_out, struct nv_nvc097_SET_STREAM_OUTPUT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_STREAM_OUTPUT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_STREAM_OUTPUT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_STREAM_OUTPUT_ENABLE_TRUE; \
    struct nv_nvc097_SET_STREAM_OUTPUT __data = { .enable = (args) }; \
    __NVC097_SET_STREAM_OUTPUT(&val, __data); \
}

#define VA_NVC097_SET_STREAM_OUTPUT V_NVC097_SET_STREAM_OUTPUT

#define P_NVC097_SET_STREAM_OUTPUT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_STREAM_OUTPUT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_STREAM_OUTPUT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STREAM_OUTPUT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STREAM_OUTPUT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE {
    uint32_t enable;
};

static inline void
__NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE(uint32_t *val_out, struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE; \
    struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE __data = { .enable = (args) }; \
    __NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE(&val, __data); \
}

#define VA_NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE V_NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE

#define P_NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_FRACTION {
    uint32_t v;
};

static inline void
__NVC097_SET_ALPHA_FRACTION(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_FRACTION st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_FRACTION(val, args...) { \
    struct nv_nvc097_SET_ALPHA_FRACTION __data = { .v = (args) }; \
    __NVC097_SET_ALPHA_FRACTION(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_FRACTION V_NVC097_SET_ALPHA_FRACTION

#define P_NVC097_SET_ALPHA_FRACTION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_FRACTION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_FRACTION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_HYBRID_ANTI_ALIAS_CONTROL {
    uint32_t passes;
    uint32_t centroid;
    uint32_t passes_extended;
};

static inline void
__NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_HYBRID_ANTI_ALIAS_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.passes < (UINT64_C(1) << 4));
    val |= st.passes << 0;
    
    assert(st.centroid < (UINT64_C(1) << 1));
    val |= st.centroid << 4;
    
    assert(st.passes_extended < (UINT64_C(1) << 1));
    val |= st.passes_extended << 5;
    *val_out = val;
}

#define V_NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL(val, args...) { \
    UNUSED uint32_t CENTROID_PER_FRAGMENT = NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT; \
    UNUSED uint32_t CENTROID_PER_PASS = NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS; \
    struct nv_nvc097_SET_HYBRID_ANTI_ALIAS_CONTROL __data = args; \
    __NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL V_NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL

#define P_NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL(push, args...) do { \
    UNUSED uint32_t CENTROID_PER_FRAGMENT = NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT; \
    UNUSED uint32_t CENTROID_PER_PASS = NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_WINDOW {
    uint32_t base_address;
};

static inline void
__NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW(uint32_t *val_out, struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_WINDOW st)
{
    uint32_t val = 0;
    
    val |= st.base_address;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW(val, args...) { \
    struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_WINDOW __data = { .base_address = (args) }; \
    __NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW(&val, __data); \
}

#define VA_NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW V_NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW

#define P_NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_A {
    uint32_t address_upper;
};

static inline void
__NVC097_SET_SHADER_LOCAL_MEMORY_A(uint32_t *val_out, struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_A st)
{
    uint32_t val = 0;
    
    assert(st.address_upper < (UINT64_C(1) << 8));
    val |= st.address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_LOCAL_MEMORY_A(val, args...) { \
    struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_A __data = { .address_upper = (args) }; \
    __NVC097_SET_SHADER_LOCAL_MEMORY_A(&val, __data); \
}

#define VA_NVC097_SET_SHADER_LOCAL_MEMORY_A V_NVC097_SET_SHADER_LOCAL_MEMORY_A

#define P_NVC097_SET_SHADER_LOCAL_MEMORY_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_LOCAL_MEMORY_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_LOCAL_MEMORY_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_B {
    uint32_t address_lower;
};

static inline void
__NVC097_SET_SHADER_LOCAL_MEMORY_B(uint32_t *val_out, struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_B st)
{
    uint32_t val = 0;
    
    val |= st.address_lower;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_LOCAL_MEMORY_B(val, args...) { \
    struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_B __data = { .address_lower = (args) }; \
    __NVC097_SET_SHADER_LOCAL_MEMORY_B(&val, __data); \
}

#define VA_NVC097_SET_SHADER_LOCAL_MEMORY_B V_NVC097_SET_SHADER_LOCAL_MEMORY_B

#define P_NVC097_SET_SHADER_LOCAL_MEMORY_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_LOCAL_MEMORY_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_LOCAL_MEMORY_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_C {
    uint32_t size_upper;
};

static inline void
__NVC097_SET_SHADER_LOCAL_MEMORY_C(uint32_t *val_out, struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_C st)
{
    uint32_t val = 0;
    
    assert(st.size_upper < (UINT64_C(1) << 6));
    val |= st.size_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_LOCAL_MEMORY_C(val, args...) { \
    struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_C __data = { .size_upper = (args) }; \
    __NVC097_SET_SHADER_LOCAL_MEMORY_C(&val, __data); \
}

#define VA_NVC097_SET_SHADER_LOCAL_MEMORY_C V_NVC097_SET_SHADER_LOCAL_MEMORY_C

#define P_NVC097_SET_SHADER_LOCAL_MEMORY_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_LOCAL_MEMORY_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_LOCAL_MEMORY_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_D {
    uint32_t size_lower;
};

static inline void
__NVC097_SET_SHADER_LOCAL_MEMORY_D(uint32_t *val_out, struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_D st)
{
    uint32_t val = 0;
    
    val |= st.size_lower;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_LOCAL_MEMORY_D(val, args...) { \
    struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_D __data = { .size_lower = (args) }; \
    __NVC097_SET_SHADER_LOCAL_MEMORY_D(&val, __data); \
}

#define VA_NVC097_SET_SHADER_LOCAL_MEMORY_D V_NVC097_SET_SHADER_LOCAL_MEMORY_D

#define P_NVC097_SET_SHADER_LOCAL_MEMORY_D(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_LOCAL_MEMORY_D(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_LOCAL_MEMORY_D, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_E {
    uint32_t default_size_per_warp;
};

static inline void
__NVC097_SET_SHADER_LOCAL_MEMORY_E(uint32_t *val_out, struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_E st)
{
    uint32_t val = 0;
    
    assert(st.default_size_per_warp < (UINT64_C(1) << 26));
    val |= st.default_size_per_warp << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_LOCAL_MEMORY_E(val, args...) { \
    struct nv_nvc097_SET_SHADER_LOCAL_MEMORY_E __data = { .default_size_per_warp = (args) }; \
    __NVC097_SET_SHADER_LOCAL_MEMORY_E(&val, __data); \
}

#define VA_NVC097_SET_SHADER_LOCAL_MEMORY_E V_NVC097_SET_SHADER_LOCAL_MEMORY_E

#define P_NVC097_SET_SHADER_LOCAL_MEMORY_E(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_LOCAL_MEMORY_E(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_LOCAL_MEMORY_E, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_ZERO_BANDWIDTH_CLEAR {
    uint32_t slot_disable_mask;
};

static inline void
__NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR(uint32_t *val_out, struct nv_nvc097_SET_COLOR_ZERO_BANDWIDTH_CLEAR st)
{
    uint32_t val = 0;
    
    assert(st.slot_disable_mask < (UINT64_C(1) << 15));
    val |= st.slot_disable_mask << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR(val, args...) { \
    struct nv_nvc097_SET_COLOR_ZERO_BANDWIDTH_CLEAR __data = { .slot_disable_mask = (args) }; \
    __NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR(&val, __data); \
}

#define VA_NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR V_NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR

#define P_NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_Z_ZERO_BANDWIDTH_CLEAR {
    uint32_t slot_disable_mask;
};

static inline void
__NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR(uint32_t *val_out, struct nv_nvc097_SET_Z_ZERO_BANDWIDTH_CLEAR st)
{
    uint32_t val = 0;
    
    assert(st.slot_disable_mask < (UINT64_C(1) << 15));
    val |= st.slot_disable_mask << 0;
    *val_out = val;
}

#define V_NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR(val, args...) { \
    struct nv_nvc097_SET_Z_ZERO_BANDWIDTH_CLEAR __data = { .slot_disable_mask = (args) }; \
    __NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR(&val, __data); \
}

#define VA_NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR V_NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR

#define P_NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ISBE_SAVE_RESTORE_PROGRAM {
    uint32_t offset;
};

static inline void
__NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM(uint32_t *val_out, struct nv_nvc097_SET_ISBE_SAVE_RESTORE_PROGRAM st)
{
    uint32_t val = 0;
    
    val |= st.offset;
    *val_out = val;
}

#define V_NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM(val, args...) { \
    struct nv_nvc097_SET_ISBE_SAVE_RESTORE_PROGRAM __data = { .offset = (args) }; \
    __NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM(&val, __data); \
}

#define VA_NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM V_NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM

#define P_NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_SIZE_A {
    uint32_t width;
};

static inline void
__NVC097_SET_ZCULL_REGION_SIZE_A(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_SIZE_A st)
{
    uint32_t val = 0;
    
    assert(st.width < (UINT64_C(1) << 16));
    val |= st.width << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_SIZE_A(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_SIZE_A __data = { .width = (args) }; \
    __NVC097_SET_ZCULL_REGION_SIZE_A(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_SIZE_A V_NVC097_SET_ZCULL_REGION_SIZE_A

#define P_NVC097_SET_ZCULL_REGION_SIZE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_SIZE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_SIZE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_SIZE_B {
    uint32_t height;
};

static inline void
__NVC097_SET_ZCULL_REGION_SIZE_B(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_SIZE_B st)
{
    uint32_t val = 0;
    
    assert(st.height < (UINT64_C(1) << 16));
    val |= st.height << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_SIZE_B(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_SIZE_B __data = { .height = (args) }; \
    __NVC097_SET_ZCULL_REGION_SIZE_B(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_SIZE_B V_NVC097_SET_ZCULL_REGION_SIZE_B

#define P_NVC097_SET_ZCULL_REGION_SIZE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_SIZE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_SIZE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_SIZE_C {
    uint32_t depth;
};

static inline void
__NVC097_SET_ZCULL_REGION_SIZE_C(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_SIZE_C st)
{
    uint32_t val = 0;
    
    assert(st.depth < (UINT64_C(1) << 16));
    val |= st.depth << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_SIZE_C(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_SIZE_C __data = { .depth = (args) }; \
    __NVC097_SET_ZCULL_REGION_SIZE_C(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_SIZE_C V_NVC097_SET_ZCULL_REGION_SIZE_C

#define P_NVC097_SET_ZCULL_REGION_SIZE_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_SIZE_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_SIZE_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_C {
    uint32_t depth;
};

static inline void
__NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_C st)
{
    uint32_t val = 0;
    
    assert(st.depth < (UINT64_C(1) << 16));
    val |= st.depth << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_C __data = { .depth = (args) }; \
    __NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C

#define P_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CULL_BEFORE_FETCH {
    uint32_t fetch_streams_once;
};

static inline void
__NVC097_SET_CULL_BEFORE_FETCH(uint32_t *val_out, struct nv_nvc097_SET_CULL_BEFORE_FETCH st)
{
    uint32_t val = 0;
    
    assert(st.fetch_streams_once < (UINT64_C(1) << 1));
    val |= st.fetch_streams_once << 0;
    *val_out = val;
}

#define V_NVC097_SET_CULL_BEFORE_FETCH(val, args...) { \
    UNUSED uint32_t FETCH_STREAMS_ONCE_FALSE = NVC097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE; \
    UNUSED uint32_t FETCH_STREAMS_ONCE_TRUE = NVC097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE; \
    struct nv_nvc097_SET_CULL_BEFORE_FETCH __data = { .fetch_streams_once = (args) }; \
    __NVC097_SET_CULL_BEFORE_FETCH(&val, __data); \
}

#define VA_NVC097_SET_CULL_BEFORE_FETCH V_NVC097_SET_CULL_BEFORE_FETCH

#define P_NVC097_SET_CULL_BEFORE_FETCH(push, args...) do { \
    UNUSED uint32_t FETCH_STREAMS_ONCE_FALSE = NVC097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE; \
    UNUSED uint32_t FETCH_STREAMS_ONCE_TRUE = NVC097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CULL_BEFORE_FETCH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CULL_BEFORE_FETCH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_LOCATION {
    uint32_t start_aliquot;
    uint32_t aliquot_count;
};

static inline void
__NVC097_SET_ZCULL_REGION_LOCATION(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_LOCATION st)
{
    uint32_t val = 0;
    
    assert(st.start_aliquot < (UINT64_C(1) << 16));
    val |= st.start_aliquot << 0;
    
    assert(st.aliquot_count < (UINT64_C(1) << 16));
    val |= st.aliquot_count << 16;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_LOCATION(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_LOCATION __data = args; \
    __NVC097_SET_ZCULL_REGION_LOCATION(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_LOCATION V_NVC097_SET_ZCULL_REGION_LOCATION

#define P_NVC097_SET_ZCULL_REGION_LOCATION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_LOCATION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_LOCATION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_ALIQUOTS {
    uint32_t per_layer;
};

static inline void
__NVC097_SET_ZCULL_REGION_ALIQUOTS(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_ALIQUOTS st)
{
    uint32_t val = 0;
    
    assert(st.per_layer < (UINT64_C(1) << 16));
    val |= st.per_layer << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_ALIQUOTS(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_ALIQUOTS __data = { .per_layer = (args) }; \
    __NVC097_SET_ZCULL_REGION_ALIQUOTS(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_ALIQUOTS V_NVC097_SET_ZCULL_REGION_ALIQUOTS

#define P_NVC097_SET_ZCULL_REGION_ALIQUOTS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_ALIQUOTS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_ALIQUOTS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_STORAGE_A {
    uint32_t address_upper;
};

static inline void
__NVC097_SET_ZCULL_STORAGE_A(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_STORAGE_A st)
{
    uint32_t val = 0;
    
    assert(st.address_upper < (UINT64_C(1) << 8));
    val |= st.address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_STORAGE_A(val, args...) { \
    struct nv_nvc097_SET_ZCULL_STORAGE_A __data = { .address_upper = (args) }; \
    __NVC097_SET_ZCULL_STORAGE_A(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_STORAGE_A V_NVC097_SET_ZCULL_STORAGE_A

#define P_NVC097_SET_ZCULL_STORAGE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_STORAGE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_STORAGE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_STORAGE_B {
    uint32_t address_lower;
};

static inline void
__NVC097_SET_ZCULL_STORAGE_B(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_STORAGE_B st)
{
    uint32_t val = 0;
    
    val |= st.address_lower;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_STORAGE_B(val, args...) { \
    struct nv_nvc097_SET_ZCULL_STORAGE_B __data = { .address_lower = (args) }; \
    __NVC097_SET_ZCULL_STORAGE_B(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_STORAGE_B V_NVC097_SET_ZCULL_STORAGE_B

#define P_NVC097_SET_ZCULL_STORAGE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_STORAGE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_STORAGE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_STORAGE_C {
    uint32_t limit_address_upper;
};

static inline void
__NVC097_SET_ZCULL_STORAGE_C(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_STORAGE_C st)
{
    uint32_t val = 0;
    
    assert(st.limit_address_upper < (UINT64_C(1) << 8));
    val |= st.limit_address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_STORAGE_C(val, args...) { \
    struct nv_nvc097_SET_ZCULL_STORAGE_C __data = { .limit_address_upper = (args) }; \
    __NVC097_SET_ZCULL_STORAGE_C(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_STORAGE_C V_NVC097_SET_ZCULL_STORAGE_C

#define P_NVC097_SET_ZCULL_STORAGE_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_STORAGE_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_STORAGE_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_STORAGE_D {
    uint32_t limit_address_lower;
};

static inline void
__NVC097_SET_ZCULL_STORAGE_D(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_STORAGE_D st)
{
    uint32_t val = 0;
    
    val |= st.limit_address_lower;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_STORAGE_D(val, args...) { \
    struct nv_nvc097_SET_ZCULL_STORAGE_D __data = { .limit_address_lower = (args) }; \
    __NVC097_SET_ZCULL_STORAGE_D(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_STORAGE_D V_NVC097_SET_ZCULL_STORAGE_D

#define P_NVC097_SET_ZCULL_STORAGE_D(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_STORAGE_D(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_STORAGE_D, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_READ_ONLY {
    uint32_t enable_z;
    uint32_t enable_stencil;
};

static inline void
__NVC097_SET_ZT_READ_ONLY(uint32_t *val_out, struct nv_nvc097_SET_ZT_READ_ONLY st)
{
    uint32_t val = 0;
    
    assert(st.enable_z < (UINT64_C(1) << 1));
    val |= st.enable_z << 0;
    
    assert(st.enable_stencil < (UINT64_C(1) << 1));
    val |= st.enable_stencil << 4;
    *val_out = val;
}

#define V_NVC097_SET_ZT_READ_ONLY(val, args...) { \
    UNUSED uint32_t ENABLE_Z_FALSE = NVC097_SET_ZT_READ_ONLY_ENABLE_Z_FALSE; \
    UNUSED uint32_t ENABLE_Z_TRUE = NVC097_SET_ZT_READ_ONLY_ENABLE_Z_TRUE; \
    UNUSED uint32_t ENABLE_STENCIL_FALSE = NVC097_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE; \
    UNUSED uint32_t ENABLE_STENCIL_TRUE = NVC097_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE; \
    struct nv_nvc097_SET_ZT_READ_ONLY __data = args; \
    __NVC097_SET_ZT_READ_ONLY(&val, __data); \
}

#define VA_NVC097_SET_ZT_READ_ONLY V_NVC097_SET_ZT_READ_ONLY

#define P_NVC097_SET_ZT_READ_ONLY(push, args...) do { \
    UNUSED uint32_t ENABLE_Z_FALSE = NVC097_SET_ZT_READ_ONLY_ENABLE_Z_FALSE; \
    UNUSED uint32_t ENABLE_Z_TRUE = NVC097_SET_ZT_READ_ONLY_ENABLE_Z_TRUE; \
    UNUSED uint32_t ENABLE_STENCIL_FALSE = NVC097_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE; \
    UNUSED uint32_t ENABLE_STENCIL_TRUE = NVC097_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_READ_ONLY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_READ_ONLY, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_COLOR_TARGET_A(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_A(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_COLOR_TARGET_A(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_A(i) V_NVC097_SET_COLOR_TARGET_A

#define P_NVC097_SET_COLOR_TARGET_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_COLOR_TARGET_B(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_B(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_COLOR_TARGET_B(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_B(i) V_NVC097_SET_COLOR_TARGET_B

#define P_NVC097_SET_COLOR_TARGET_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_WIDTH {
    uint32_t v;
};

static inline void
__NVC097_SET_COLOR_TARGET_WIDTH(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_WIDTH st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 28));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_WIDTH(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_WIDTH __data = { .v = (args) }; \
    __NVC097_SET_COLOR_TARGET_WIDTH(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_WIDTH(i) V_NVC097_SET_COLOR_TARGET_WIDTH

#define P_NVC097_SET_COLOR_TARGET_WIDTH(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_WIDTH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_WIDTH(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_HEIGHT {
    uint32_t v;
};

static inline void
__NVC097_SET_COLOR_TARGET_HEIGHT(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_HEIGHT st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 17));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_HEIGHT(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_HEIGHT __data = { .v = (args) }; \
    __NVC097_SET_COLOR_TARGET_HEIGHT(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_HEIGHT(i) V_NVC097_SET_COLOR_TARGET_HEIGHT

#define P_NVC097_SET_COLOR_TARGET_HEIGHT(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_HEIGHT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_HEIGHT(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_FORMAT {
    uint32_t v;
};

static inline void
__NVC097_SET_COLOR_TARGET_FORMAT(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_FORMAT st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_FORMAT(val, args...) { \
    UNUSED uint32_t V_DISABLED = NVC097_SET_COLOR_TARGET_FORMAT_V_DISABLED; \
    UNUSED uint32_t V_RF32_GF32_BF32_AF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32; \
    UNUSED uint32_t V_RS32_GS32_BS32_AS32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32; \
    UNUSED uint32_t V_RU32_GU32_BU32_AU32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32; \
    UNUSED uint32_t V_RF32_GF32_BF32_X32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32; \
    UNUSED uint32_t V_RS32_GS32_BS32_X32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32; \
    UNUSED uint32_t V_RU32_GU32_BU32_X32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32; \
    UNUSED uint32_t V_R16_G16_B16_A16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16; \
    UNUSED uint32_t V_RN16_GN16_BN16_AN16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16; \
    UNUSED uint32_t V_RS16_GS16_BS16_AS16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16; \
    UNUSED uint32_t V_RU16_GU16_BU16_AU16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16; \
    UNUSED uint32_t V_RF16_GF16_BF16_AF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16; \
    UNUSED uint32_t V_RF32_GF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32; \
    UNUSED uint32_t V_RS32_GS32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32; \
    UNUSED uint32_t V_RU32_GU32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32; \
    UNUSED uint32_t V_RF16_GF16_BF16_X16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16; \
    UNUSED uint32_t V_A8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8; \
    UNUSED uint32_t V_A8RL8GL8BL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8; \
    UNUSED uint32_t V_A2B10G10R10 = NVC097_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10; \
    UNUSED uint32_t V_AU2BU10GU10RU10 = NVC097_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10; \
    UNUSED uint32_t V_A8B8G8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8; \
    UNUSED uint32_t V_A8BL8GL8RL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8; \
    UNUSED uint32_t V_AN8BN8GN8RN8 = NVC097_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8; \
    UNUSED uint32_t V_AS8BS8GS8RS8 = NVC097_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8; \
    UNUSED uint32_t V_AU8BU8GU8RU8 = NVC097_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8; \
    UNUSED uint32_t V_R16_G16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16_G16; \
    UNUSED uint32_t V_RN16_GN16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16; \
    UNUSED uint32_t V_RS16_GS16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16; \
    UNUSED uint32_t V_RU16_GU16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16; \
    UNUSED uint32_t V_RF16_GF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16; \
    UNUSED uint32_t V_A2R10G10B10 = NVC097_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10; \
    UNUSED uint32_t V_BF10GF11RF11 = NVC097_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11; \
    UNUSED uint32_t V_RS32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32; \
    UNUSED uint32_t V_RU32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32; \
    UNUSED uint32_t V_RF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32; \
    UNUSED uint32_t V_X8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8; \
    UNUSED uint32_t V_X8RL8GL8BL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8; \
    UNUSED uint32_t V_R5G6B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_R5G6B5; \
    UNUSED uint32_t V_A1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5; \
    UNUSED uint32_t V_G8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_G8R8; \
    UNUSED uint32_t V_GN8RN8 = NVC097_SET_COLOR_TARGET_FORMAT_V_GN8RN8; \
    UNUSED uint32_t V_GS8RS8 = NVC097_SET_COLOR_TARGET_FORMAT_V_GS8RS8; \
    UNUSED uint32_t V_GU8RU8 = NVC097_SET_COLOR_TARGET_FORMAT_V_GU8RU8; \
    UNUSED uint32_t V_R16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16; \
    UNUSED uint32_t V_RN16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN16; \
    UNUSED uint32_t V_RS16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS16; \
    UNUSED uint32_t V_RU16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU16; \
    UNUSED uint32_t V_RF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16; \
    UNUSED uint32_t V_R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_R8; \
    UNUSED uint32_t V_RN8 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN8; \
    UNUSED uint32_t V_RS8 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS8; \
    UNUSED uint32_t V_RU8 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU8; \
    UNUSED uint32_t V_A8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8; \
    UNUSED uint32_t V_X1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5; \
    UNUSED uint32_t V_X8B8G8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8; \
    UNUSED uint32_t V_X8BL8GL8RL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8; \
    UNUSED uint32_t V_Z1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5; \
    UNUSED uint32_t V_O1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5; \
    UNUSED uint32_t V_Z8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8; \
    UNUSED uint32_t V_O8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8; \
    UNUSED uint32_t V_R32 = NVC097_SET_COLOR_TARGET_FORMAT_V_R32; \
    UNUSED uint32_t V_A16 = NVC097_SET_COLOR_TARGET_FORMAT_V_A16; \
    UNUSED uint32_t V_AF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_AF16; \
    UNUSED uint32_t V_AF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_AF32; \
    UNUSED uint32_t V_A8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8R8; \
    UNUSED uint32_t V_R16_A16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16_A16; \
    UNUSED uint32_t V_RF16_AF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_AF16; \
    UNUSED uint32_t V_RF32_AF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_AF32; \
    UNUSED uint32_t V_B8G8R8A8 = NVC097_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8; \
    struct nv_nvc097_SET_COLOR_TARGET_FORMAT __data = { .v = (args) }; \
    __NVC097_SET_COLOR_TARGET_FORMAT(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_FORMAT(i) V_NVC097_SET_COLOR_TARGET_FORMAT

#define P_NVC097_SET_COLOR_TARGET_FORMAT(push, idx, args...) do { \
    UNUSED uint32_t V_DISABLED = NVC097_SET_COLOR_TARGET_FORMAT_V_DISABLED; \
    UNUSED uint32_t V_RF32_GF32_BF32_AF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32; \
    UNUSED uint32_t V_RS32_GS32_BS32_AS32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32; \
    UNUSED uint32_t V_RU32_GU32_BU32_AU32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32; \
    UNUSED uint32_t V_RF32_GF32_BF32_X32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32; \
    UNUSED uint32_t V_RS32_GS32_BS32_X32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32; \
    UNUSED uint32_t V_RU32_GU32_BU32_X32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32; \
    UNUSED uint32_t V_R16_G16_B16_A16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16; \
    UNUSED uint32_t V_RN16_GN16_BN16_AN16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16; \
    UNUSED uint32_t V_RS16_GS16_BS16_AS16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16; \
    UNUSED uint32_t V_RU16_GU16_BU16_AU16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16; \
    UNUSED uint32_t V_RF16_GF16_BF16_AF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16; \
    UNUSED uint32_t V_RF32_GF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32; \
    UNUSED uint32_t V_RS32_GS32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32; \
    UNUSED uint32_t V_RU32_GU32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32; \
    UNUSED uint32_t V_RF16_GF16_BF16_X16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16; \
    UNUSED uint32_t V_A8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8; \
    UNUSED uint32_t V_A8RL8GL8BL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8; \
    UNUSED uint32_t V_A2B10G10R10 = NVC097_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10; \
    UNUSED uint32_t V_AU2BU10GU10RU10 = NVC097_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10; \
    UNUSED uint32_t V_A8B8G8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8; \
    UNUSED uint32_t V_A8BL8GL8RL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8; \
    UNUSED uint32_t V_AN8BN8GN8RN8 = NVC097_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8; \
    UNUSED uint32_t V_AS8BS8GS8RS8 = NVC097_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8; \
    UNUSED uint32_t V_AU8BU8GU8RU8 = NVC097_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8; \
    UNUSED uint32_t V_R16_G16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16_G16; \
    UNUSED uint32_t V_RN16_GN16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16; \
    UNUSED uint32_t V_RS16_GS16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16; \
    UNUSED uint32_t V_RU16_GU16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16; \
    UNUSED uint32_t V_RF16_GF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16; \
    UNUSED uint32_t V_A2R10G10B10 = NVC097_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10; \
    UNUSED uint32_t V_BF10GF11RF11 = NVC097_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11; \
    UNUSED uint32_t V_RS32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS32; \
    UNUSED uint32_t V_RU32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU32; \
    UNUSED uint32_t V_RF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32; \
    UNUSED uint32_t V_X8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8; \
    UNUSED uint32_t V_X8RL8GL8BL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8; \
    UNUSED uint32_t V_R5G6B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_R5G6B5; \
    UNUSED uint32_t V_A1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5; \
    UNUSED uint32_t V_G8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_G8R8; \
    UNUSED uint32_t V_GN8RN8 = NVC097_SET_COLOR_TARGET_FORMAT_V_GN8RN8; \
    UNUSED uint32_t V_GS8RS8 = NVC097_SET_COLOR_TARGET_FORMAT_V_GS8RS8; \
    UNUSED uint32_t V_GU8RU8 = NVC097_SET_COLOR_TARGET_FORMAT_V_GU8RU8; \
    UNUSED uint32_t V_R16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16; \
    UNUSED uint32_t V_RN16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN16; \
    UNUSED uint32_t V_RS16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS16; \
    UNUSED uint32_t V_RU16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU16; \
    UNUSED uint32_t V_RF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16; \
    UNUSED uint32_t V_R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_R8; \
    UNUSED uint32_t V_RN8 = NVC097_SET_COLOR_TARGET_FORMAT_V_RN8; \
    UNUSED uint32_t V_RS8 = NVC097_SET_COLOR_TARGET_FORMAT_V_RS8; \
    UNUSED uint32_t V_RU8 = NVC097_SET_COLOR_TARGET_FORMAT_V_RU8; \
    UNUSED uint32_t V_A8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8; \
    UNUSED uint32_t V_X1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5; \
    UNUSED uint32_t V_X8B8G8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8; \
    UNUSED uint32_t V_X8BL8GL8RL8 = NVC097_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8; \
    UNUSED uint32_t V_Z1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5; \
    UNUSED uint32_t V_O1R5G5B5 = NVC097_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5; \
    UNUSED uint32_t V_Z8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8; \
    UNUSED uint32_t V_O8R8G8B8 = NVC097_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8; \
    UNUSED uint32_t V_R32 = NVC097_SET_COLOR_TARGET_FORMAT_V_R32; \
    UNUSED uint32_t V_A16 = NVC097_SET_COLOR_TARGET_FORMAT_V_A16; \
    UNUSED uint32_t V_AF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_AF16; \
    UNUSED uint32_t V_AF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_AF32; \
    UNUSED uint32_t V_A8R8 = NVC097_SET_COLOR_TARGET_FORMAT_V_A8R8; \
    UNUSED uint32_t V_R16_A16 = NVC097_SET_COLOR_TARGET_FORMAT_V_R16_A16; \
    UNUSED uint32_t V_RF16_AF16 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_AF16; \
    UNUSED uint32_t V_RF32_AF32 = NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_AF32; \
    UNUSED uint32_t V_B8G8R8A8 = NVC097_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_FORMAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_FORMAT(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_MEMORY {
    uint32_t block_width;
    uint32_t block_height;
    uint32_t block_depth;
    uint32_t layout;
    uint32_t third_dimension_control;
};

static inline void
__NVC097_SET_COLOR_TARGET_MEMORY(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_MEMORY st)
{
    uint32_t val = 0;
    
    assert(st.block_width < (UINT64_C(1) << 4));
    val |= st.block_width << 0;
    
    assert(st.block_height < (UINT64_C(1) << 4));
    val |= st.block_height << 4;
    
    assert(st.block_depth < (UINT64_C(1) << 4));
    val |= st.block_depth << 8;
    
    assert(st.layout < (UINT64_C(1) << 1));
    val |= st.layout << 12;
    
    assert(st.third_dimension_control < (UINT64_C(1) << 1));
    val |= st.third_dimension_control << 16;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_MEMORY(val, args...) { \
    UNUSED uint32_t BLOCK_WIDTH_ONE_GOB = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB; \
    UNUSED uint32_t BLOCK_HEIGHT_ONE_GOB = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB; \
    UNUSED uint32_t BLOCK_HEIGHT_TWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_FOUR_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_EIGHT_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_SIXTEEN_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_THIRTYTWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_ONE_GOB = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB; \
    UNUSED uint32_t BLOCK_DEPTH_TWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_FOUR_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_EIGHT_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_SIXTEEN_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_THIRTYTWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS; \
    UNUSED uint32_t LAYOUT_BLOCKLINEAR = NVC097_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR; \
    UNUSED uint32_t LAYOUT_PITCH = NVC097_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH; \
    UNUSED uint32_t THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE = NVC097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE; \
    UNUSED uint32_t THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE = NVC097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE; \
    struct nv_nvc097_SET_COLOR_TARGET_MEMORY __data = args; \
    __NVC097_SET_COLOR_TARGET_MEMORY(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_MEMORY(i) V_NVC097_SET_COLOR_TARGET_MEMORY

#define P_NVC097_SET_COLOR_TARGET_MEMORY(push, idx, args...) do { \
    UNUSED uint32_t BLOCK_WIDTH_ONE_GOB = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB; \
    UNUSED uint32_t BLOCK_HEIGHT_ONE_GOB = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB; \
    UNUSED uint32_t BLOCK_HEIGHT_TWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_FOUR_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_EIGHT_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_SIXTEEN_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t BLOCK_HEIGHT_THIRTYTWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_ONE_GOB = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB; \
    UNUSED uint32_t BLOCK_DEPTH_TWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_FOUR_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_EIGHT_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_SIXTEEN_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS; \
    UNUSED uint32_t BLOCK_DEPTH_THIRTYTWO_GOBS = NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS; \
    UNUSED uint32_t LAYOUT_BLOCKLINEAR = NVC097_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR; \
    UNUSED uint32_t LAYOUT_PITCH = NVC097_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH; \
    UNUSED uint32_t THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE = NVC097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE; \
    UNUSED uint32_t THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE = NVC097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_MEMORY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_MEMORY(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_THIRD_DIMENSION {
    uint32_t v;
};

static inline void
__NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_THIRD_DIMENSION st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 28));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_THIRD_DIMENSION __data = { .v = (args) }; \
    __NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(i) V_NVC097_SET_COLOR_TARGET_THIRD_DIMENSION

#define P_NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_ARRAY_PITCH {
    uint32_t v;
};

static inline void
__NVC097_SET_COLOR_TARGET_ARRAY_PITCH(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_ARRAY_PITCH st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_ARRAY_PITCH(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_ARRAY_PITCH __data = { .v = (args) }; \
    __NVC097_SET_COLOR_TARGET_ARRAY_PITCH(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_ARRAY_PITCH(i) V_NVC097_SET_COLOR_TARGET_ARRAY_PITCH

#define P_NVC097_SET_COLOR_TARGET_ARRAY_PITCH(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_ARRAY_PITCH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_ARRAY_PITCH(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_LAYER {
    uint32_t offset;
};

static inline void
__NVC097_SET_COLOR_TARGET_LAYER(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_LAYER st)
{
    uint32_t val = 0;
    
    assert(st.offset < (UINT64_C(1) << 16));
    val |= st.offset << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_LAYER(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_LAYER __data = { .offset = (args) }; \
    __NVC097_SET_COLOR_TARGET_LAYER(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_LAYER(i) V_NVC097_SET_COLOR_TARGET_LAYER

#define P_NVC097_SET_COLOR_TARGET_LAYER(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_LAYER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_LAYER(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_MARK {
    uint32_t ieee_clean;
};

static inline void
__NVC097_SET_COLOR_TARGET_MARK(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_MARK st)
{
    uint32_t val = 0;
    
    assert(st.ieee_clean < (UINT64_C(1) << 1));
    val |= st.ieee_clean << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_MARK(val, args...) { \
    UNUSED uint32_t IEEE_CLEAN_FALSE = NVC097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE; \
    UNUSED uint32_t IEEE_CLEAN_TRUE = NVC097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE; \
    struct nv_nvc097_SET_COLOR_TARGET_MARK __data = { .ieee_clean = (args) }; \
    __NVC097_SET_COLOR_TARGET_MARK(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_MARK(i) V_NVC097_SET_COLOR_TARGET_MARK

#define P_NVC097_SET_COLOR_TARGET_MARK(push, idx, args...) do { \
    UNUSED uint32_t IEEE_CLEAN_FALSE = NVC097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE; \
    UNUSED uint32_t IEEE_CLEAN_TRUE = NVC097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_MARK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_MARK(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_SCALE_X {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_SCALE_X(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_SCALE_X st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_SCALE_X(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_SCALE_X __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_SCALE_X(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_SCALE_X(i) V_NVC097_SET_VIEWPORT_SCALE_X

#define P_NVC097_SET_VIEWPORT_SCALE_X(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_SCALE_X(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_SCALE_X(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_SCALE_Y {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_SCALE_Y(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_SCALE_Y st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_SCALE_Y(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_SCALE_Y __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_SCALE_Y(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_SCALE_Y(i) V_NVC097_SET_VIEWPORT_SCALE_Y

#define P_NVC097_SET_VIEWPORT_SCALE_Y(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_SCALE_Y(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_SCALE_Y(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_SCALE_Z {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_SCALE_Z(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_SCALE_Z st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_SCALE_Z(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_SCALE_Z __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_SCALE_Z(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_SCALE_Z(i) V_NVC097_SET_VIEWPORT_SCALE_Z

#define P_NVC097_SET_VIEWPORT_SCALE_Z(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_SCALE_Z(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_SCALE_Z(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_OFFSET_X {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_OFFSET_X(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_OFFSET_X st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_OFFSET_X(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_OFFSET_X __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_OFFSET_X(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_OFFSET_X(i) V_NVC097_SET_VIEWPORT_OFFSET_X

#define P_NVC097_SET_VIEWPORT_OFFSET_X(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_OFFSET_X(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_OFFSET_X(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_OFFSET_Y {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_OFFSET_Y(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_OFFSET_Y st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_OFFSET_Y(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_OFFSET_Y __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_OFFSET_Y(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_OFFSET_Y(i) V_NVC097_SET_VIEWPORT_OFFSET_Y

#define P_NVC097_SET_VIEWPORT_OFFSET_Y(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_OFFSET_Y(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_OFFSET_Y(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_OFFSET_Z {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_OFFSET_Z(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_OFFSET_Z st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_OFFSET_Z(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_OFFSET_Z __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_OFFSET_Z(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_OFFSET_Z(i) V_NVC097_SET_VIEWPORT_OFFSET_Z

#define P_NVC097_SET_VIEWPORT_OFFSET_Z(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_OFFSET_Z(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_OFFSET_Z(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_COORDINATE_SWIZZLE {
    uint32_t x;
    uint32_t y;
    uint32_t z;
    uint32_t w;
};

static inline void
__NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_COORDINATE_SWIZZLE st)
{
    uint32_t val = 0;
    
    assert(st.x < (UINT64_C(1) << 3));
    val |= st.x << 0;
    
    assert(st.y < (UINT64_C(1) << 3));
    val |= st.y << 4;
    
    assert(st.z < (UINT64_C(1) << 3));
    val |= st.z << 8;
    
    assert(st.w < (UINT64_C(1) << 3));
    val |= st.w << 12;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(val, args...) { \
    UNUSED uint32_t X_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X; \
    UNUSED uint32_t X_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X; \
    UNUSED uint32_t X_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y; \
    UNUSED uint32_t X_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y; \
    UNUSED uint32_t X_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z; \
    UNUSED uint32_t X_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z; \
    UNUSED uint32_t X_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W; \
    UNUSED uint32_t X_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W; \
    UNUSED uint32_t Y_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X; \
    UNUSED uint32_t Y_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X; \
    UNUSED uint32_t Y_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y; \
    UNUSED uint32_t Y_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y; \
    UNUSED uint32_t Y_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z; \
    UNUSED uint32_t Y_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z; \
    UNUSED uint32_t Y_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W; \
    UNUSED uint32_t Y_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W; \
    UNUSED uint32_t Z_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X; \
    UNUSED uint32_t Z_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X; \
    UNUSED uint32_t Z_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y; \
    UNUSED uint32_t Z_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y; \
    UNUSED uint32_t Z_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z; \
    UNUSED uint32_t Z_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z; \
    UNUSED uint32_t Z_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W; \
    UNUSED uint32_t Z_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W; \
    UNUSED uint32_t W_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X; \
    UNUSED uint32_t W_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X; \
    UNUSED uint32_t W_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y; \
    UNUSED uint32_t W_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y; \
    UNUSED uint32_t W_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z; \
    UNUSED uint32_t W_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z; \
    UNUSED uint32_t W_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W; \
    UNUSED uint32_t W_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W; \
    struct nv_nvc097_SET_VIEWPORT_COORDINATE_SWIZZLE __data = args; \
    __NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(i) V_NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE

#define P_NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(push, idx, args...) do { \
    UNUSED uint32_t X_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X; \
    UNUSED uint32_t X_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X; \
    UNUSED uint32_t X_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y; \
    UNUSED uint32_t X_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y; \
    UNUSED uint32_t X_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z; \
    UNUSED uint32_t X_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z; \
    UNUSED uint32_t X_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W; \
    UNUSED uint32_t X_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W; \
    UNUSED uint32_t Y_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X; \
    UNUSED uint32_t Y_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X; \
    UNUSED uint32_t Y_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y; \
    UNUSED uint32_t Y_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y; \
    UNUSED uint32_t Y_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z; \
    UNUSED uint32_t Y_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z; \
    UNUSED uint32_t Y_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W; \
    UNUSED uint32_t Y_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W; \
    UNUSED uint32_t Z_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X; \
    UNUSED uint32_t Z_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X; \
    UNUSED uint32_t Z_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y; \
    UNUSED uint32_t Z_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y; \
    UNUSED uint32_t Z_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z; \
    UNUSED uint32_t Z_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z; \
    UNUSED uint32_t Z_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W; \
    UNUSED uint32_t Z_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W; \
    UNUSED uint32_t W_POS_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X; \
    UNUSED uint32_t W_NEG_X = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X; \
    UNUSED uint32_t W_POS_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y; \
    UNUSED uint32_t W_NEG_Y = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y; \
    UNUSED uint32_t W_POS_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z; \
    UNUSED uint32_t W_NEG_Z = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z; \
    UNUSED uint32_t W_POS_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W; \
    UNUSED uint32_t W_NEG_W = NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION {
    uint32_t x_bits;
    uint32_t y_bits;
};

static inline void
__NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION st)
{
    uint32_t val = 0;
    
    assert(st.x_bits < (UINT64_C(1) << 5));
    val |= st.x_bits << 0;
    
    assert(st.y_bits < (UINT64_C(1) << 5));
    val |= st.y_bits << 8;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION __data = args; \
    __NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(i) V_NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION

#define P_NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_CLIP_HORIZONTAL {
    uint32_t x0;
    uint32_t width;
};

static inline void
__NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_CLIP_HORIZONTAL st)
{
    uint32_t val = 0;
    
    assert(st.x0 < (UINT64_C(1) << 16));
    val |= st.x0 << 0;
    
    assert(st.width < (UINT64_C(1) << 16));
    val |= st.width << 16;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_CLIP_HORIZONTAL __data = args; \
    __NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(i) V_NVC097_SET_VIEWPORT_CLIP_HORIZONTAL

#define P_NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_CLIP_VERTICAL {
    uint32_t y0;
    uint32_t height;
};

static inline void
__NVC097_SET_VIEWPORT_CLIP_VERTICAL(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_CLIP_VERTICAL st)
{
    uint32_t val = 0;
    
    assert(st.y0 < (UINT64_C(1) << 16));
    val |= st.y0 << 0;
    
    assert(st.height < (UINT64_C(1) << 16));
    val |= st.height << 16;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_CLIP_VERTICAL(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_CLIP_VERTICAL __data = args; \
    __NVC097_SET_VIEWPORT_CLIP_VERTICAL(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_CLIP_VERTICAL(i) V_NVC097_SET_VIEWPORT_CLIP_VERTICAL

#define P_NVC097_SET_VIEWPORT_CLIP_VERTICAL(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_CLIP_VERTICAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_CLIP_VERTICAL(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_CLIP_MIN_Z {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_CLIP_MIN_Z(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_CLIP_MIN_Z st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_CLIP_MIN_Z(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_CLIP_MIN_Z __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_CLIP_MIN_Z(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_CLIP_MIN_Z(i) V_NVC097_SET_VIEWPORT_CLIP_MIN_Z

#define P_NVC097_SET_VIEWPORT_CLIP_MIN_Z(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_CLIP_MIN_Z(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_CLIP_MIN_Z(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_CLIP_MAX_Z {
    uint32_t v;
};

static inline void
__NVC097_SET_VIEWPORT_CLIP_MAX_Z(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_CLIP_MAX_Z st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_CLIP_MAX_Z(val, args...) { \
    struct nv_nvc097_SET_VIEWPORT_CLIP_MAX_Z __data = { .v = (args) }; \
    __NVC097_SET_VIEWPORT_CLIP_MAX_Z(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_CLIP_MAX_Z(i) V_NVC097_SET_VIEWPORT_CLIP_MAX_Z

#define P_NVC097_SET_VIEWPORT_CLIP_MAX_Z(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_CLIP_MAX_Z(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_CLIP_MAX_Z(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_WINDOW_CLIP_HORIZONTAL {
    uint32_t xmin;
    uint32_t xmax;
};

static inline void
__NVC097_SET_WINDOW_CLIP_HORIZONTAL(uint32_t *val_out, struct nv_nvc097_SET_WINDOW_CLIP_HORIZONTAL st)
{
    uint32_t val = 0;
    
    assert(st.xmin < (UINT64_C(1) << 16));
    val |= st.xmin << 0;
    
    assert(st.xmax < (UINT64_C(1) << 16));
    val |= st.xmax << 16;
    *val_out = val;
}

#define V_NVC097_SET_WINDOW_CLIP_HORIZONTAL(val, args...) { \
    struct nv_nvc097_SET_WINDOW_CLIP_HORIZONTAL __data = args; \
    __NVC097_SET_WINDOW_CLIP_HORIZONTAL(&val, __data); \
}

#define VA_NVC097_SET_WINDOW_CLIP_HORIZONTAL(i) V_NVC097_SET_WINDOW_CLIP_HORIZONTAL

#define P_NVC097_SET_WINDOW_CLIP_HORIZONTAL(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_WINDOW_CLIP_HORIZONTAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_WINDOW_CLIP_HORIZONTAL(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_WINDOW_CLIP_VERTICAL {
    uint32_t ymin;
    uint32_t ymax;
};

static inline void
__NVC097_SET_WINDOW_CLIP_VERTICAL(uint32_t *val_out, struct nv_nvc097_SET_WINDOW_CLIP_VERTICAL st)
{
    uint32_t val = 0;
    
    assert(st.ymin < (UINT64_C(1) << 16));
    val |= st.ymin << 0;
    
    assert(st.ymax < (UINT64_C(1) << 16));
    val |= st.ymax << 16;
    *val_out = val;
}

#define V_NVC097_SET_WINDOW_CLIP_VERTICAL(val, args...) { \
    struct nv_nvc097_SET_WINDOW_CLIP_VERTICAL __data = args; \
    __NVC097_SET_WINDOW_CLIP_VERTICAL(&val, __data); \
}

#define VA_NVC097_SET_WINDOW_CLIP_VERTICAL(i) V_NVC097_SET_WINDOW_CLIP_VERTICAL

#define P_NVC097_SET_WINDOW_CLIP_VERTICAL(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_WINDOW_CLIP_VERTICAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_WINDOW_CLIP_VERTICAL(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLIP_ID_EXTENT_X {
    uint32_t minx;
    uint32_t width;
};

static inline void
__NVC097_SET_CLIP_ID_EXTENT_X(uint32_t *val_out, struct nv_nvc097_SET_CLIP_ID_EXTENT_X st)
{
    uint32_t val = 0;
    
    assert(st.minx < (UINT64_C(1) << 16));
    val |= st.minx << 0;
    
    assert(st.width < (UINT64_C(1) << 16));
    val |= st.width << 16;
    *val_out = val;
}

#define V_NVC097_SET_CLIP_ID_EXTENT_X(val, args...) { \
    struct nv_nvc097_SET_CLIP_ID_EXTENT_X __data = args; \
    __NVC097_SET_CLIP_ID_EXTENT_X(&val, __data); \
}

#define VA_NVC097_SET_CLIP_ID_EXTENT_X(i) V_NVC097_SET_CLIP_ID_EXTENT_X

#define P_NVC097_SET_CLIP_ID_EXTENT_X(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLIP_ID_EXTENT_X(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLIP_ID_EXTENT_X(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLIP_ID_EXTENT_Y {
    uint32_t miny;
    uint32_t height;
};

static inline void
__NVC097_SET_CLIP_ID_EXTENT_Y(uint32_t *val_out, struct nv_nvc097_SET_CLIP_ID_EXTENT_Y st)
{
    uint32_t val = 0;
    
    assert(st.miny < (UINT64_C(1) << 16));
    val |= st.miny << 0;
    
    assert(st.height < (UINT64_C(1) << 16));
    val |= st.height << 16;
    *val_out = val;
}

#define V_NVC097_SET_CLIP_ID_EXTENT_Y(val, args...) { \
    struct nv_nvc097_SET_CLIP_ID_EXTENT_Y __data = args; \
    __NVC097_SET_CLIP_ID_EXTENT_Y(&val, __data); \
}

#define VA_NVC097_SET_CLIP_ID_EXTENT_Y(i) V_NVC097_SET_CLIP_ID_EXTENT_Y

#define P_NVC097_SET_CLIP_ID_EXTENT_Y(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLIP_ID_EXTENT_Y(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLIP_ID_EXTENT_Y(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK {
    uint32_t v;
};

static inline void
__NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK(uint32_t *val_out, struct nv_nvc097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 11));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK(val, args...) { \
    struct nv_nvc097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK __data = { .v = (args) }; \
    __NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK(&val, __data); \
}

#define VA_NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK V_NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK

#define P_NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_API_VISIBLE_CALL_LIMIT {
    uint32_t v;
};

static inline void
__NVC097_SET_API_VISIBLE_CALL_LIMIT(uint32_t *val_out, struct nv_nvc097_SET_API_VISIBLE_CALL_LIMIT st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 4));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_API_VISIBLE_CALL_LIMIT(val, args...) { \
    UNUSED uint32_t V__0 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__0; \
    UNUSED uint32_t V__1 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__1; \
    UNUSED uint32_t V__2 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__2; \
    UNUSED uint32_t V__4 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__4; \
    UNUSED uint32_t V__8 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__8; \
    UNUSED uint32_t V__16 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__16; \
    UNUSED uint32_t V__32 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__32; \
    UNUSED uint32_t V__64 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__64; \
    UNUSED uint32_t V__128 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__128; \
    UNUSED uint32_t V_NO_CHECK = NVC097_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK; \
    struct nv_nvc097_SET_API_VISIBLE_CALL_LIMIT __data = { .v = (args) }; \
    __NVC097_SET_API_VISIBLE_CALL_LIMIT(&val, __data); \
}

#define VA_NVC097_SET_API_VISIBLE_CALL_LIMIT V_NVC097_SET_API_VISIBLE_CALL_LIMIT

#define P_NVC097_SET_API_VISIBLE_CALL_LIMIT(push, args...) do { \
    UNUSED uint32_t V__0 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__0; \
    UNUSED uint32_t V__1 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__1; \
    UNUSED uint32_t V__2 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__2; \
    UNUSED uint32_t V__4 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__4; \
    UNUSED uint32_t V__8 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__8; \
    UNUSED uint32_t V__16 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__16; \
    UNUSED uint32_t V__32 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__32; \
    UNUSED uint32_t V__64 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__64; \
    UNUSED uint32_t V__128 = NVC097_SET_API_VISIBLE_CALL_LIMIT_V__128; \
    UNUSED uint32_t V_NO_CHECK = NVC097_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_API_VISIBLE_CALL_LIMIT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_API_VISIBLE_CALL_LIMIT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STATISTICS_COUNTER {
    uint32_t da_vertices_generated_enable;
    uint32_t da_primitives_generated_enable;
    uint32_t vs_invocations_enable;
    uint32_t gs_invocations_enable;
    uint32_t gs_primitives_generated_enable;
    uint32_t streaming_primitives_succeeded_enable;
    uint32_t streaming_primitives_needed_enable;
    uint32_t clipper_invocations_enable;
    uint32_t clipper_primitives_generated_enable;
    uint32_t ps_invocations_enable;
    uint32_t ti_invocations_enable;
    uint32_t ts_invocations_enable;
    uint32_t ts_primitives_generated_enable;
    uint32_t total_streaming_primitives_needed_succeeded_enable;
    uint32_t vtg_primitives_out_enable;
    uint32_t alpha_beta_clocks_enable;
};

static inline void
__NVC097_SET_STATISTICS_COUNTER(uint32_t *val_out, struct nv_nvc097_SET_STATISTICS_COUNTER st)
{
    uint32_t val = 0;
    
    assert(st.da_vertices_generated_enable < (UINT64_C(1) << 1));
    val |= st.da_vertices_generated_enable << 0;
    
    assert(st.da_primitives_generated_enable < (UINT64_C(1) << 1));
    val |= st.da_primitives_generated_enable << 1;
    
    assert(st.vs_invocations_enable < (UINT64_C(1) << 1));
    val |= st.vs_invocations_enable << 2;
    
    assert(st.gs_invocations_enable < (UINT64_C(1) << 1));
    val |= st.gs_invocations_enable << 3;
    
    assert(st.gs_primitives_generated_enable < (UINT64_C(1) << 1));
    val |= st.gs_primitives_generated_enable << 4;
    
    assert(st.streaming_primitives_succeeded_enable < (UINT64_C(1) << 1));
    val |= st.streaming_primitives_succeeded_enable << 5;
    
    assert(st.streaming_primitives_needed_enable < (UINT64_C(1) << 1));
    val |= st.streaming_primitives_needed_enable << 6;
    
    assert(st.clipper_invocations_enable < (UINT64_C(1) << 1));
    val |= st.clipper_invocations_enable << 7;
    
    assert(st.clipper_primitives_generated_enable < (UINT64_C(1) << 1));
    val |= st.clipper_primitives_generated_enable << 8;
    
    assert(st.ps_invocations_enable < (UINT64_C(1) << 1));
    val |= st.ps_invocations_enable << 9;
    
    assert(st.ti_invocations_enable < (UINT64_C(1) << 1));
    val |= st.ti_invocations_enable << 11;
    
    assert(st.ts_invocations_enable < (UINT64_C(1) << 1));
    val |= st.ts_invocations_enable << 12;
    
    assert(st.ts_primitives_generated_enable < (UINT64_C(1) << 1));
    val |= st.ts_primitives_generated_enable << 13;
    
    assert(st.total_streaming_primitives_needed_succeeded_enable < (UINT64_C(1) << 1));
    val |= st.total_streaming_primitives_needed_succeeded_enable << 14;
    
    assert(st.vtg_primitives_out_enable < (UINT64_C(1) << 1));
    val |= st.vtg_primitives_out_enable << 10;
    
    assert(st.alpha_beta_clocks_enable < (UINT64_C(1) << 1));
    val |= st.alpha_beta_clocks_enable << 15;
    *val_out = val;
}

#define V_NVC097_SET_STATISTICS_COUNTER(val, args...) { \
    UNUSED uint32_t DA_VERTICES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t DA_VERTICES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t DA_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t DA_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t VS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t VS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t GS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t GS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t GS_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t GS_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE; \
    UNUSED uint32_t CLIPPER_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t CLIPPER_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t PS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t PS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t TI_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t TI_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t TS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t TS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t TS_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t TS_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE; \
    UNUSED uint32_t TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE; \
    UNUSED uint32_t VTG_PRIMITIVES_OUT_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE; \
    UNUSED uint32_t VTG_PRIMITIVES_OUT_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE; \
    UNUSED uint32_t ALPHA_BETA_CLOCKS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE; \
    UNUSED uint32_t ALPHA_BETA_CLOCKS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE; \
    struct nv_nvc097_SET_STATISTICS_COUNTER __data = args; \
    __NVC097_SET_STATISTICS_COUNTER(&val, __data); \
}

#define VA_NVC097_SET_STATISTICS_COUNTER V_NVC097_SET_STATISTICS_COUNTER

#define P_NVC097_SET_STATISTICS_COUNTER(push, args...) do { \
    UNUSED uint32_t DA_VERTICES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t DA_VERTICES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t DA_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t DA_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t VS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t VS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t GS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t GS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t GS_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t GS_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE; \
    UNUSED uint32_t STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE; \
    UNUSED uint32_t CLIPPER_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t CLIPPER_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t PS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t PS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t TI_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t TI_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t TS_INVOCATIONS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE; \
    UNUSED uint32_t TS_INVOCATIONS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE; \
    UNUSED uint32_t TS_PRIMITIVES_GENERATED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE; \
    UNUSED uint32_t TS_PRIMITIVES_GENERATED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE; \
    UNUSED uint32_t TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE; \
    UNUSED uint32_t TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE; \
    UNUSED uint32_t VTG_PRIMITIVES_OUT_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE; \
    UNUSED uint32_t VTG_PRIMITIVES_OUT_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE; \
    UNUSED uint32_t ALPHA_BETA_CLOCKS_ENABLE_FALSE = NVC097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE; \
    UNUSED uint32_t ALPHA_BETA_CLOCKS_ENABLE_TRUE = NVC097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STATISTICS_COUNTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STATISTICS_COUNTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLEAR_RECT_HORIZONTAL {
    uint32_t xmin;
    uint32_t xmax;
};

static inline void
__NVC097_SET_CLEAR_RECT_HORIZONTAL(uint32_t *val_out, struct nv_nvc097_SET_CLEAR_RECT_HORIZONTAL st)
{
    uint32_t val = 0;
    
    assert(st.xmin < (UINT64_C(1) << 16));
    val |= st.xmin << 0;
    
    assert(st.xmax < (UINT64_C(1) << 16));
    val |= st.xmax << 16;
    *val_out = val;
}

#define V_NVC097_SET_CLEAR_RECT_HORIZONTAL(val, args...) { \
    struct nv_nvc097_SET_CLEAR_RECT_HORIZONTAL __data = args; \
    __NVC097_SET_CLEAR_RECT_HORIZONTAL(&val, __data); \
}

#define VA_NVC097_SET_CLEAR_RECT_HORIZONTAL V_NVC097_SET_CLEAR_RECT_HORIZONTAL

#define P_NVC097_SET_CLEAR_RECT_HORIZONTAL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLEAR_RECT_HORIZONTAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLEAR_RECT_HORIZONTAL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLEAR_RECT_VERTICAL {
    uint32_t ymin;
    uint32_t ymax;
};

static inline void
__NVC097_SET_CLEAR_RECT_VERTICAL(uint32_t *val_out, struct nv_nvc097_SET_CLEAR_RECT_VERTICAL st)
{
    uint32_t val = 0;
    
    assert(st.ymin < (UINT64_C(1) << 16));
    val |= st.ymin << 0;
    
    assert(st.ymax < (UINT64_C(1) << 16));
    val |= st.ymax << 16;
    *val_out = val;
}

#define V_NVC097_SET_CLEAR_RECT_VERTICAL(val, args...) { \
    struct nv_nvc097_SET_CLEAR_RECT_VERTICAL __data = args; \
    __NVC097_SET_CLEAR_RECT_VERTICAL(&val, __data); \
}

#define VA_NVC097_SET_CLEAR_RECT_VERTICAL V_NVC097_SET_CLEAR_RECT_VERTICAL

#define P_NVC097_SET_CLEAR_RECT_VERTICAL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLEAR_RECT_VERTICAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLEAR_RECT_VERTICAL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_ARRAY_START {
    uint32_t v;
};

static inline void
__NVC097_SET_VERTEX_ARRAY_START(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_ARRAY_START st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_ARRAY_START(val, args...) { \
    struct nv_nvc097_SET_VERTEX_ARRAY_START __data = { .v = (args) }; \
    __NVC097_SET_VERTEX_ARRAY_START(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_ARRAY_START V_NVC097_SET_VERTEX_ARRAY_START

#define P_NVC097_SET_VERTEX_ARRAY_START(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_ARRAY_START(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_ARRAY_START, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_VERTEX_ARRAY {
    uint32_t count;
};

static inline void
__NVC097_DRAW_VERTEX_ARRAY(uint32_t *val_out, struct nv_nvc097_DRAW_VERTEX_ARRAY st)
{
    uint32_t val = 0;
    
    val |= st.count;
    *val_out = val;
}

#define V_NVC097_DRAW_VERTEX_ARRAY(val, args...) { \
    struct nv_nvc097_DRAW_VERTEX_ARRAY __data = { .count = (args) }; \
    __NVC097_DRAW_VERTEX_ARRAY(&val, __data); \
}

#define VA_NVC097_DRAW_VERTEX_ARRAY V_NVC097_DRAW_VERTEX_ARRAY

#define P_NVC097_DRAW_VERTEX_ARRAY(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_VERTEX_ARRAY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_VERTEX_ARRAY, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_Z_CLIP {
    uint32_t range;
};

static inline void
__NVC097_SET_VIEWPORT_Z_CLIP(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_Z_CLIP st)
{
    uint32_t val = 0;
    
    assert(st.range < (UINT64_C(1) << 1));
    val |= st.range << 0;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_Z_CLIP(val, args...) { \
    UNUSED uint32_t RANGE_NEGATIVE_W_TO_POSITIVE_W = NVC097_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W; \
    UNUSED uint32_t RANGE_ZERO_TO_POSITIVE_W = NVC097_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W; \
    struct nv_nvc097_SET_VIEWPORT_Z_CLIP __data = { .range = (args) }; \
    __NVC097_SET_VIEWPORT_Z_CLIP(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_Z_CLIP V_NVC097_SET_VIEWPORT_Z_CLIP

#define P_NVC097_SET_VIEWPORT_Z_CLIP(push, args...) do { \
    UNUSED uint32_t RANGE_NEGATIVE_W_TO_POSITIVE_W = NVC097_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W; \
    UNUSED uint32_t RANGE_ZERO_TO_POSITIVE_W = NVC097_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_Z_CLIP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_Z_CLIP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_CLEAR_VALUE {
    uint32_t v;
};

static inline void
__NVC097_SET_COLOR_CLEAR_VALUE(uint32_t *val_out, struct nv_nvc097_SET_COLOR_CLEAR_VALUE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_CLEAR_VALUE(val, args...) { \
    struct nv_nvc097_SET_COLOR_CLEAR_VALUE __data = { .v = (args) }; \
    __NVC097_SET_COLOR_CLEAR_VALUE(&val, __data); \
}

#define VA_NVC097_SET_COLOR_CLEAR_VALUE(i) V_NVC097_SET_COLOR_CLEAR_VALUE

#define P_NVC097_SET_COLOR_CLEAR_VALUE(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_CLEAR_VALUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_CLEAR_VALUE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_Z_CLEAR_VALUE {
    uint32_t v;
};

static inline void
__NVC097_SET_Z_CLEAR_VALUE(uint32_t *val_out, struct nv_nvc097_SET_Z_CLEAR_VALUE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_Z_CLEAR_VALUE(val, args...) { \
    struct nv_nvc097_SET_Z_CLEAR_VALUE __data = { .v = (args) }; \
    __NVC097_SET_Z_CLEAR_VALUE(&val, __data); \
}

#define VA_NVC097_SET_Z_CLEAR_VALUE V_NVC097_SET_Z_CLEAR_VALUE

#define P_NVC097_SET_Z_CLEAR_VALUE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_Z_CLEAR_VALUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_Z_CLEAR_VALUE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_CACHE_CONTROL {
    uint32_t icache_prefetch_enable;
};

static inline void
__NVC097_SET_SHADER_CACHE_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_SHADER_CACHE_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.icache_prefetch_enable < (UINT64_C(1) << 1));
    val |= st.icache_prefetch_enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_CACHE_CONTROL(val, args...) { \
    UNUSED uint32_t ICACHE_PREFETCH_ENABLE_FALSE = NVC097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE; \
    UNUSED uint32_t ICACHE_PREFETCH_ENABLE_TRUE = NVC097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE; \
    struct nv_nvc097_SET_SHADER_CACHE_CONTROL __data = { .icache_prefetch_enable = (args) }; \
    __NVC097_SET_SHADER_CACHE_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_SHADER_CACHE_CONTROL V_NVC097_SET_SHADER_CACHE_CONTROL

#define P_NVC097_SET_SHADER_CACHE_CONTROL(push, args...) do { \
    UNUSED uint32_t ICACHE_PREFETCH_ENABLE_FALSE = NVC097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE; \
    UNUSED uint32_t ICACHE_PREFETCH_ENABLE_TRUE = NVC097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_CACHE_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_CACHE_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_FORCE_TRANSITION_TO_BETA {
    uint32_t v;
};

static inline void
__NVC097_FORCE_TRANSITION_TO_BETA(uint32_t *val_out, struct nv_nvc097_FORCE_TRANSITION_TO_BETA st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_FORCE_TRANSITION_TO_BETA(val, args...) { \
    struct nv_nvc097_FORCE_TRANSITION_TO_BETA __data = { .v = (args) }; \
    __NVC097_FORCE_TRANSITION_TO_BETA(&val, __data); \
}

#define VA_NVC097_FORCE_TRANSITION_TO_BETA V_NVC097_FORCE_TRANSITION_TO_BETA

#define P_NVC097_FORCE_TRANSITION_TO_BETA(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_FORCE_TRANSITION_TO_BETA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_FORCE_TRANSITION_TO_BETA, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE

#define P_NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_CLEAR_VALUE {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_CLEAR_VALUE(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_CLEAR_VALUE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_CLEAR_VALUE(val, args...) { \
    struct nv_nvc097_SET_STENCIL_CLEAR_VALUE __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_CLEAR_VALUE(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_CLEAR_VALUE V_NVC097_SET_STENCIL_CLEAR_VALUE

#define P_NVC097_SET_STENCIL_CLEAR_VALUE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_CLEAR_VALUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_CLEAR_VALUE, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_SHADER_CACHES_NO_WFI {
    uint32_t instruction;
    uint32_t global_data;
    uint32_t constant;
};

static inline void
__NVC097_INVALIDATE_SHADER_CACHES_NO_WFI(uint32_t *val_out, struct nv_nvc097_INVALIDATE_SHADER_CACHES_NO_WFI st)
{
    uint32_t val = 0;
    
    assert(st.instruction < (UINT64_C(1) << 1));
    val |= st.instruction << 0;
    
    assert(st.global_data < (UINT64_C(1) << 1));
    val |= st.global_data << 4;
    
    assert(st.constant < (UINT64_C(1) << 1));
    val |= st.constant << 12;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_SHADER_CACHES_NO_WFI(val, args...) { \
    UNUSED uint32_t INSTRUCTION_FALSE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE; \
    UNUSED uint32_t INSTRUCTION_TRUE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE; \
    UNUSED uint32_t GLOBAL_DATA_FALSE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE; \
    UNUSED uint32_t GLOBAL_DATA_TRUE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE; \
    UNUSED uint32_t CONSTANT_FALSE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE; \
    UNUSED uint32_t CONSTANT_TRUE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE; \
    struct nv_nvc097_INVALIDATE_SHADER_CACHES_NO_WFI __data = args; \
    __NVC097_INVALIDATE_SHADER_CACHES_NO_WFI(&val, __data); \
}

#define VA_NVC097_INVALIDATE_SHADER_CACHES_NO_WFI V_NVC097_INVALIDATE_SHADER_CACHES_NO_WFI

#define P_NVC097_INVALIDATE_SHADER_CACHES_NO_WFI(push, args...) do { \
    UNUSED uint32_t INSTRUCTION_FALSE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE; \
    UNUSED uint32_t INSTRUCTION_TRUE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE; \
    UNUSED uint32_t GLOBAL_DATA_FALSE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE; \
    UNUSED uint32_t GLOBAL_DATA_TRUE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE; \
    UNUSED uint32_t CONSTANT_FALSE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE; \
    UNUSED uint32_t CONSTANT_TRUE = NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_SHADER_CACHES_NO_WFI(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_SHADER_CACHES_NO_WFI, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_SERIALIZATION {
    uint32_t enable;
    uint32_t applied;
};

static inline void
__NVC097_SET_ZCULL_SERIALIZATION(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_SERIALIZATION st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.applied < (UINT64_C(1) << 2));
    val |= st.applied << 4;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_SERIALIZATION(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SERIALIZATION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SERIALIZATION_ENABLE_TRUE; \
    UNUSED uint32_t APPLIED_ALWAYS = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS; \
    UNUSED uint32_t APPLIED_LATE_Z = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z; \
    UNUSED uint32_t APPLIED_OUT_OF_GAMUT_Z = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z; \
    UNUSED uint32_t APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z; \
    struct nv_nvc097_SET_ZCULL_SERIALIZATION __data = args; \
    __NVC097_SET_ZCULL_SERIALIZATION(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_SERIALIZATION V_NVC097_SET_ZCULL_SERIALIZATION

#define P_NVC097_SET_ZCULL_SERIALIZATION(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_SERIALIZATION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_SERIALIZATION_ENABLE_TRUE; \
    UNUSED uint32_t APPLIED_ALWAYS = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS; \
    UNUSED uint32_t APPLIED_LATE_Z = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z; \
    UNUSED uint32_t APPLIED_OUT_OF_GAMUT_Z = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z; \
    UNUSED uint32_t APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z = NVC097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_SERIALIZATION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_SERIALIZATION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FRONT_POLYGON_MODE {
    uint32_t v;
};

static inline void
__NVC097_SET_FRONT_POLYGON_MODE(uint32_t *val_out, struct nv_nvc097_SET_FRONT_POLYGON_MODE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FRONT_POLYGON_MODE(val, args...) { \
    UNUSED uint32_t V_POINT = NVC097_SET_FRONT_POLYGON_MODE_V_POINT; \
    UNUSED uint32_t V_LINE = NVC097_SET_FRONT_POLYGON_MODE_V_LINE; \
    UNUSED uint32_t V_FILL = NVC097_SET_FRONT_POLYGON_MODE_V_FILL; \
    struct nv_nvc097_SET_FRONT_POLYGON_MODE __data = { .v = (args) }; \
    __NVC097_SET_FRONT_POLYGON_MODE(&val, __data); \
}

#define VA_NVC097_SET_FRONT_POLYGON_MODE V_NVC097_SET_FRONT_POLYGON_MODE

#define P_NVC097_SET_FRONT_POLYGON_MODE(push, args...) do { \
    UNUSED uint32_t V_POINT = NVC097_SET_FRONT_POLYGON_MODE_V_POINT; \
    UNUSED uint32_t V_LINE = NVC097_SET_FRONT_POLYGON_MODE_V_LINE; \
    UNUSED uint32_t V_FILL = NVC097_SET_FRONT_POLYGON_MODE_V_FILL; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FRONT_POLYGON_MODE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FRONT_POLYGON_MODE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_POLYGON_MODE {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_POLYGON_MODE(uint32_t *val_out, struct nv_nvc097_SET_BACK_POLYGON_MODE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BACK_POLYGON_MODE(val, args...) { \
    UNUSED uint32_t V_POINT = NVC097_SET_BACK_POLYGON_MODE_V_POINT; \
    UNUSED uint32_t V_LINE = NVC097_SET_BACK_POLYGON_MODE_V_LINE; \
    UNUSED uint32_t V_FILL = NVC097_SET_BACK_POLYGON_MODE_V_FILL; \
    struct nv_nvc097_SET_BACK_POLYGON_MODE __data = { .v = (args) }; \
    __NVC097_SET_BACK_POLYGON_MODE(&val, __data); \
}

#define VA_NVC097_SET_BACK_POLYGON_MODE V_NVC097_SET_BACK_POLYGON_MODE

#define P_NVC097_SET_BACK_POLYGON_MODE(push, args...) do { \
    UNUSED uint32_t V_POINT = NVC097_SET_BACK_POLYGON_MODE_V_POINT; \
    UNUSED uint32_t V_LINE = NVC097_SET_BACK_POLYGON_MODE_V_LINE; \
    UNUSED uint32_t V_FILL = NVC097_SET_BACK_POLYGON_MODE_V_FILL; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_POLYGON_MODE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_POLYGON_MODE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POLY_SMOOTH {
    uint32_t enable;
};

static inline void
__NVC097_SET_POLY_SMOOTH(uint32_t *val_out, struct nv_nvc097_SET_POLY_SMOOTH st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_POLY_SMOOTH(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_SMOOTH_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_SMOOTH_ENABLE_TRUE; \
    struct nv_nvc097_SET_POLY_SMOOTH __data = { .enable = (args) }; \
    __NVC097_SET_POLY_SMOOTH(&val, __data); \
}

#define VA_NVC097_SET_POLY_SMOOTH V_NVC097_SET_POLY_SMOOTH

#define P_NVC097_SET_POLY_SMOOTH(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_SMOOTH_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_SMOOTH_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POLY_SMOOTH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POLY_SMOOTH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_MARK {
    uint32_t ieee_clean;
};

static inline void
__NVC097_SET_ZT_MARK(uint32_t *val_out, struct nv_nvc097_SET_ZT_MARK st)
{
    uint32_t val = 0;
    
    assert(st.ieee_clean < (UINT64_C(1) << 1));
    val |= st.ieee_clean << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZT_MARK(val, args...) { \
    UNUSED uint32_t IEEE_CLEAN_FALSE = NVC097_SET_ZT_MARK_IEEE_CLEAN_FALSE; \
    UNUSED uint32_t IEEE_CLEAN_TRUE = NVC097_SET_ZT_MARK_IEEE_CLEAN_TRUE; \
    struct nv_nvc097_SET_ZT_MARK __data = { .ieee_clean = (args) }; \
    __NVC097_SET_ZT_MARK(&val, __data); \
}

#define VA_NVC097_SET_ZT_MARK V_NVC097_SET_ZT_MARK

#define P_NVC097_SET_ZT_MARK(push, args...) do { \
    UNUSED uint32_t IEEE_CLEAN_FALSE = NVC097_SET_ZT_MARK_IEEE_CLEAN_FALSE; \
    UNUSED uint32_t IEEE_CLEAN_TRUE = NVC097_SET_ZT_MARK_IEEE_CLEAN_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_MARK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_MARK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_DIR_FORMAT {
    uint32_t zdir;
    uint32_t zformat;
};

static inline void
__NVC097_SET_ZCULL_DIR_FORMAT(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_DIR_FORMAT st)
{
    uint32_t val = 0;
    
    assert(st.zdir < (UINT64_C(1) << 16));
    val |= st.zdir << 0;
    
    assert(st.zformat < (UINT64_C(1) << 16));
    val |= st.zformat << 16;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_DIR_FORMAT(val, args...) { \
    UNUSED uint32_t ZDIR_LESS = NVC097_SET_ZCULL_DIR_FORMAT_ZDIR_LESS; \
    UNUSED uint32_t ZDIR_GREATER = NVC097_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER; \
    UNUSED uint32_t ZFORMAT_MSB = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB; \
    UNUSED uint32_t ZFORMAT_FP = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP; \
    UNUSED uint32_t ZFORMAT_ZTRICK = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK; \
    UNUSED uint32_t ZFORMAT_ZF32_1 = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1; \
    struct nv_nvc097_SET_ZCULL_DIR_FORMAT __data = args; \
    __NVC097_SET_ZCULL_DIR_FORMAT(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_DIR_FORMAT V_NVC097_SET_ZCULL_DIR_FORMAT

#define P_NVC097_SET_ZCULL_DIR_FORMAT(push, args...) do { \
    UNUSED uint32_t ZDIR_LESS = NVC097_SET_ZCULL_DIR_FORMAT_ZDIR_LESS; \
    UNUSED uint32_t ZDIR_GREATER = NVC097_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER; \
    UNUSED uint32_t ZFORMAT_MSB = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB; \
    UNUSED uint32_t ZFORMAT_FP = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP; \
    UNUSED uint32_t ZFORMAT_ZTRICK = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK; \
    UNUSED uint32_t ZFORMAT_ZF32_1 = NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_DIR_FORMAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_DIR_FORMAT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POLY_OFFSET_POINT {
    uint32_t enable;
};

static inline void
__NVC097_SET_POLY_OFFSET_POINT(uint32_t *val_out, struct nv_nvc097_SET_POLY_OFFSET_POINT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_POLY_OFFSET_POINT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_OFFSET_POINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_OFFSET_POINT_ENABLE_TRUE; \
    struct nv_nvc097_SET_POLY_OFFSET_POINT __data = { .enable = (args) }; \
    __NVC097_SET_POLY_OFFSET_POINT(&val, __data); \
}

#define VA_NVC097_SET_POLY_OFFSET_POINT V_NVC097_SET_POLY_OFFSET_POINT

#define P_NVC097_SET_POLY_OFFSET_POINT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_OFFSET_POINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_OFFSET_POINT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POLY_OFFSET_POINT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POLY_OFFSET_POINT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POLY_OFFSET_LINE {
    uint32_t enable;
};

static inline void
__NVC097_SET_POLY_OFFSET_LINE(uint32_t *val_out, struct nv_nvc097_SET_POLY_OFFSET_LINE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_POLY_OFFSET_LINE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_OFFSET_LINE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_OFFSET_LINE_ENABLE_TRUE; \
    struct nv_nvc097_SET_POLY_OFFSET_LINE __data = { .enable = (args) }; \
    __NVC097_SET_POLY_OFFSET_LINE(&val, __data); \
}

#define VA_NVC097_SET_POLY_OFFSET_LINE V_NVC097_SET_POLY_OFFSET_LINE

#define P_NVC097_SET_POLY_OFFSET_LINE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_OFFSET_LINE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_OFFSET_LINE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POLY_OFFSET_LINE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POLY_OFFSET_LINE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POLY_OFFSET_FILL {
    uint32_t enable;
};

static inline void
__NVC097_SET_POLY_OFFSET_FILL(uint32_t *val_out, struct nv_nvc097_SET_POLY_OFFSET_FILL st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_POLY_OFFSET_FILL(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_OFFSET_FILL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_OFFSET_FILL_ENABLE_TRUE; \
    struct nv_nvc097_SET_POLY_OFFSET_FILL __data = { .enable = (args) }; \
    __NVC097_SET_POLY_OFFSET_FILL(&val, __data); \
}

#define VA_NVC097_SET_POLY_OFFSET_FILL V_NVC097_SET_POLY_OFFSET_FILL

#define P_NVC097_SET_POLY_OFFSET_FILL(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLY_OFFSET_FILL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLY_OFFSET_FILL_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POLY_OFFSET_FILL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POLY_OFFSET_FILL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PATCH {
    uint32_t size;
};

static inline void
__NVC097_SET_PATCH(uint32_t *val_out, struct nv_nvc097_SET_PATCH st)
{
    uint32_t val = 0;
    
    assert(st.size < (UINT64_C(1) << 8));
    val |= st.size << 0;
    *val_out = val;
}

#define V_NVC097_SET_PATCH(val, args...) { \
    struct nv_nvc097_SET_PATCH __data = { .size = (args) }; \
    __NVC097_SET_PATCH(&val, __data); \
}

#define VA_NVC097_SET_PATCH V_NVC097_SET_PATCH

#define P_NVC097_SET_PATCH(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PATCH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PATCH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ITERATED_BLEND {
    uint32_t enable;
    uint32_t alpha_enable;
};

static inline void
__NVC097_SET_ITERATED_BLEND(uint32_t *val_out, struct nv_nvc097_SET_ITERATED_BLEND st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.alpha_enable < (UINT64_C(1) << 1));
    val |= st.alpha_enable << 1;
    *val_out = val;
}

#define V_NVC097_SET_ITERATED_BLEND(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ITERATED_BLEND_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ITERATED_BLEND_ENABLE_TRUE; \
    UNUSED uint32_t ALPHA_ENABLE_FALSE = NVC097_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE; \
    UNUSED uint32_t ALPHA_ENABLE_TRUE = NVC097_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE; \
    struct nv_nvc097_SET_ITERATED_BLEND __data = args; \
    __NVC097_SET_ITERATED_BLEND(&val, __data); \
}

#define VA_NVC097_SET_ITERATED_BLEND V_NVC097_SET_ITERATED_BLEND

#define P_NVC097_SET_ITERATED_BLEND(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ITERATED_BLEND_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ITERATED_BLEND_ENABLE_TRUE; \
    UNUSED uint32_t ALPHA_ENABLE_FALSE = NVC097_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE; \
    UNUSED uint32_t ALPHA_ENABLE_TRUE = NVC097_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ITERATED_BLEND(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ITERATED_BLEND, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ITERATED_BLEND_PASS {
    uint32_t count;
};

static inline void
__NVC097_SET_ITERATED_BLEND_PASS(uint32_t *val_out, struct nv_nvc097_SET_ITERATED_BLEND_PASS st)
{
    uint32_t val = 0;
    
    assert(st.count < (UINT64_C(1) << 8));
    val |= st.count << 0;
    *val_out = val;
}

#define V_NVC097_SET_ITERATED_BLEND_PASS(val, args...) { \
    struct nv_nvc097_SET_ITERATED_BLEND_PASS __data = { .count = (args) }; \
    __NVC097_SET_ITERATED_BLEND_PASS(&val, __data); \
}

#define VA_NVC097_SET_ITERATED_BLEND_PASS V_NVC097_SET_ITERATED_BLEND_PASS

#define P_NVC097_SET_ITERATED_BLEND_PASS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ITERATED_BLEND_PASS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ITERATED_BLEND_PASS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_CRITERION {
    uint32_t sfunc;
    uint32_t no_invalidate;
    uint32_t force_match;
    uint32_t sref;
    uint32_t smask;
};

static inline void
__NVC097_SET_ZCULL_CRITERION(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_CRITERION st)
{
    uint32_t val = 0;
    
    assert(st.sfunc < (UINT64_C(1) << 8));
    val |= st.sfunc << 0;
    
    assert(st.no_invalidate < (UINT64_C(1) << 1));
    val |= st.no_invalidate << 8;
    
    assert(st.force_match < (UINT64_C(1) << 1));
    val |= st.force_match << 9;
    
    assert(st.sref < (UINT64_C(1) << 8));
    val |= st.sref << 16;
    
    assert(st.smask < (UINT64_C(1) << 8));
    val |= st.smask << 24;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_CRITERION(val, args...) { \
    UNUSED uint32_t SFUNC_NEVER = NVC097_SET_ZCULL_CRITERION_SFUNC_NEVER; \
    UNUSED uint32_t SFUNC_LESS = NVC097_SET_ZCULL_CRITERION_SFUNC_LESS; \
    UNUSED uint32_t SFUNC_EQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_EQUAL; \
    UNUSED uint32_t SFUNC_LEQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_LEQUAL; \
    UNUSED uint32_t SFUNC_GREATER = NVC097_SET_ZCULL_CRITERION_SFUNC_GREATER; \
    UNUSED uint32_t SFUNC_NOTEQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL; \
    UNUSED uint32_t SFUNC_GEQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_GEQUAL; \
    UNUSED uint32_t SFUNC_ALWAYS = NVC097_SET_ZCULL_CRITERION_SFUNC_ALWAYS; \
    UNUSED uint32_t NO_INVALIDATE_FALSE = NVC097_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE; \
    UNUSED uint32_t NO_INVALIDATE_TRUE = NVC097_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE; \
    UNUSED uint32_t FORCE_MATCH_FALSE = NVC097_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE; \
    UNUSED uint32_t FORCE_MATCH_TRUE = NVC097_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE; \
    struct nv_nvc097_SET_ZCULL_CRITERION __data = args; \
    __NVC097_SET_ZCULL_CRITERION(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_CRITERION V_NVC097_SET_ZCULL_CRITERION

#define P_NVC097_SET_ZCULL_CRITERION(push, args...) do { \
    UNUSED uint32_t SFUNC_NEVER = NVC097_SET_ZCULL_CRITERION_SFUNC_NEVER; \
    UNUSED uint32_t SFUNC_LESS = NVC097_SET_ZCULL_CRITERION_SFUNC_LESS; \
    UNUSED uint32_t SFUNC_EQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_EQUAL; \
    UNUSED uint32_t SFUNC_LEQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_LEQUAL; \
    UNUSED uint32_t SFUNC_GREATER = NVC097_SET_ZCULL_CRITERION_SFUNC_GREATER; \
    UNUSED uint32_t SFUNC_NOTEQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL; \
    UNUSED uint32_t SFUNC_GEQUAL = NVC097_SET_ZCULL_CRITERION_SFUNC_GEQUAL; \
    UNUSED uint32_t SFUNC_ALWAYS = NVC097_SET_ZCULL_CRITERION_SFUNC_ALWAYS; \
    UNUSED uint32_t NO_INVALIDATE_FALSE = NVC097_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE; \
    UNUSED uint32_t NO_INVALIDATE_TRUE = NVC097_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE; \
    UNUSED uint32_t FORCE_MATCH_FALSE = NVC097_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE; \
    UNUSED uint32_t FORCE_MATCH_TRUE = NVC097_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_CRITERION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_CRITERION, nvk_p_ret); \
} while(0)

struct nv_nvc097_PIXEL_SHADER_BARRIER {
    uint32_t sysmembar_enable;
};

static inline void
__NVC097_PIXEL_SHADER_BARRIER(uint32_t *val_out, struct nv_nvc097_PIXEL_SHADER_BARRIER st)
{
    uint32_t val = 0;
    
    assert(st.sysmembar_enable < (UINT64_C(1) << 1));
    val |= st.sysmembar_enable << 0;
    *val_out = val;
}

#define V_NVC097_PIXEL_SHADER_BARRIER(val, args...) { \
    UNUSED uint32_t SYSMEMBAR_ENABLE_FALSE = NVC097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE; \
    UNUSED uint32_t SYSMEMBAR_ENABLE_TRUE = NVC097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE; \
    struct nv_nvc097_PIXEL_SHADER_BARRIER __data = { .sysmembar_enable = (args) }; \
    __NVC097_PIXEL_SHADER_BARRIER(&val, __data); \
}

#define VA_NVC097_PIXEL_SHADER_BARRIER V_NVC097_PIXEL_SHADER_BARRIER

#define P_NVC097_PIXEL_SHADER_BARRIER(push, args...) do { \
    UNUSED uint32_t SYSMEMBAR_ENABLE_FALSE = NVC097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE; \
    UNUSED uint32_t SYSMEMBAR_ENABLE_TRUE = NVC097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_PIXEL_SHADER_BARRIER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PIXEL_SHADER_BARRIER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SM_TIMEOUT_INTERVAL {
    uint32_t counter_bit;
};

static inline void
__NVC097_SET_SM_TIMEOUT_INTERVAL(uint32_t *val_out, struct nv_nvc097_SET_SM_TIMEOUT_INTERVAL st)
{
    uint32_t val = 0;
    
    assert(st.counter_bit < (UINT64_C(1) << 6));
    val |= st.counter_bit << 0;
    *val_out = val;
}

#define V_NVC097_SET_SM_TIMEOUT_INTERVAL(val, args...) { \
    struct nv_nvc097_SET_SM_TIMEOUT_INTERVAL __data = { .counter_bit = (args) }; \
    __NVC097_SET_SM_TIMEOUT_INTERVAL(&val, __data); \
}

#define VA_NVC097_SET_SM_TIMEOUT_INTERVAL V_NVC097_SET_SM_TIMEOUT_INTERVAL

#define P_NVC097_SET_SM_TIMEOUT_INTERVAL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SM_TIMEOUT_INTERVAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SM_TIMEOUT_INTERVAL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY {
    uint32_t enable;
};

static inline void
__NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY(uint32_t *val_out, struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE; \
    struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY __data = { .enable = (args) }; \
    __NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY(&val, __data); \
}

#define VA_NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY V_NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY

#define P_NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER {
    uint32_t v;
};

static inline void
__NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER(uint32_t *val_out, struct nv_nvc097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER(val, args...) { \
    struct nv_nvc097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER __data = { .v = (args) }; \
    __NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER(&val, __data); \
}

#define VA_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER V_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER

#define P_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_ITERATED_BLEND_INSTRUCTION {
    uint32_t test_cc;
    uint32_t operation;
    uint32_t constant_input_select;
    uint32_t operand_a_select;
    uint32_t operand_b_select;
    uint32_t operand_c_select;
    uint32_t operand_d_select;
    uint32_t output_swizzle;
    uint32_t output_write_mask;
    uint32_t pass_output;
    uint32_t set_cc;
};

static inline void
__NVC097_LOAD_ITERATED_BLEND_INSTRUCTION(uint32_t *val_out, struct nv_nvc097_LOAD_ITERATED_BLEND_INSTRUCTION st)
{
    uint32_t val = 0;
    
    assert(st.test_cc < (UINT64_C(1) << 3));
    val |= st.test_cc << 0;
    
    assert(st.operation < (UINT64_C(1) << 3));
    val |= st.operation << 3;
    
    assert(st.constant_input_select < (UINT64_C(1) << 3));
    val |= st.constant_input_select << 6;
    
    assert(st.operand_a_select < (UINT64_C(1) << 3));
    val |= st.operand_a_select << 9;
    
    assert(st.operand_b_select < (UINT64_C(1) << 4));
    val |= st.operand_b_select << 12;
    
    assert(st.operand_c_select < (UINT64_C(1) << 3));
    val |= st.operand_c_select << 16;
    
    assert(st.operand_d_select < (UINT64_C(1) << 4));
    val |= st.operand_d_select << 19;
    
    assert(st.output_swizzle < (UINT64_C(1) << 3));
    val |= st.output_swizzle << 23;
    
    assert(st.output_write_mask < (UINT64_C(1) << 2));
    val |= st.output_write_mask << 26;
    
    assert(st.pass_output < (UINT64_C(1) << 2));
    val |= st.pass_output << 28;
    
    assert(st.set_cc < (UINT64_C(1) << 1));
    val |= st.set_cc << 31;
    *val_out = val;
}

#define V_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION(val, args...) { \
    UNUSED uint32_t TEST_CC_FALSE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE; \
    UNUSED uint32_t TEST_CC_TRUE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE; \
    UNUSED uint32_t TEST_CC_EQ = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ; \
    UNUSED uint32_t TEST_CC_NE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE; \
    UNUSED uint32_t TEST_CC_LT = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT; \
    UNUSED uint32_t TEST_CC_LE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE; \
    UNUSED uint32_t TEST_CC_GT = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT; \
    UNUSED uint32_t TEST_CC_GE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE; \
    UNUSED uint32_t OPERATION_ADD_PRODUCTS = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS; \
    UNUSED uint32_t OPERATION_SUB_PRODUCTS = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS; \
    UNUSED uint32_t OPERATION_MIN = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN; \
    UNUSED uint32_t OPERATION_MAX = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX; \
    UNUSED uint32_t OPERATION_RCP = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP; \
    UNUSED uint32_t OPERATION_ADD = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD; \
    UNUSED uint32_t OPERATION_SUBTRACT = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT0 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT1 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT2 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT3 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT4 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT5 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT6 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT7 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7; \
    UNUSED uint32_t OPERAND_A_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_A_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_A_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_ZERO = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO; \
    UNUSED uint32_t OPERAND_B_SELECT_ONE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE; \
    UNUSED uint32_t OPERAND_B_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_ONE_MINUS_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_ONE_MINUS_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_CONSTANT_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_ZERO_A_TIMES_B = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B; \
    UNUSED uint32_t OPERAND_C_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_C_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_C_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_ZERO = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO; \
    UNUSED uint32_t OPERAND_D_SELECT_ONE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE; \
    UNUSED uint32_t OPERAND_D_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_ONE_MINUS_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_ONE_MINUS_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_CONSTANT_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_ZERO_C_TIMES_D = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D; \
    UNUSED uint32_t OUTPUT_SWIZZLE_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB; \
    UNUSED uint32_t OUTPUT_SWIZZLE_GBR = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR; \
    UNUSED uint32_t OUTPUT_SWIZZLE_RRR = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR; \
    UNUSED uint32_t OUTPUT_SWIZZLE_GGG = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG; \
    UNUSED uint32_t OUTPUT_SWIZZLE_BBB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB; \
    UNUSED uint32_t OUTPUT_SWIZZLE_R_TO_A = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_R_ONLY = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_G_ONLY = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_B_ONLY = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY; \
    UNUSED uint32_t PASS_OUTPUT_TEMP0 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0; \
    UNUSED uint32_t PASS_OUTPUT_TEMP1 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1; \
    UNUSED uint32_t PASS_OUTPUT_TEMP2 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2; \
    UNUSED uint32_t PASS_OUTPUT_NONE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE; \
    UNUSED uint32_t SET_CC_FALSE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE; \
    UNUSED uint32_t SET_CC_TRUE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE; \
    struct nv_nvc097_LOAD_ITERATED_BLEND_INSTRUCTION __data = args; \
    __NVC097_LOAD_ITERATED_BLEND_INSTRUCTION(&val, __data); \
}

#define VA_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION V_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION

#define P_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION(push, args...) do { \
    UNUSED uint32_t TEST_CC_FALSE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE; \
    UNUSED uint32_t TEST_CC_TRUE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE; \
    UNUSED uint32_t TEST_CC_EQ = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ; \
    UNUSED uint32_t TEST_CC_NE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE; \
    UNUSED uint32_t TEST_CC_LT = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT; \
    UNUSED uint32_t TEST_CC_LE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE; \
    UNUSED uint32_t TEST_CC_GT = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT; \
    UNUSED uint32_t TEST_CC_GE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE; \
    UNUSED uint32_t OPERATION_ADD_PRODUCTS = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS; \
    UNUSED uint32_t OPERATION_SUB_PRODUCTS = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS; \
    UNUSED uint32_t OPERATION_MIN = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN; \
    UNUSED uint32_t OPERATION_MAX = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX; \
    UNUSED uint32_t OPERATION_RCP = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP; \
    UNUSED uint32_t OPERATION_ADD = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD; \
    UNUSED uint32_t OPERATION_SUBTRACT = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT0 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT1 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT2 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT3 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT4 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT5 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT6 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6; \
    UNUSED uint32_t CONSTANT_INPUT_SELECT_CONSTANT7 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7; \
    UNUSED uint32_t OPERAND_A_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_A_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_A_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_A_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_ZERO = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO; \
    UNUSED uint32_t OPERAND_B_SELECT_ONE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE; \
    UNUSED uint32_t OPERAND_B_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_ONE_MINUS_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_ONE_MINUS_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA; \
    UNUSED uint32_t OPERAND_B_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_CONSTANT_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB; \
    UNUSED uint32_t OPERAND_B_SELECT_ZERO_A_TIMES_B = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B; \
    UNUSED uint32_t OPERAND_C_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_C_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_C_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_C_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_ZERO = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO; \
    UNUSED uint32_t OPERAND_D_SELECT_ONE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE; \
    UNUSED uint32_t OPERAND_D_SELECT_SRC_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_ONE_MINUS_SRC_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_DEST_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_ONE_MINUS_DEST_AAA = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA; \
    UNUSED uint32_t OPERAND_D_SELECT_TEMP0_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_TEMP1_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_TEMP2_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_PBR_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_CONSTANT_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB; \
    UNUSED uint32_t OPERAND_D_SELECT_ZERO_C_TIMES_D = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D; \
    UNUSED uint32_t OUTPUT_SWIZZLE_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB; \
    UNUSED uint32_t OUTPUT_SWIZZLE_GBR = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR; \
    UNUSED uint32_t OUTPUT_SWIZZLE_RRR = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR; \
    UNUSED uint32_t OUTPUT_SWIZZLE_GGG = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG; \
    UNUSED uint32_t OUTPUT_SWIZZLE_BBB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB; \
    UNUSED uint32_t OUTPUT_SWIZZLE_R_TO_A = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_RGB = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_R_ONLY = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_G_ONLY = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY; \
    UNUSED uint32_t OUTPUT_WRITE_MASK_B_ONLY = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY; \
    UNUSED uint32_t PASS_OUTPUT_TEMP0 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0; \
    UNUSED uint32_t PASS_OUTPUT_TEMP1 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1; \
    UNUSED uint32_t PASS_OUTPUT_TEMP2 = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2; \
    UNUSED uint32_t PASS_OUTPUT_NONE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE; \
    UNUSED uint32_t SET_CC_FALSE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE; \
    UNUSED uint32_t SET_CC_TRUE = NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_ITERATED_BLEND_INSTRUCTION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_ITERATED_BLEND_INSTRUCTION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_WINDOW_OFFSET_X {
    uint32_t v;
};

static inline void
__NVC097_SET_WINDOW_OFFSET_X(uint32_t *val_out, struct nv_nvc097_SET_WINDOW_OFFSET_X st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 17));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_WINDOW_OFFSET_X(val, args...) { \
    struct nv_nvc097_SET_WINDOW_OFFSET_X __data = { .v = (args) }; \
    __NVC097_SET_WINDOW_OFFSET_X(&val, __data); \
}

#define VA_NVC097_SET_WINDOW_OFFSET_X V_NVC097_SET_WINDOW_OFFSET_X

#define P_NVC097_SET_WINDOW_OFFSET_X(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_WINDOW_OFFSET_X(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_WINDOW_OFFSET_X, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_WINDOW_OFFSET_Y {
    uint32_t v;
};

static inline void
__NVC097_SET_WINDOW_OFFSET_Y(uint32_t *val_out, struct nv_nvc097_SET_WINDOW_OFFSET_Y st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 18));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_WINDOW_OFFSET_Y(val, args...) { \
    struct nv_nvc097_SET_WINDOW_OFFSET_Y __data = { .v = (args) }; \
    __NVC097_SET_WINDOW_OFFSET_Y(&val, __data); \
}

#define VA_NVC097_SET_WINDOW_OFFSET_Y V_NVC097_SET_WINDOW_OFFSET_Y

#define P_NVC097_SET_WINDOW_OFFSET_Y(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_WINDOW_OFFSET_Y(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_WINDOW_OFFSET_Y, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SCISSOR_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_SCISSOR_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_SCISSOR_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_SCISSOR_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_SCISSOR_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_SCISSOR_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_SCISSOR_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_SCISSOR_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_SCISSOR_ENABLE(i) V_NVC097_SET_SCISSOR_ENABLE

#define P_NVC097_SET_SCISSOR_ENABLE(push, idx, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_SCISSOR_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_SCISSOR_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SCISSOR_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SCISSOR_ENABLE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SCISSOR_HORIZONTAL {
    uint32_t xmin;
    uint32_t xmax;
};

static inline void
__NVC097_SET_SCISSOR_HORIZONTAL(uint32_t *val_out, struct nv_nvc097_SET_SCISSOR_HORIZONTAL st)
{
    uint32_t val = 0;
    
    assert(st.xmin < (UINT64_C(1) << 16));
    val |= st.xmin << 0;
    
    assert(st.xmax < (UINT64_C(1) << 16));
    val |= st.xmax << 16;
    *val_out = val;
}

#define V_NVC097_SET_SCISSOR_HORIZONTAL(val, args...) { \
    struct nv_nvc097_SET_SCISSOR_HORIZONTAL __data = args; \
    __NVC097_SET_SCISSOR_HORIZONTAL(&val, __data); \
}

#define VA_NVC097_SET_SCISSOR_HORIZONTAL(i) V_NVC097_SET_SCISSOR_HORIZONTAL

#define P_NVC097_SET_SCISSOR_HORIZONTAL(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SCISSOR_HORIZONTAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SCISSOR_HORIZONTAL(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SCISSOR_VERTICAL {
    uint32_t ymin;
    uint32_t ymax;
};

static inline void
__NVC097_SET_SCISSOR_VERTICAL(uint32_t *val_out, struct nv_nvc097_SET_SCISSOR_VERTICAL st)
{
    uint32_t val = 0;
    
    assert(st.ymin < (UINT64_C(1) << 16));
    val |= st.ymin << 0;
    
    assert(st.ymax < (UINT64_C(1) << 16));
    val |= st.ymax << 16;
    *val_out = val;
}

#define V_NVC097_SET_SCISSOR_VERTICAL(val, args...) { \
    struct nv_nvc097_SET_SCISSOR_VERTICAL __data = args; \
    __NVC097_SET_SCISSOR_VERTICAL(&val, __data); \
}

#define VA_NVC097_SET_SCISSOR_VERTICAL(i) V_NVC097_SET_SCISSOR_VERTICAL

#define P_NVC097_SET_SCISSOR_VERTICAL(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SCISSOR_VERTICAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SCISSOR_VERTICAL(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SELECT_MAXWELL_TEXTURE_HEADERS {
    uint32_t v;
};

static inline void
__NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS(uint32_t *val_out, struct nv_nvc097_SET_SELECT_MAXWELL_TEXTURE_HEADERS st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE; \
    struct nv_nvc097_SET_SELECT_MAXWELL_TEXTURE_HEADERS __data = { .v = (args) }; \
    __NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS(&val, __data); \
}

#define VA_NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS V_NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS

#define P_NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VPC_PERF_KNOB {
    uint32_t culled_small_lines;
    uint32_t culled_small_triangles;
    uint32_t nonculled_lines_and_points;
    uint32_t nonculled_triangles;
};

static inline void
__NVC097_SET_VPC_PERF_KNOB(uint32_t *val_out, struct nv_nvc097_SET_VPC_PERF_KNOB st)
{
    uint32_t val = 0;
    
    assert(st.culled_small_lines < (UINT64_C(1) << 8));
    val |= st.culled_small_lines << 0;
    
    assert(st.culled_small_triangles < (UINT64_C(1) << 8));
    val |= st.culled_small_triangles << 8;
    
    assert(st.nonculled_lines_and_points < (UINT64_C(1) << 8));
    val |= st.nonculled_lines_and_points << 16;
    
    assert(st.nonculled_triangles < (UINT64_C(1) << 8));
    val |= st.nonculled_triangles << 24;
    *val_out = val;
}

#define V_NVC097_SET_VPC_PERF_KNOB(val, args...) { \
    struct nv_nvc097_SET_VPC_PERF_KNOB __data = args; \
    __NVC097_SET_VPC_PERF_KNOB(&val, __data); \
}

#define VA_NVC097_SET_VPC_PERF_KNOB V_NVC097_SET_VPC_PERF_KNOB

#define P_NVC097_SET_VPC_PERF_KNOB(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VPC_PERF_KNOB(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VPC_PERF_KNOB, nvk_p_ret); \
} while(0)

struct nv_nvc097_PM_LOCAL_TRIGGER {
    uint32_t bookmark;
};

static inline void
__NVC097_PM_LOCAL_TRIGGER(uint32_t *val_out, struct nv_nvc097_PM_LOCAL_TRIGGER st)
{
    uint32_t val = 0;
    
    assert(st.bookmark < (UINT64_C(1) << 16));
    val |= st.bookmark << 0;
    *val_out = val;
}

#define V_NVC097_PM_LOCAL_TRIGGER(val, args...) { \
    struct nv_nvc097_PM_LOCAL_TRIGGER __data = { .bookmark = (args) }; \
    __NVC097_PM_LOCAL_TRIGGER(&val, __data); \
}

#define VA_NVC097_PM_LOCAL_TRIGGER V_NVC097_PM_LOCAL_TRIGGER

#define P_NVC097_PM_LOCAL_TRIGGER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PM_LOCAL_TRIGGER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PM_LOCAL_TRIGGER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POST_Z_PS_IMASK {
    uint32_t enable;
};

static inline void
__NVC097_SET_POST_Z_PS_IMASK(uint32_t *val_out, struct nv_nvc097_SET_POST_Z_PS_IMASK st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_POST_Z_PS_IMASK(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POST_Z_PS_IMASK_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POST_Z_PS_IMASK_ENABLE_TRUE; \
    struct nv_nvc097_SET_POST_Z_PS_IMASK __data = { .enable = (args) }; \
    __NVC097_SET_POST_Z_PS_IMASK(&val, __data); \
}

#define VA_NVC097_SET_POST_Z_PS_IMASK V_NVC097_SET_POST_Z_PS_IMASK

#define P_NVC097_SET_POST_Z_PS_IMASK(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POST_Z_PS_IMASK_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POST_Z_PS_IMASK_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POST_Z_PS_IMASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POST_Z_PS_IMASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING {
    uint32_t enable;
};

static inline void
__NVC097_SET_CONSTANT_COLOR_RENDERING(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_COLOR_RENDERING(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE; \
    struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING __data = { .enable = (args) }; \
    __NVC097_SET_CONSTANT_COLOR_RENDERING(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_COLOR_RENDERING V_NVC097_SET_CONSTANT_COLOR_RENDERING

#define P_NVC097_SET_CONSTANT_COLOR_RENDERING(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_COLOR_RENDERING(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_COLOR_RENDERING, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_RED {
    uint32_t v;
};

static inline void
__NVC097_SET_CONSTANT_COLOR_RENDERING_RED(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_RED st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_COLOR_RENDERING_RED(val, args...) { \
    struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_RED __data = { .v = (args) }; \
    __NVC097_SET_CONSTANT_COLOR_RENDERING_RED(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_COLOR_RENDERING_RED V_NVC097_SET_CONSTANT_COLOR_RENDERING_RED

#define P_NVC097_SET_CONSTANT_COLOR_RENDERING_RED(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_COLOR_RENDERING_RED(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_COLOR_RENDERING_RED, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_GREEN {
    uint32_t v;
};

static inline void
__NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_GREEN st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN(val, args...) { \
    struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_GREEN __data = { .v = (args) }; \
    __NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN V_NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN

#define P_NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_BLUE {
    uint32_t v;
};

static inline void
__NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_BLUE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE(val, args...) { \
    struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_BLUE __data = { .v = (args) }; \
    __NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE V_NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE

#define P_NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_ALPHA {
    uint32_t v;
};

static inline void
__NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_ALPHA st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA(val, args...) { \
    struct nv_nvc097_SET_CONSTANT_COLOR_RENDERING_ALPHA __data = { .v = (args) }; \
    __NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA V_NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA

#define P_NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_STENCIL_FUNC_REF {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_STENCIL_FUNC_REF(uint32_t *val_out, struct nv_nvc097_SET_BACK_STENCIL_FUNC_REF st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_BACK_STENCIL_FUNC_REF(val, args...) { \
    struct nv_nvc097_SET_BACK_STENCIL_FUNC_REF __data = { .v = (args) }; \
    __NVC097_SET_BACK_STENCIL_FUNC_REF(&val, __data); \
}

#define VA_NVC097_SET_BACK_STENCIL_FUNC_REF V_NVC097_SET_BACK_STENCIL_FUNC_REF

#define P_NVC097_SET_BACK_STENCIL_FUNC_REF(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_STENCIL_FUNC_REF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_STENCIL_FUNC_REF, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_STENCIL_MASK {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_STENCIL_MASK(uint32_t *val_out, struct nv_nvc097_SET_BACK_STENCIL_MASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_BACK_STENCIL_MASK(val, args...) { \
    struct nv_nvc097_SET_BACK_STENCIL_MASK __data = { .v = (args) }; \
    __NVC097_SET_BACK_STENCIL_MASK(&val, __data); \
}

#define VA_NVC097_SET_BACK_STENCIL_MASK V_NVC097_SET_BACK_STENCIL_MASK

#define P_NVC097_SET_BACK_STENCIL_MASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_STENCIL_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_STENCIL_MASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_STENCIL_FUNC_MASK {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_STENCIL_FUNC_MASK(uint32_t *val_out, struct nv_nvc097_SET_BACK_STENCIL_FUNC_MASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_BACK_STENCIL_FUNC_MASK(val, args...) { \
    struct nv_nvc097_SET_BACK_STENCIL_FUNC_MASK __data = { .v = (args) }; \
    __NVC097_SET_BACK_STENCIL_FUNC_MASK(&val, __data); \
}

#define VA_NVC097_SET_BACK_STENCIL_FUNC_MASK V_NVC097_SET_BACK_STENCIL_FUNC_MASK

#define P_NVC097_SET_BACK_STENCIL_FUNC_MASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_STENCIL_FUNC_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_STENCIL_FUNC_MASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_SUBSTITUTE_A {
    uint32_t address_upper;
};

static inline void
__NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_SUBSTITUTE_A st)
{
    uint32_t val = 0;
    
    assert(st.address_upper < (UINT64_C(1) << 8));
    val |= st.address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_SUBSTITUTE_A __data = { .address_upper = (args) }; \
    __NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A V_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A

#define P_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_SUBSTITUTE_B {
    uint32_t address_lower;
};

static inline void
__NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_SUBSTITUTE_B st)
{
    uint32_t val = 0;
    
    val |= st.address_lower;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_SUBSTITUTE_B __data = { .address_lower = (args) }; \
    __NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B V_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B

#define P_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LINE_MODE_POLYGON_CLIP {
    uint32_t generated_edge;
};

static inline void
__NVC097_SET_LINE_MODE_POLYGON_CLIP(uint32_t *val_out, struct nv_nvc097_SET_LINE_MODE_POLYGON_CLIP st)
{
    uint32_t val = 0;
    
    assert(st.generated_edge < (UINT64_C(1) << 1));
    val |= st.generated_edge << 0;
    *val_out = val;
}

#define V_NVC097_SET_LINE_MODE_POLYGON_CLIP(val, args...) { \
    UNUSED uint32_t GENERATED_EDGE_DRAW_LINE = NVC097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE; \
    UNUSED uint32_t GENERATED_EDGE_DO_NOT_DRAW_LINE = NVC097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE; \
    struct nv_nvc097_SET_LINE_MODE_POLYGON_CLIP __data = { .generated_edge = (args) }; \
    __NVC097_SET_LINE_MODE_POLYGON_CLIP(&val, __data); \
}

#define VA_NVC097_SET_LINE_MODE_POLYGON_CLIP V_NVC097_SET_LINE_MODE_POLYGON_CLIP

#define P_NVC097_SET_LINE_MODE_POLYGON_CLIP(push, args...) do { \
    UNUSED uint32_t GENERATED_EDGE_DRAW_LINE = NVC097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE; \
    UNUSED uint32_t GENERATED_EDGE_DO_NOT_DRAW_LINE = NVC097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LINE_MODE_POLYGON_CLIP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LINE_MODE_POLYGON_CLIP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SINGLE_CT_WRITE_CONTROL {
    uint32_t enable;
};

static inline void
__NVC097_SET_SINGLE_CT_WRITE_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_SINGLE_CT_WRITE_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_SINGLE_CT_WRITE_CONTROL(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE; \
    struct nv_nvc097_SET_SINGLE_CT_WRITE_CONTROL __data = { .enable = (args) }; \
    __NVC097_SET_SINGLE_CT_WRITE_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_SINGLE_CT_WRITE_CONTROL V_NVC097_SET_SINGLE_CT_WRITE_CONTROL

#define P_NVC097_SET_SINGLE_CT_WRITE_CONTROL(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SINGLE_CT_WRITE_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SINGLE_CT_WRITE_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VTG_WARP_WATERMARKS {
    uint32_t low;
    uint32_t high;
};

static inline void
__NVC097_SET_VTG_WARP_WATERMARKS(uint32_t *val_out, struct nv_nvc097_SET_VTG_WARP_WATERMARKS st)
{
    uint32_t val = 0;
    
    assert(st.low < (UINT64_C(1) << 16));
    val |= st.low << 0;
    
    assert(st.high < (UINT64_C(1) << 16));
    val |= st.high << 16;
    *val_out = val;
}

#define V_NVC097_SET_VTG_WARP_WATERMARKS(val, args...) { \
    struct nv_nvc097_SET_VTG_WARP_WATERMARKS __data = args; \
    __NVC097_SET_VTG_WARP_WATERMARKS(&val, __data); \
}

#define VA_NVC097_SET_VTG_WARP_WATERMARKS V_NVC097_SET_VTG_WARP_WATERMARKS

#define P_NVC097_SET_VTG_WARP_WATERMARKS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VTG_WARP_WATERMARKS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VTG_WARP_WATERMARKS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_BOUNDS_MIN {
    uint32_t v;
};

static inline void
__NVC097_SET_DEPTH_BOUNDS_MIN(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_BOUNDS_MIN st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_BOUNDS_MIN(val, args...) { \
    struct nv_nvc097_SET_DEPTH_BOUNDS_MIN __data = { .v = (args) }; \
    __NVC097_SET_DEPTH_BOUNDS_MIN(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_BOUNDS_MIN V_NVC097_SET_DEPTH_BOUNDS_MIN

#define P_NVC097_SET_DEPTH_BOUNDS_MIN(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_BOUNDS_MIN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_BOUNDS_MIN, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_BOUNDS_MAX {
    uint32_t v;
};

static inline void
__NVC097_SET_DEPTH_BOUNDS_MAX(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_BOUNDS_MAX st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_BOUNDS_MAX(val, args...) { \
    struct nv_nvc097_SET_DEPTH_BOUNDS_MAX __data = { .v = (args) }; \
    __NVC097_SET_DEPTH_BOUNDS_MAX(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_BOUNDS_MAX V_NVC097_SET_DEPTH_BOUNDS_MAX

#define P_NVC097_SET_DEPTH_BOUNDS_MAX(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_BOUNDS_MAX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_BOUNDS_MAX, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SAMPLE_MASK {
    uint32_t raster_out_enable;
    uint32_t color_target_enable;
};

static inline void
__NVC097_SET_SAMPLE_MASK(uint32_t *val_out, struct nv_nvc097_SET_SAMPLE_MASK st)
{
    uint32_t val = 0;
    
    assert(st.raster_out_enable < (UINT64_C(1) << 1));
    val |= st.raster_out_enable << 0;
    
    assert(st.color_target_enable < (UINT64_C(1) << 1));
    val |= st.color_target_enable << 4;
    *val_out = val;
}

#define V_NVC097_SET_SAMPLE_MASK(val, args...) { \
    UNUSED uint32_t RASTER_OUT_ENABLE_FALSE = NVC097_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE; \
    UNUSED uint32_t RASTER_OUT_ENABLE_TRUE = NVC097_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE; \
    UNUSED uint32_t COLOR_TARGET_ENABLE_FALSE = NVC097_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE; \
    UNUSED uint32_t COLOR_TARGET_ENABLE_TRUE = NVC097_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE; \
    struct nv_nvc097_SET_SAMPLE_MASK __data = args; \
    __NVC097_SET_SAMPLE_MASK(&val, __data); \
}

#define VA_NVC097_SET_SAMPLE_MASK V_NVC097_SET_SAMPLE_MASK

#define P_NVC097_SET_SAMPLE_MASK(push, args...) do { \
    UNUSED uint32_t RASTER_OUT_ENABLE_FALSE = NVC097_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE; \
    UNUSED uint32_t RASTER_OUT_ENABLE_TRUE = NVC097_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE; \
    UNUSED uint32_t COLOR_TARGET_ENABLE_FALSE = NVC097_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE; \
    UNUSED uint32_t COLOR_TARGET_ENABLE_TRUE = NVC097_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SAMPLE_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SAMPLE_MASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_TARGET_SAMPLE_MASK {
    uint32_t v;
};

static inline void
__NVC097_SET_COLOR_TARGET_SAMPLE_MASK(uint32_t *val_out, struct nv_nvc097_SET_COLOR_TARGET_SAMPLE_MASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_TARGET_SAMPLE_MASK(val, args...) { \
    struct nv_nvc097_SET_COLOR_TARGET_SAMPLE_MASK __data = { .v = (args) }; \
    __NVC097_SET_COLOR_TARGET_SAMPLE_MASK(&val, __data); \
}

#define VA_NVC097_SET_COLOR_TARGET_SAMPLE_MASK V_NVC097_SET_COLOR_TARGET_SAMPLE_MASK

#define P_NVC097_SET_COLOR_TARGET_SAMPLE_MASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_TARGET_SAMPLE_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_TARGET_SAMPLE_MASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CT_MRT_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_CT_MRT_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_CT_MRT_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_CT_MRT_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_CT_MRT_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_CT_MRT_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_CT_MRT_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_CT_MRT_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_CT_MRT_ENABLE V_NVC097_SET_CT_MRT_ENABLE

#define P_NVC097_SET_CT_MRT_ENABLE(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_CT_MRT_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_CT_MRT_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CT_MRT_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CT_MRT_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_NONMULTISAMPLED_Z {
    uint32_t v;
};

static inline void
__NVC097_SET_NONMULTISAMPLED_Z(uint32_t *val_out, struct nv_nvc097_SET_NONMULTISAMPLED_Z st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_NONMULTISAMPLED_Z(val, args...) { \
    UNUSED uint32_t V_PER_SAMPLE = NVC097_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE; \
    UNUSED uint32_t V_AT_PIXEL_CENTER = NVC097_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER; \
    struct nv_nvc097_SET_NONMULTISAMPLED_Z __data = { .v = (args) }; \
    __NVC097_SET_NONMULTISAMPLED_Z(&val, __data); \
}

#define VA_NVC097_SET_NONMULTISAMPLED_Z V_NVC097_SET_NONMULTISAMPLED_Z

#define P_NVC097_SET_NONMULTISAMPLED_Z(push, args...) do { \
    UNUSED uint32_t V_PER_SAMPLE = NVC097_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE; \
    UNUSED uint32_t V_AT_PIXEL_CENTER = NVC097_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_NONMULTISAMPLED_Z(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_NONMULTISAMPLED_Z, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TIR {
    uint32_t mode;
};

static inline void
__NVC097_SET_TIR(uint32_t *val_out, struct nv_nvc097_SET_TIR st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 2));
    val |= st.mode << 0;
    *val_out = val;
}

#define V_NVC097_SET_TIR(val, args...) { \
    UNUSED uint32_t MODE_DISABLED = NVC097_SET_TIR_MODE_DISABLED; \
    UNUSED uint32_t MODE_RASTER_N_TARGET_M = NVC097_SET_TIR_MODE_RASTER_N_TARGET_M; \
    struct nv_nvc097_SET_TIR __data = { .mode = (args) }; \
    __NVC097_SET_TIR(&val, __data); \
}

#define VA_NVC097_SET_TIR V_NVC097_SET_TIR

#define P_NVC097_SET_TIR(push, args...) do { \
    UNUSED uint32_t MODE_DISABLED = NVC097_SET_TIR_MODE_DISABLED; \
    UNUSED uint32_t MODE_RASTER_N_TARGET_M = NVC097_SET_TIR_MODE_RASTER_N_TARGET_M; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TIR(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TIR, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ANTI_ALIAS_RASTER {
    uint32_t samples;
};

static inline void
__NVC097_SET_ANTI_ALIAS_RASTER(uint32_t *val_out, struct nv_nvc097_SET_ANTI_ALIAS_RASTER st)
{
    uint32_t val = 0;
    
    assert(st.samples < (UINT64_C(1) << 3));
    val |= st.samples << 0;
    *val_out = val;
}

#define V_NVC097_SET_ANTI_ALIAS_RASTER(val, args...) { \
    UNUSED uint32_t SAMPLES_MODE_1X1 = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1; \
    UNUSED uint32_t SAMPLES_MODE_2X2 = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2; \
    UNUSED uint32_t SAMPLES_MODE_4X2_D3D = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D; \
    UNUSED uint32_t SAMPLES_MODE_2X1_D3D = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D; \
    UNUSED uint32_t SAMPLES_MODE_4X4 = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4; \
    struct nv_nvc097_SET_ANTI_ALIAS_RASTER __data = { .samples = (args) }; \
    __NVC097_SET_ANTI_ALIAS_RASTER(&val, __data); \
}

#define VA_NVC097_SET_ANTI_ALIAS_RASTER V_NVC097_SET_ANTI_ALIAS_RASTER

#define P_NVC097_SET_ANTI_ALIAS_RASTER(push, args...) do { \
    UNUSED uint32_t SAMPLES_MODE_1X1 = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1; \
    UNUSED uint32_t SAMPLES_MODE_2X2 = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2; \
    UNUSED uint32_t SAMPLES_MODE_4X2_D3D = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D; \
    UNUSED uint32_t SAMPLES_MODE_2X1_D3D = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D; \
    UNUSED uint32_t SAMPLES_MODE_4X4 = NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ANTI_ALIAS_RASTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ANTI_ALIAS_RASTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SAMPLE_MASK_X0_Y0 {
    uint32_t v;
};

static inline void
__NVC097_SET_SAMPLE_MASK_X0_Y0(uint32_t *val_out, struct nv_nvc097_SET_SAMPLE_MASK_X0_Y0 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_SAMPLE_MASK_X0_Y0(val, args...) { \
    struct nv_nvc097_SET_SAMPLE_MASK_X0_Y0 __data = { .v = (args) }; \
    __NVC097_SET_SAMPLE_MASK_X0_Y0(&val, __data); \
}

#define VA_NVC097_SET_SAMPLE_MASK_X0_Y0 V_NVC097_SET_SAMPLE_MASK_X0_Y0

#define P_NVC097_SET_SAMPLE_MASK_X0_Y0(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SAMPLE_MASK_X0_Y0(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SAMPLE_MASK_X0_Y0, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SAMPLE_MASK_X1_Y0 {
    uint32_t v;
};

static inline void
__NVC097_SET_SAMPLE_MASK_X1_Y0(uint32_t *val_out, struct nv_nvc097_SET_SAMPLE_MASK_X1_Y0 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_SAMPLE_MASK_X1_Y0(val, args...) { \
    struct nv_nvc097_SET_SAMPLE_MASK_X1_Y0 __data = { .v = (args) }; \
    __NVC097_SET_SAMPLE_MASK_X1_Y0(&val, __data); \
}

#define VA_NVC097_SET_SAMPLE_MASK_X1_Y0 V_NVC097_SET_SAMPLE_MASK_X1_Y0

#define P_NVC097_SET_SAMPLE_MASK_X1_Y0(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SAMPLE_MASK_X1_Y0(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SAMPLE_MASK_X1_Y0, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SAMPLE_MASK_X0_Y1 {
    uint32_t v;
};

static inline void
__NVC097_SET_SAMPLE_MASK_X0_Y1(uint32_t *val_out, struct nv_nvc097_SET_SAMPLE_MASK_X0_Y1 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_SAMPLE_MASK_X0_Y1(val, args...) { \
    struct nv_nvc097_SET_SAMPLE_MASK_X0_Y1 __data = { .v = (args) }; \
    __NVC097_SET_SAMPLE_MASK_X0_Y1(&val, __data); \
}

#define VA_NVC097_SET_SAMPLE_MASK_X0_Y1 V_NVC097_SET_SAMPLE_MASK_X0_Y1

#define P_NVC097_SET_SAMPLE_MASK_X0_Y1(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SAMPLE_MASK_X0_Y1(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SAMPLE_MASK_X0_Y1, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SAMPLE_MASK_X1_Y1 {
    uint32_t v;
};

static inline void
__NVC097_SET_SAMPLE_MASK_X1_Y1(uint32_t *val_out, struct nv_nvc097_SET_SAMPLE_MASK_X1_Y1 st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_SAMPLE_MASK_X1_Y1(val, args...) { \
    struct nv_nvc097_SET_SAMPLE_MASK_X1_Y1 __data = { .v = (args) }; \
    __NVC097_SET_SAMPLE_MASK_X1_Y1(&val, __data); \
}

#define VA_NVC097_SET_SAMPLE_MASK_X1_Y1 V_NVC097_SET_SAMPLE_MASK_X1_Y1

#define P_NVC097_SET_SAMPLE_MASK_X1_Y1(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SAMPLE_MASK_X1_Y1(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SAMPLE_MASK_X1_Y1, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SURFACE_CLIP_ID_MEMORY_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_SURFACE_CLIP_ID_MEMORY_A(uint32_t *val_out, struct nv_nvc097_SET_SURFACE_CLIP_ID_MEMORY_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_SURFACE_CLIP_ID_MEMORY_A(val, args...) { \
    struct nv_nvc097_SET_SURFACE_CLIP_ID_MEMORY_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_SURFACE_CLIP_ID_MEMORY_A(&val, __data); \
}

#define VA_NVC097_SET_SURFACE_CLIP_ID_MEMORY_A V_NVC097_SET_SURFACE_CLIP_ID_MEMORY_A

#define P_NVC097_SET_SURFACE_CLIP_ID_MEMORY_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SURFACE_CLIP_ID_MEMORY_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SURFACE_CLIP_ID_MEMORY_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SURFACE_CLIP_ID_MEMORY_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_SURFACE_CLIP_ID_MEMORY_B(uint32_t *val_out, struct nv_nvc097_SET_SURFACE_CLIP_ID_MEMORY_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_SURFACE_CLIP_ID_MEMORY_B(val, args...) { \
    struct nv_nvc097_SET_SURFACE_CLIP_ID_MEMORY_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_SURFACE_CLIP_ID_MEMORY_B(&val, __data); \
}

#define VA_NVC097_SET_SURFACE_CLIP_ID_MEMORY_B V_NVC097_SET_SURFACE_CLIP_ID_MEMORY_B

#define P_NVC097_SET_SURFACE_CLIP_ID_MEMORY_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SURFACE_CLIP_ID_MEMORY_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SURFACE_CLIP_ID_MEMORY_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TIR_MODULATION {
    uint32_t component_select;
};

static inline void
__NVC097_SET_TIR_MODULATION(uint32_t *val_out, struct nv_nvc097_SET_TIR_MODULATION st)
{
    uint32_t val = 0;
    
    assert(st.component_select < (UINT64_C(1) << 2));
    val |= st.component_select << 0;
    *val_out = val;
}

#define V_NVC097_SET_TIR_MODULATION(val, args...) { \
    UNUSED uint32_t COMPONENT_SELECT_NO_MODULATION = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION; \
    UNUSED uint32_t COMPONENT_SELECT_MODULATE_RGB = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB; \
    UNUSED uint32_t COMPONENT_SELECT_MODULATE_ALPHA_ONLY = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY; \
    UNUSED uint32_t COMPONENT_SELECT_MODULATE_RGBA = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA; \
    struct nv_nvc097_SET_TIR_MODULATION __data = { .component_select = (args) }; \
    __NVC097_SET_TIR_MODULATION(&val, __data); \
}

#define VA_NVC097_SET_TIR_MODULATION V_NVC097_SET_TIR_MODULATION

#define P_NVC097_SET_TIR_MODULATION(push, args...) do { \
    UNUSED uint32_t COMPONENT_SELECT_NO_MODULATION = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION; \
    UNUSED uint32_t COMPONENT_SELECT_MODULATE_RGB = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB; \
    UNUSED uint32_t COMPONENT_SELECT_MODULATE_ALPHA_ONLY = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY; \
    UNUSED uint32_t COMPONENT_SELECT_MODULATE_RGBA = NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TIR_MODULATION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TIR_MODULATION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TIR_MODULATION_FUNCTION {
    uint32_t select;
};

static inline void
__NVC097_SET_TIR_MODULATION_FUNCTION(uint32_t *val_out, struct nv_nvc097_SET_TIR_MODULATION_FUNCTION st)
{
    uint32_t val = 0;
    
    assert(st.select < (UINT64_C(1) << 1));
    val |= st.select << 0;
    *val_out = val;
}

#define V_NVC097_SET_TIR_MODULATION_FUNCTION(val, args...) { \
    UNUSED uint32_t SELECT_LINEAR = NVC097_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR; \
    UNUSED uint32_t SELECT_TABLE = NVC097_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE; \
    struct nv_nvc097_SET_TIR_MODULATION_FUNCTION __data = { .select = (args) }; \
    __NVC097_SET_TIR_MODULATION_FUNCTION(&val, __data); \
}

#define VA_NVC097_SET_TIR_MODULATION_FUNCTION V_NVC097_SET_TIR_MODULATION_FUNCTION

#define P_NVC097_SET_TIR_MODULATION_FUNCTION(push, args...) do { \
    UNUSED uint32_t SELECT_LINEAR = NVC097_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR; \
    UNUSED uint32_t SELECT_TABLE = NVC097_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TIR_MODULATION_FUNCTION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TIR_MODULATION_FUNCTION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_OPT_CONTROL {
    uint32_t allow_float_pixel_kills;
};

static inline void
__NVC097_SET_BLEND_OPT_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_BLEND_OPT_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.allow_float_pixel_kills < (UINT64_C(1) << 1));
    val |= st.allow_float_pixel_kills << 0;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_OPT_CONTROL(val, args...) { \
    UNUSED uint32_t ALLOW_FLOAT_PIXEL_KILLS_FALSE = NVC097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE; \
    UNUSED uint32_t ALLOW_FLOAT_PIXEL_KILLS_TRUE = NVC097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE; \
    struct nv_nvc097_SET_BLEND_OPT_CONTROL __data = { .allow_float_pixel_kills = (args) }; \
    __NVC097_SET_BLEND_OPT_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_BLEND_OPT_CONTROL V_NVC097_SET_BLEND_OPT_CONTROL

#define P_NVC097_SET_BLEND_OPT_CONTROL(push, args...) do { \
    UNUSED uint32_t ALLOW_FLOAT_PIXEL_KILLS_FALSE = NVC097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE; \
    UNUSED uint32_t ALLOW_FLOAT_PIXEL_KILLS_TRUE = NVC097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_OPT_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_OPT_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_ZT_A(uint32_t *val_out, struct nv_nvc097_SET_ZT_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZT_A(val, args...) { \
    struct nv_nvc097_SET_ZT_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_ZT_A(&val, __data); \
}

#define VA_NVC097_SET_ZT_A V_NVC097_SET_ZT_A

#define P_NVC097_SET_ZT_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_ZT_B(uint32_t *val_out, struct nv_nvc097_SET_ZT_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_ZT_B(val, args...) { \
    struct nv_nvc097_SET_ZT_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_ZT_B(&val, __data); \
}

#define VA_NVC097_SET_ZT_B V_NVC097_SET_ZT_B

#define P_NVC097_SET_ZT_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_FORMAT {
    uint32_t v;
};

static inline void
__NVC097_SET_ZT_FORMAT(uint32_t *val_out, struct nv_nvc097_SET_ZT_FORMAT st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 5));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZT_FORMAT(val, args...) { \
    UNUSED uint32_t V_Z16 = NVC097_SET_ZT_FORMAT_V_Z16; \
    UNUSED uint32_t V_Z24S8 = NVC097_SET_ZT_FORMAT_V_Z24S8; \
    UNUSED uint32_t V_X8Z24 = NVC097_SET_ZT_FORMAT_V_X8Z24; \
    UNUSED uint32_t V_S8Z24 = NVC097_SET_ZT_FORMAT_V_S8Z24; \
    UNUSED uint32_t V_S8 = NVC097_SET_ZT_FORMAT_V_S8; \
    UNUSED uint32_t V_V8Z24 = NVC097_SET_ZT_FORMAT_V_V8Z24; \
    UNUSED uint32_t V_ZF32 = NVC097_SET_ZT_FORMAT_V_ZF32; \
    UNUSED uint32_t V_ZF32_X24S8 = NVC097_SET_ZT_FORMAT_V_ZF32_X24S8; \
    UNUSED uint32_t V_X8Z24_X16V8S8 = NVC097_SET_ZT_FORMAT_V_X8Z24_X16V8S8; \
    UNUSED uint32_t V_ZF32_X16V8X8 = NVC097_SET_ZT_FORMAT_V_ZF32_X16V8X8; \
    UNUSED uint32_t V_ZF32_X16V8S8 = NVC097_SET_ZT_FORMAT_V_ZF32_X16V8S8; \
    struct nv_nvc097_SET_ZT_FORMAT __data = { .v = (args) }; \
    __NVC097_SET_ZT_FORMAT(&val, __data); \
}

#define VA_NVC097_SET_ZT_FORMAT V_NVC097_SET_ZT_FORMAT

#define P_NVC097_SET_ZT_FORMAT(push, args...) do { \
    UNUSED uint32_t V_Z16 = NVC097_SET_ZT_FORMAT_V_Z16; \
    UNUSED uint32_t V_Z24S8 = NVC097_SET_ZT_FORMAT_V_Z24S8; \
    UNUSED uint32_t V_X8Z24 = NVC097_SET_ZT_FORMAT_V_X8Z24; \
    UNUSED uint32_t V_S8Z24 = NVC097_SET_ZT_FORMAT_V_S8Z24; \
    UNUSED uint32_t V_S8 = NVC097_SET_ZT_FORMAT_V_S8; \
    UNUSED uint32_t V_V8Z24 = NVC097_SET_ZT_FORMAT_V_V8Z24; \
    UNUSED uint32_t V_ZF32 = NVC097_SET_ZT_FORMAT_V_ZF32; \
    UNUSED uint32_t V_ZF32_X24S8 = NVC097_SET_ZT_FORMAT_V_ZF32_X24S8; \
    UNUSED uint32_t V_X8Z24_X16V8S8 = NVC097_SET_ZT_FORMAT_V_X8Z24_X16V8S8; \
    UNUSED uint32_t V_ZF32_X16V8X8 = NVC097_SET_ZT_FORMAT_V_ZF32_X16V8X8; \
    UNUSED uint32_t V_ZF32_X16V8S8 = NVC097_SET_ZT_FORMAT_V_ZF32_X16V8S8; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_FORMAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_FORMAT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_BLOCK_SIZE {
    uint32_t width;
    uint32_t height;
    uint32_t depth;
};

static inline void
__NVC097_SET_ZT_BLOCK_SIZE(uint32_t *val_out, struct nv_nvc097_SET_ZT_BLOCK_SIZE st)
{
    uint32_t val = 0;
    
    assert(st.width < (UINT64_C(1) << 4));
    val |= st.width << 0;
    
    assert(st.height < (UINT64_C(1) << 4));
    val |= st.height << 4;
    
    assert(st.depth < (UINT64_C(1) << 4));
    val |= st.depth << 8;
    *val_out = val;
}

#define V_NVC097_SET_ZT_BLOCK_SIZE(val, args...) { \
    UNUSED uint32_t WIDTH_ONE_GOB = NVC097_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB; \
    UNUSED uint32_t HEIGHT_ONE_GOB = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB; \
    UNUSED uint32_t HEIGHT_TWO_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t HEIGHT_FOUR_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t HEIGHT_EIGHT_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t HEIGHT_SIXTEEN_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t HEIGHT_THIRTYTWO_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t DEPTH_ONE_GOB = NVC097_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB; \
    struct nv_nvc097_SET_ZT_BLOCK_SIZE __data = args; \
    __NVC097_SET_ZT_BLOCK_SIZE(&val, __data); \
}

#define VA_NVC097_SET_ZT_BLOCK_SIZE V_NVC097_SET_ZT_BLOCK_SIZE

#define P_NVC097_SET_ZT_BLOCK_SIZE(push, args...) do { \
    UNUSED uint32_t WIDTH_ONE_GOB = NVC097_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB; \
    UNUSED uint32_t HEIGHT_ONE_GOB = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB; \
    UNUSED uint32_t HEIGHT_TWO_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS; \
    UNUSED uint32_t HEIGHT_FOUR_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS; \
    UNUSED uint32_t HEIGHT_EIGHT_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS; \
    UNUSED uint32_t HEIGHT_SIXTEEN_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS; \
    UNUSED uint32_t HEIGHT_THIRTYTWO_GOBS = NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS; \
    UNUSED uint32_t DEPTH_ONE_GOB = NVC097_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_BLOCK_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_BLOCK_SIZE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_ARRAY_PITCH {
    uint32_t v;
};

static inline void
__NVC097_SET_ZT_ARRAY_PITCH(uint32_t *val_out, struct nv_nvc097_SET_ZT_ARRAY_PITCH st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_ZT_ARRAY_PITCH(val, args...) { \
    struct nv_nvc097_SET_ZT_ARRAY_PITCH __data = { .v = (args) }; \
    __NVC097_SET_ZT_ARRAY_PITCH(&val, __data); \
}

#define VA_NVC097_SET_ZT_ARRAY_PITCH V_NVC097_SET_ZT_ARRAY_PITCH

#define P_NVC097_SET_ZT_ARRAY_PITCH(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_ARRAY_PITCH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_ARRAY_PITCH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SURFACE_CLIP_HORIZONTAL {
    uint32_t x;
    uint32_t width;
};

static inline void
__NVC097_SET_SURFACE_CLIP_HORIZONTAL(uint32_t *val_out, struct nv_nvc097_SET_SURFACE_CLIP_HORIZONTAL st)
{
    uint32_t val = 0;
    
    assert(st.x < (UINT64_C(1) << 16));
    val |= st.x << 0;
    
    assert(st.width < (UINT64_C(1) << 16));
    val |= st.width << 16;
    *val_out = val;
}

#define V_NVC097_SET_SURFACE_CLIP_HORIZONTAL(val, args...) { \
    struct nv_nvc097_SET_SURFACE_CLIP_HORIZONTAL __data = args; \
    __NVC097_SET_SURFACE_CLIP_HORIZONTAL(&val, __data); \
}

#define VA_NVC097_SET_SURFACE_CLIP_HORIZONTAL V_NVC097_SET_SURFACE_CLIP_HORIZONTAL

#define P_NVC097_SET_SURFACE_CLIP_HORIZONTAL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SURFACE_CLIP_HORIZONTAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SURFACE_CLIP_HORIZONTAL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SURFACE_CLIP_VERTICAL {
    uint32_t y;
    uint32_t height;
};

static inline void
__NVC097_SET_SURFACE_CLIP_VERTICAL(uint32_t *val_out, struct nv_nvc097_SET_SURFACE_CLIP_VERTICAL st)
{
    uint32_t val = 0;
    
    assert(st.y < (UINT64_C(1) << 16));
    val |= st.y << 0;
    
    assert(st.height < (UINT64_C(1) << 16));
    val |= st.height << 16;
    *val_out = val;
}

#define V_NVC097_SET_SURFACE_CLIP_VERTICAL(val, args...) { \
    struct nv_nvc097_SET_SURFACE_CLIP_VERTICAL __data = args; \
    __NVC097_SET_SURFACE_CLIP_VERTICAL(&val, __data); \
}

#define VA_NVC097_SET_SURFACE_CLIP_VERTICAL V_NVC097_SET_SURFACE_CLIP_VERTICAL

#define P_NVC097_SET_SURFACE_CLIP_VERTICAL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SURFACE_CLIP_VERTICAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SURFACE_CLIP_VERTICAL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TILED_CACHE_BUNDLE_CONTROL {
    uint32_t treat_heavyweight_as_lightweight;
};

static inline void
__NVC097_SET_TILED_CACHE_BUNDLE_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_TILED_CACHE_BUNDLE_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.treat_heavyweight_as_lightweight < (UINT64_C(1) << 1));
    val |= st.treat_heavyweight_as_lightweight << 0;
    *val_out = val;
}

#define V_NVC097_SET_TILED_CACHE_BUNDLE_CONTROL(val, args...) { \
    UNUSED uint32_t TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE = NVC097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE; \
    UNUSED uint32_t TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE = NVC097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE; \
    struct nv_nvc097_SET_TILED_CACHE_BUNDLE_CONTROL __data = { .treat_heavyweight_as_lightweight = (args) }; \
    __NVC097_SET_TILED_CACHE_BUNDLE_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_TILED_CACHE_BUNDLE_CONTROL V_NVC097_SET_TILED_CACHE_BUNDLE_CONTROL

#define P_NVC097_SET_TILED_CACHE_BUNDLE_CONTROL(push, args...) do { \
    UNUSED uint32_t TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE = NVC097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE; \
    UNUSED uint32_t TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE = NVC097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TILED_CACHE_BUNDLE_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TILED_CACHE_BUNDLE_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS {
    uint32_t system_memory_volatile;
    uint32_t policy;
};

static inline void
__NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS(uint32_t *val_out, struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS st)
{
    uint32_t val = 0;
    
    assert(st.system_memory_volatile < (UINT64_C(1) << 1));
    val |= st.system_memory_volatile << 0;
    
    assert(st.policy < (UINT64_C(1) << 2));
    val |= st.policy << 4;
    *val_out = val;
}

#define V_NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS(val, args...) { \
    UNUSED uint32_t SYSTEM_MEMORY_VOLATILE_FALSE = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE; \
    UNUSED uint32_t SYSTEM_MEMORY_VOLATILE_TRUE = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE; \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST; \
    struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS __data = args; \
    __NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS(&val, __data); \
}

#define VA_NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS V_NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS

#define P_NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS(push, args...) do { \
    UNUSED uint32_t SYSTEM_MEMORY_VOLATILE_FALSE = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE; \
    UNUSED uint32_t SYSTEM_MEMORY_VOLATILE_TRUE = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE; \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_MULTICAST {
    uint32_t order;
};

static inline void
__NVC097_SET_VIEWPORT_MULTICAST(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_MULTICAST st)
{
    uint32_t val = 0;
    
    assert(st.order < (UINT64_C(1) << 1));
    val |= st.order << 0;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_MULTICAST(val, args...) { \
    UNUSED uint32_t ORDER_VIEWPORT_ORDER = NVC097_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER; \
    UNUSED uint32_t ORDER_PRIMITIVE_ORDER = NVC097_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER; \
    struct nv_nvc097_SET_VIEWPORT_MULTICAST __data = { .order = (args) }; \
    __NVC097_SET_VIEWPORT_MULTICAST(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_MULTICAST V_NVC097_SET_VIEWPORT_MULTICAST

#define P_NVC097_SET_VIEWPORT_MULTICAST(push, args...) do { \
    UNUSED uint32_t ORDER_VIEWPORT_ORDER = NVC097_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER; \
    UNUSED uint32_t ORDER_PRIMITIVE_ORDER = NVC097_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_MULTICAST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_MULTICAST, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TESSELLATION_CUT_HEIGHT {
    uint32_t v;
};

static inline void
__NVC097_SET_TESSELLATION_CUT_HEIGHT(uint32_t *val_out, struct nv_nvc097_SET_TESSELLATION_CUT_HEIGHT st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 5));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_TESSELLATION_CUT_HEIGHT(val, args...) { \
    struct nv_nvc097_SET_TESSELLATION_CUT_HEIGHT __data = { .v = (args) }; \
    __NVC097_SET_TESSELLATION_CUT_HEIGHT(&val, __data); \
}

#define VA_NVC097_SET_TESSELLATION_CUT_HEIGHT V_NVC097_SET_TESSELLATION_CUT_HEIGHT

#define P_NVC097_SET_TESSELLATION_CUT_HEIGHT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TESSELLATION_CUT_HEIGHT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TESSELLATION_CUT_HEIGHT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_MAX_GS_INSTANCES_PER_TASK {
    uint32_t v;
};

static inline void
__NVC097_SET_MAX_GS_INSTANCES_PER_TASK(uint32_t *val_out, struct nv_nvc097_SET_MAX_GS_INSTANCES_PER_TASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 11));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_MAX_GS_INSTANCES_PER_TASK(val, args...) { \
    struct nv_nvc097_SET_MAX_GS_INSTANCES_PER_TASK __data = { .v = (args) }; \
    __NVC097_SET_MAX_GS_INSTANCES_PER_TASK(&val, __data); \
}

#define VA_NVC097_SET_MAX_GS_INSTANCES_PER_TASK V_NVC097_SET_MAX_GS_INSTANCES_PER_TASK

#define P_NVC097_SET_MAX_GS_INSTANCES_PER_TASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_MAX_GS_INSTANCES_PER_TASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_MAX_GS_INSTANCES_PER_TASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK {
    uint32_t v;
};

static inline void
__NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK(uint32_t *val_out, struct nv_nvc097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK(val, args...) { \
    struct nv_nvc097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK __data = { .v = (args) }; \
    __NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK(&val, __data); \
}

#define VA_NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK V_NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK

#define P_NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD00 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD00(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD00 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD00(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD00 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD00(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD00 V_NVC097_SET_RESERVED_SW_METHOD00

#define P_NVC097_SET_RESERVED_SW_METHOD00(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD00(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD00, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER {
    uint32_t v;
};

static inline void
__NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER(uint32_t *val_out, struct nv_nvc097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 10));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER(val, args...) { \
    struct nv_nvc097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER __data = { .v = (args) }; \
    __NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER(&val, __data); \
}

#define VA_NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER V_NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER

#define P_NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BETA_CB_STORAGE_CONSTRAINT {
    uint32_t enable;
};

static inline void
__NVC097_SET_BETA_CB_STORAGE_CONSTRAINT(uint32_t *val_out, struct nv_nvc097_SET_BETA_CB_STORAGE_CONSTRAINT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_BETA_CB_STORAGE_CONSTRAINT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE; \
    struct nv_nvc097_SET_BETA_CB_STORAGE_CONSTRAINT __data = { .enable = (args) }; \
    __NVC097_SET_BETA_CB_STORAGE_CONSTRAINT(&val, __data); \
}

#define VA_NVC097_SET_BETA_CB_STORAGE_CONSTRAINT V_NVC097_SET_BETA_CB_STORAGE_CONSTRAINT

#define P_NVC097_SET_BETA_CB_STORAGE_CONSTRAINT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BETA_CB_STORAGE_CONSTRAINT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BETA_CB_STORAGE_CONSTRAINT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER {
    uint32_t v;
};

static inline void
__NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER(uint32_t *val_out, struct nv_nvc097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 10));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER(val, args...) { \
    struct nv_nvc097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER __data = { .v = (args) }; \
    __NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER(&val, __data); \
}

#define VA_NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER V_NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER

#define P_NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_CB_STORAGE_CONSTRAINT {
    uint32_t enable;
};

static inline void
__NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_CB_STORAGE_CONSTRAINT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE; \
    struct nv_nvc097_SET_ALPHA_CB_STORAGE_CONSTRAINT __data = { .enable = (args) }; \
    __NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT V_NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT

#define P_NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD01 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD01(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD01 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD01(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD01 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD01(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD01 V_NVC097_SET_RESERVED_SW_METHOD01

#define P_NVC097_SET_RESERVED_SW_METHOD01(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD01(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD01, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD02 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD02(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD02 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD02(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD02 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD02(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD02 V_NVC097_SET_RESERVED_SW_METHOD02

#define P_NVC097_SET_RESERVED_SW_METHOD02(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD02(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD02, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TIR_MODULATION_COEFFICIENT_TABLE {
    uint32_t v0;
    uint32_t v1;
    uint32_t v2;
    uint32_t v3;
};

static inline void
__NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(uint32_t *val_out, struct nv_nvc097_SET_TIR_MODULATION_COEFFICIENT_TABLE st)
{
    uint32_t val = 0;
    
    assert(st.v0 < (UINT64_C(1) << 8));
    val |= st.v0 << 0;
    
    assert(st.v1 < (UINT64_C(1) << 8));
    val |= st.v1 << 8;
    
    assert(st.v2 < (UINT64_C(1) << 8));
    val |= st.v2 << 16;
    
    assert(st.v3 < (UINT64_C(1) << 8));
    val |= st.v3 << 24;
    *val_out = val;
}

#define V_NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(val, args...) { \
    struct nv_nvc097_SET_TIR_MODULATION_COEFFICIENT_TABLE __data = args; \
    __NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(&val, __data); \
}

#define VA_NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) V_NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE

#define P_NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP01 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP01(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP01 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP01(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP01 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP01(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP01 V_NVC097_SET_SPARE_NOOP01

#define P_NVC097_SET_SPARE_NOOP01(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP01(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP01, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP02 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP02(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP02 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP02(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP02 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP02(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP02 V_NVC097_SET_SPARE_NOOP02

#define P_NVC097_SET_SPARE_NOOP02(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP02(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP02, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP03 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP03(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP03 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP03(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP03 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP03(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP03 V_NVC097_SET_SPARE_NOOP03

#define P_NVC097_SET_SPARE_NOOP03(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP03(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP03, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP04 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP04(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP04 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP04(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP04 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP04(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP04 V_NVC097_SET_SPARE_NOOP04

#define P_NVC097_SET_SPARE_NOOP04(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP04(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP04, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP05 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP05(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP05 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP05(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP05 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP05(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP05 V_NVC097_SET_SPARE_NOOP05

#define P_NVC097_SET_SPARE_NOOP05(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP05(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP05, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP06 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP06(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP06 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP06(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP06 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP06(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP06 V_NVC097_SET_SPARE_NOOP06

#define P_NVC097_SET_SPARE_NOOP06(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP06(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP06, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP07 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP07(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP07 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP07(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP07 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP07(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP07 V_NVC097_SET_SPARE_NOOP07

#define P_NVC097_SET_SPARE_NOOP07(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP07(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP07, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP08 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP08(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP08 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP08(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP08 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP08(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP08 V_NVC097_SET_SPARE_NOOP08

#define P_NVC097_SET_SPARE_NOOP08(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP08(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP08, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP09 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP09(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP09 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP09(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP09 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP09(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP09 V_NVC097_SET_SPARE_NOOP09

#define P_NVC097_SET_SPARE_NOOP09(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP09(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP09, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP10 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP10(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP10 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP10(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP10 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP10(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP10 V_NVC097_SET_SPARE_NOOP10

#define P_NVC097_SET_SPARE_NOOP10(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP10(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP10, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP11 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP11(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP11 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP11(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP11 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP11(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP11 V_NVC097_SET_SPARE_NOOP11

#define P_NVC097_SET_SPARE_NOOP11(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP11(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP11, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP12 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP12(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP12 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP12(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP12 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP12(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP12 V_NVC097_SET_SPARE_NOOP12

#define P_NVC097_SET_SPARE_NOOP12(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP12(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP12, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP13 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP13(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP13 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP13(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP13 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP13(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP13 V_NVC097_SET_SPARE_NOOP13

#define P_NVC097_SET_SPARE_NOOP13(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP13(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP13, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP14 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP14(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP14 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP14(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP14 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP14(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP14 V_NVC097_SET_SPARE_NOOP14

#define P_NVC097_SET_SPARE_NOOP14(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP14(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP14, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE_NOOP15 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE_NOOP15(uint32_t *val_out, struct nv_nvc097_SET_SPARE_NOOP15 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE_NOOP15(val, args...) { \
    struct nv_nvc097_SET_SPARE_NOOP15 __data = { .v = (args) }; \
    __NVC097_SET_SPARE_NOOP15(&val, __data); \
}

#define VA_NVC097_SET_SPARE_NOOP15 V_NVC097_SET_SPARE_NOOP15

#define P_NVC097_SET_SPARE_NOOP15(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE_NOOP15(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE_NOOP15, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD03 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD03(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD03 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD03(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD03 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD03(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD03 V_NVC097_SET_RESERVED_SW_METHOD03

#define P_NVC097_SET_RESERVED_SW_METHOD03(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD03(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD03, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD04 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD04(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD04 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD04(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD04 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD04(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD04 V_NVC097_SET_RESERVED_SW_METHOD04

#define P_NVC097_SET_RESERVED_SW_METHOD04(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD04(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD04, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD05 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD05(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD05 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD05(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD05 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD05(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD05 V_NVC097_SET_RESERVED_SW_METHOD05

#define P_NVC097_SET_RESERVED_SW_METHOD05(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD05(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD05, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD06 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD06(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD06 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD06(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD06 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD06(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD06 V_NVC097_SET_RESERVED_SW_METHOD06

#define P_NVC097_SET_RESERVED_SW_METHOD06(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD06(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD06, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD07 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD07(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD07 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD07(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD07 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD07(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD07 V_NVC097_SET_RESERVED_SW_METHOD07

#define P_NVC097_SET_RESERVED_SW_METHOD07(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD07(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD07, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD08 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD08(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD08 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD08(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD08 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD08(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD08 V_NVC097_SET_RESERVED_SW_METHOD08

#define P_NVC097_SET_RESERVED_SW_METHOD08(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD08(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD08, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD09 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD09(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD09 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD09(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD09 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD09(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD09 V_NVC097_SET_RESERVED_SW_METHOD09

#define P_NVC097_SET_RESERVED_SW_METHOD09(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD09(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD09, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 {
    uint32_t all_covered_all_hit_once;
    uint32_t all_covered;
};

static inline void
__NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8(uint32_t *val_out, struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 st)
{
    uint32_t val = 0;
    
    assert(st.all_covered_all_hit_once < (UINT64_C(1) << 8));
    val |= st.all_covered_all_hit_once << 0;
    
    assert(st.all_covered < (UINT64_C(1) << 8));
    val |= st.all_covered << 16;
    *val_out = val;
}

#define V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8(val, args...) { \
    struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 __data = args; \
    __NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8(&val, __data); \
}

#define VA_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8

#define P_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD10 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD10(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD10 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD10(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD10 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD10(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD10 V_NVC097_SET_RESERVED_SW_METHOD10

#define P_NVC097_SET_RESERVED_SW_METHOD10(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD10(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD10, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD11 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD11(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD11 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD11(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD11 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD11(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD11 V_NVC097_SET_RESERVED_SW_METHOD11

#define P_NVC097_SET_RESERVED_SW_METHOD11(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD11(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD11, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD12 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD12(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD12 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD12(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD12 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD12(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD12 V_NVC097_SET_RESERVED_SW_METHOD12

#define P_NVC097_SET_RESERVED_SW_METHOD12(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD12(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD12, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD13 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD13(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD13 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD13(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD13 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD13(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD13 V_NVC097_SET_RESERVED_SW_METHOD13

#define P_NVC097_SET_RESERVED_SW_METHOD13(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD13(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD13, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 {
    uint32_t all_covered_all_hit_once;
    uint32_t all_covered;
};

static inline void
__NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10(uint32_t *val_out, struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 st)
{
    uint32_t val = 0;
    
    assert(st.all_covered_all_hit_once < (UINT64_C(1) << 8));
    val |= st.all_covered_all_hit_once << 0;
    
    assert(st.all_covered < (UINT64_C(1) << 8));
    val |= st.all_covered << 16;
    *val_out = val;
}

#define V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10(val, args...) { \
    struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 __data = args; \
    __NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10(&val, __data); \
}

#define VA_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10

#define P_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 {
    uint32_t all_covered_all_hit_once;
    uint32_t all_covered;
};

static inline void
__NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16(uint32_t *val_out, struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 st)
{
    uint32_t val = 0;
    
    assert(st.all_covered_all_hit_once < (UINT64_C(1) << 8));
    val |= st.all_covered_all_hit_once << 0;
    
    assert(st.all_covered < (UINT64_C(1) << 8));
    val |= st.all_covered << 16;
    *val_out = val;
}

#define V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16(val, args...) { \
    struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 __data = args; \
    __NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16(&val, __data); \
}

#define VA_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16

#define P_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_FP11 {
    uint32_t all_covered_all_hit_once;
    uint32_t all_covered;
};

static inline void
__NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11(uint32_t *val_out, struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_FP11 st)
{
    uint32_t val = 0;
    
    assert(st.all_covered_all_hit_once < (UINT64_C(1) << 6));
    val |= st.all_covered_all_hit_once << 0;
    
    assert(st.all_covered < (UINT64_C(1) << 6));
    val |= st.all_covered << 16;
    *val_out = val;
}

#define V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11(val, args...) { \
    struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_FP11 __data = args; \
    __NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11(&val, __data); \
}

#define VA_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11 V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11

#define P_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_FP16 {
    uint32_t all_covered_all_hit_once;
    uint32_t all_covered;
};

static inline void
__NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16(uint32_t *val_out, struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_FP16 st)
{
    uint32_t val = 0;
    
    assert(st.all_covered_all_hit_once < (UINT64_C(1) << 8));
    val |= st.all_covered_all_hit_once << 0;
    
    assert(st.all_covered < (UINT64_C(1) << 8));
    val |= st.all_covered << 16;
    *val_out = val;
}

#define V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16(val, args...) { \
    struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_FP16 __data = args; \
    __NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16(&val, __data); \
}

#define VA_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16 V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16

#define P_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 {
    uint32_t all_covered_all_hit_once;
    uint32_t all_covered;
};

static inline void
__NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8(uint32_t *val_out, struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 st)
{
    uint32_t val = 0;
    
    assert(st.all_covered_all_hit_once < (UINT64_C(1) << 8));
    val |= st.all_covered_all_hit_once << 0;
    
    assert(st.all_covered < (UINT64_C(1) << 8));
    val |= st.all_covered << 16;
    *val_out = val;
}

#define V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8(val, args...) { \
    struct nv_nvc097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 __data = args; \
    __NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8(&val, __data); \
}

#define VA_NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8

#define P_NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8, nvk_p_ret); \
} while(0)

struct nv_nvc097_UNBIND_ALL {
    uint32_t constant_buffers;
};

static inline void
__NVC097_UNBIND_ALL(uint32_t *val_out, struct nv_nvc097_UNBIND_ALL st)
{
    uint32_t val = 0;
    
    assert(st.constant_buffers < (UINT64_C(1) << 1));
    val |= st.constant_buffers << 8;
    *val_out = val;
}

#define V_NVC097_UNBIND_ALL(val, args...) { \
    UNUSED uint32_t CONSTANT_BUFFERS_FALSE = NVC097_UNBIND_ALL_CONSTANT_BUFFERS_FALSE; \
    UNUSED uint32_t CONSTANT_BUFFERS_TRUE = NVC097_UNBIND_ALL_CONSTANT_BUFFERS_TRUE; \
    struct nv_nvc097_UNBIND_ALL __data = { .constant_buffers = (args) }; \
    __NVC097_UNBIND_ALL(&val, __data); \
}

#define VA_NVC097_UNBIND_ALL V_NVC097_UNBIND_ALL

#define P_NVC097_UNBIND_ALL(push, args...) do { \
    UNUSED uint32_t CONSTANT_BUFFERS_FALSE = NVC097_UNBIND_ALL_CONSTANT_BUFFERS_FALSE; \
    UNUSED uint32_t CONSTANT_BUFFERS_TRUE = NVC097_UNBIND_ALL_CONSTANT_BUFFERS_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_UNBIND_ALL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_UNBIND_ALL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLEAR_SURFACE_CONTROL {
    uint32_t respect_stencil_mask;
    uint32_t use_clear_rect;
    uint32_t use_scissor0;
    uint32_t use_viewport_clip0;
};

static inline void
__NVC097_SET_CLEAR_SURFACE_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_CLEAR_SURFACE_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.respect_stencil_mask < (UINT64_C(1) << 1));
    val |= st.respect_stencil_mask << 0;
    
    assert(st.use_clear_rect < (UINT64_C(1) << 1));
    val |= st.use_clear_rect << 4;
    
    assert(st.use_scissor0 < (UINT64_C(1) << 1));
    val |= st.use_scissor0 << 8;
    
    assert(st.use_viewport_clip0 < (UINT64_C(1) << 1));
    val |= st.use_viewport_clip0 << 12;
    *val_out = val;
}

#define V_NVC097_SET_CLEAR_SURFACE_CONTROL(val, args...) { \
    UNUSED uint32_t RESPECT_STENCIL_MASK_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE; \
    UNUSED uint32_t RESPECT_STENCIL_MASK_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE; \
    UNUSED uint32_t USE_CLEAR_RECT_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE; \
    UNUSED uint32_t USE_CLEAR_RECT_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE; \
    UNUSED uint32_t USE_SCISSOR0_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE; \
    UNUSED uint32_t USE_SCISSOR0_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE; \
    UNUSED uint32_t USE_VIEWPORT_CLIP0_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE; \
    UNUSED uint32_t USE_VIEWPORT_CLIP0_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE; \
    struct nv_nvc097_SET_CLEAR_SURFACE_CONTROL __data = args; \
    __NVC097_SET_CLEAR_SURFACE_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_CLEAR_SURFACE_CONTROL V_NVC097_SET_CLEAR_SURFACE_CONTROL

#define P_NVC097_SET_CLEAR_SURFACE_CONTROL(push, args...) do { \
    UNUSED uint32_t RESPECT_STENCIL_MASK_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE; \
    UNUSED uint32_t RESPECT_STENCIL_MASK_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE; \
    UNUSED uint32_t USE_CLEAR_RECT_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE; \
    UNUSED uint32_t USE_CLEAR_RECT_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE; \
    UNUSED uint32_t USE_SCISSOR0_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE; \
    UNUSED uint32_t USE_SCISSOR0_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE; \
    UNUSED uint32_t USE_VIEWPORT_CLIP0_FALSE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE; \
    UNUSED uint32_t USE_VIEWPORT_CLIP0_TRUE = NVC097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLEAR_SURFACE_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLEAR_SURFACE_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS {
    uint32_t policy;
};

static inline void
__NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS(uint32_t *val_out, struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS st)
{
    uint32_t val = 0;
    
    assert(st.policy < (UINT64_C(1) << 2));
    val |= st.policy << 4;
    *val_out = val;
}

#define V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS(val, args...) { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST; \
    struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS __data = { .policy = (args) }; \
    __NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS(&val, __data); \
}

#define VA_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS

#define P_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS(push, args...) do { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD14 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD14(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD14 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD14(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD14 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD14(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD14 V_NVC097_SET_RESERVED_SW_METHOD14

#define P_NVC097_SET_RESERVED_SW_METHOD14(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD14(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD14, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RESERVED_SW_METHOD15 {
    uint32_t v;
};

static inline void
__NVC097_SET_RESERVED_SW_METHOD15(uint32_t *val_out, struct nv_nvc097_SET_RESERVED_SW_METHOD15 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_RESERVED_SW_METHOD15(val, args...) { \
    struct nv_nvc097_SET_RESERVED_SW_METHOD15 __data = { .v = (args) }; \
    __NVC097_SET_RESERVED_SW_METHOD15(&val, __data); \
}

#define VA_NVC097_SET_RESERVED_SW_METHOD15 V_NVC097_SET_RESERVED_SW_METHOD15

#define P_NVC097_SET_RESERVED_SW_METHOD15(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RESERVED_SW_METHOD15(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RESERVED_SW_METHOD15, nvk_p_ret); \
} while(0)

struct nv_nvc097_NO_OPERATION_DATA_HI {
    uint32_t v;
};

static inline void
__NVC097_NO_OPERATION_DATA_HI(uint32_t *val_out, struct nv_nvc097_NO_OPERATION_DATA_HI st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_NO_OPERATION_DATA_HI(val, args...) { \
    struct nv_nvc097_NO_OPERATION_DATA_HI __data = { .v = (args) }; \
    __NVC097_NO_OPERATION_DATA_HI(&val, __data); \
}

#define VA_NVC097_NO_OPERATION_DATA_HI V_NVC097_NO_OPERATION_DATA_HI

#define P_NVC097_NO_OPERATION_DATA_HI(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_NO_OPERATION_DATA_HI(nvk_p_ret, args); \
    nv_push_val(push, NVC097_NO_OPERATION_DATA_HI, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_BIAS_CONTROL {
    uint32_t depth_format_dependent;
};

static inline void
__NVC097_SET_DEPTH_BIAS_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_BIAS_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.depth_format_dependent < (UINT64_C(1) << 1));
    val |= st.depth_format_dependent << 0;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_BIAS_CONTROL(val, args...) { \
    UNUSED uint32_t DEPTH_FORMAT_DEPENDENT_FALSE = NVC097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE; \
    UNUSED uint32_t DEPTH_FORMAT_DEPENDENT_TRUE = NVC097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE; \
    struct nv_nvc097_SET_DEPTH_BIAS_CONTROL __data = { .depth_format_dependent = (args) }; \
    __NVC097_SET_DEPTH_BIAS_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_BIAS_CONTROL V_NVC097_SET_DEPTH_BIAS_CONTROL

#define P_NVC097_SET_DEPTH_BIAS_CONTROL(push, args...) do { \
    UNUSED uint32_t DEPTH_FORMAT_DEPENDENT_FALSE = NVC097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE; \
    UNUSED uint32_t DEPTH_FORMAT_DEPENDENT_TRUE = NVC097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_BIAS_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_BIAS_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_PM_TRIGGER_END {
    uint32_t v;
};

static inline void
__NVC097_PM_TRIGGER_END(uint32_t *val_out, struct nv_nvc097_PM_TRIGGER_END st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_PM_TRIGGER_END(val, args...) { \
    struct nv_nvc097_PM_TRIGGER_END __data = { .v = (args) }; \
    __NVC097_PM_TRIGGER_END(&val, __data); \
}

#define VA_NVC097_PM_TRIGGER_END V_NVC097_PM_TRIGGER_END

#define P_NVC097_PM_TRIGGER_END(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PM_TRIGGER_END(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PM_TRIGGER_END, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_ID_BASE {
    uint32_t v;
};

static inline void
__NVC097_SET_VERTEX_ID_BASE(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_ID_BASE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_ID_BASE(val, args...) { \
    struct nv_nvc097_SET_VERTEX_ID_BASE __data = { .v = (args) }; \
    __NVC097_SET_VERTEX_ID_BASE(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_ID_BASE V_NVC097_SET_VERTEX_ID_BASE

#define P_NVC097_SET_VERTEX_ID_BASE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_ID_BASE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_ID_BASE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_COMPRESSION {
    uint32_t enable;
};

static inline void
__NVC097_SET_STENCIL_COMPRESSION(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_COMPRESSION st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_COMPRESSION(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_STENCIL_COMPRESSION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_STENCIL_COMPRESSION_ENABLE_TRUE; \
    struct nv_nvc097_SET_STENCIL_COMPRESSION __data = { .enable = (args) }; \
    __NVC097_SET_STENCIL_COMPRESSION(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_COMPRESSION V_NVC097_SET_STENCIL_COMPRESSION

#define P_NVC097_SET_STENCIL_COMPRESSION(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_STENCIL_COMPRESSION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_STENCIL_COMPRESSION_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_COMPRESSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_COMPRESSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A {
    uint32_t attribute0_comp0;
    uint32_t attribute0_comp1;
    uint32_t attribute0_comp2;
    uint32_t attribute0_comp3;
    uint32_t attribute1_comp0;
    uint32_t attribute1_comp1;
    uint32_t attribute1_comp2;
    uint32_t attribute1_comp3;
    uint32_t attribute2_comp0;
    uint32_t attribute2_comp1;
    uint32_t attribute2_comp2;
    uint32_t attribute2_comp3;
    uint32_t attribute3_comp0;
    uint32_t attribute3_comp1;
    uint32_t attribute3_comp2;
    uint32_t attribute3_comp3;
    uint32_t attribute4_comp0;
    uint32_t attribute4_comp1;
    uint32_t attribute4_comp2;
    uint32_t attribute4_comp3;
    uint32_t attribute5_comp0;
    uint32_t attribute5_comp1;
    uint32_t attribute5_comp2;
    uint32_t attribute5_comp3;
    uint32_t attribute6_comp0;
    uint32_t attribute6_comp1;
    uint32_t attribute6_comp2;
    uint32_t attribute6_comp3;
    uint32_t attribute7_comp0;
    uint32_t attribute7_comp1;
    uint32_t attribute7_comp2;
    uint32_t attribute7_comp3;
};

static inline void
__NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(uint32_t *val_out, struct nv_nvc097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A st)
{
    uint32_t val = 0;
    
    assert(st.attribute0_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp0 << 0;
    
    assert(st.attribute0_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp1 << 1;
    
    assert(st.attribute0_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp2 << 2;
    
    assert(st.attribute0_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp3 << 3;
    
    assert(st.attribute1_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp0 << 4;
    
    assert(st.attribute1_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp1 << 5;
    
    assert(st.attribute1_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp2 << 6;
    
    assert(st.attribute1_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp3 << 7;
    
    assert(st.attribute2_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp0 << 8;
    
    assert(st.attribute2_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp1 << 9;
    
    assert(st.attribute2_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp2 << 10;
    
    assert(st.attribute2_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp3 << 11;
    
    assert(st.attribute3_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp0 << 12;
    
    assert(st.attribute3_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp1 << 13;
    
    assert(st.attribute3_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp2 << 14;
    
    assert(st.attribute3_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp3 << 15;
    
    assert(st.attribute4_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp0 << 16;
    
    assert(st.attribute4_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp1 << 17;
    
    assert(st.attribute4_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp2 << 18;
    
    assert(st.attribute4_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp3 << 19;
    
    assert(st.attribute5_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp0 << 20;
    
    assert(st.attribute5_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp1 << 21;
    
    assert(st.attribute5_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp2 << 22;
    
    assert(st.attribute5_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp3 << 23;
    
    assert(st.attribute6_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp0 << 24;
    
    assert(st.attribute6_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp1 << 25;
    
    assert(st.attribute6_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp2 << 26;
    
    assert(st.attribute6_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp3 << 27;
    
    assert(st.attribute7_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp0 << 28;
    
    assert(st.attribute7_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp1 << 29;
    
    assert(st.attribute7_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp2 << 30;
    
    assert(st.attribute7_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp3 << 31;
    *val_out = val;
}

#define V_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(val, args...) { \
    UNUSED uint32_t ATTRIBUTE0_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE; \
    struct nv_nvc097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A __data = args; \
    __NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(&val, __data); \
}

#define VA_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) V_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A

#define P_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(push, idx, args...) do { \
    UNUSED uint32_t ATTRIBUTE0_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B {
    uint32_t attribute0_comp0;
    uint32_t attribute0_comp1;
    uint32_t attribute0_comp2;
    uint32_t attribute0_comp3;
    uint32_t attribute1_comp0;
    uint32_t attribute1_comp1;
    uint32_t attribute1_comp2;
    uint32_t attribute1_comp3;
    uint32_t attribute2_comp0;
    uint32_t attribute2_comp1;
    uint32_t attribute2_comp2;
    uint32_t attribute2_comp3;
    uint32_t attribute3_comp0;
    uint32_t attribute3_comp1;
    uint32_t attribute3_comp2;
    uint32_t attribute3_comp3;
    uint32_t attribute4_comp0;
    uint32_t attribute4_comp1;
    uint32_t attribute4_comp2;
    uint32_t attribute4_comp3;
    uint32_t attribute5_comp0;
    uint32_t attribute5_comp1;
    uint32_t attribute5_comp2;
    uint32_t attribute5_comp3;
    uint32_t attribute6_comp0;
    uint32_t attribute6_comp1;
    uint32_t attribute6_comp2;
    uint32_t attribute6_comp3;
    uint32_t attribute7_comp0;
    uint32_t attribute7_comp1;
    uint32_t attribute7_comp2;
    uint32_t attribute7_comp3;
};

static inline void
__NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(uint32_t *val_out, struct nv_nvc097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B st)
{
    uint32_t val = 0;
    
    assert(st.attribute0_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp0 << 0;
    
    assert(st.attribute0_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp1 << 1;
    
    assert(st.attribute0_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp2 << 2;
    
    assert(st.attribute0_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute0_comp3 << 3;
    
    assert(st.attribute1_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp0 << 4;
    
    assert(st.attribute1_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp1 << 5;
    
    assert(st.attribute1_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp2 << 6;
    
    assert(st.attribute1_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute1_comp3 << 7;
    
    assert(st.attribute2_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp0 << 8;
    
    assert(st.attribute2_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp1 << 9;
    
    assert(st.attribute2_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp2 << 10;
    
    assert(st.attribute2_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute2_comp3 << 11;
    
    assert(st.attribute3_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp0 << 12;
    
    assert(st.attribute3_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp1 << 13;
    
    assert(st.attribute3_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp2 << 14;
    
    assert(st.attribute3_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute3_comp3 << 15;
    
    assert(st.attribute4_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp0 << 16;
    
    assert(st.attribute4_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp1 << 17;
    
    assert(st.attribute4_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp2 << 18;
    
    assert(st.attribute4_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute4_comp3 << 19;
    
    assert(st.attribute5_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp0 << 20;
    
    assert(st.attribute5_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp1 << 21;
    
    assert(st.attribute5_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp2 << 22;
    
    assert(st.attribute5_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute5_comp3 << 23;
    
    assert(st.attribute6_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp0 << 24;
    
    assert(st.attribute6_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp1 << 25;
    
    assert(st.attribute6_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp2 << 26;
    
    assert(st.attribute6_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute6_comp3 << 27;
    
    assert(st.attribute7_comp0 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp0 << 28;
    
    assert(st.attribute7_comp1 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp1 << 29;
    
    assert(st.attribute7_comp2 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp2 << 30;
    
    assert(st.attribute7_comp3 < (UINT64_C(1) << 1));
    val |= st.attribute7_comp3 << 31;
    *val_out = val;
}

#define V_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(val, args...) { \
    UNUSED uint32_t ATTRIBUTE0_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE; \
    struct nv_nvc097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B __data = args; \
    __NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(&val, __data); \
}

#define VA_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) V_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B

#define P_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(push, idx, args...) do { \
    UNUSED uint32_t ATTRIBUTE0_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE0_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE1_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE2_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE3_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE4_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE5_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE6_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP0_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP1_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP2_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_FALSE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE; \
    UNUSED uint32_t ATTRIBUTE7_COMP3_TRUE = NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TIR_CONTROL {
    uint32_t z_pass_pixel_count_use_raster_samples;
    uint32_t alpha_to_coverage_use_raster_samples;
    uint32_t reduce_coverage;
};

static inline void
__NVC097_SET_TIR_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_TIR_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.z_pass_pixel_count_use_raster_samples < (UINT64_C(1) << 1));
    val |= st.z_pass_pixel_count_use_raster_samples << 0;
    
    assert(st.alpha_to_coverage_use_raster_samples < (UINT64_C(1) << 1));
    val |= st.alpha_to_coverage_use_raster_samples << 4;
    
    assert(st.reduce_coverage < (UINT64_C(1) << 1));
    val |= st.reduce_coverage << 1;
    *val_out = val;
}

#define V_NVC097_SET_TIR_CONTROL(val, args...) { \
    UNUSED uint32_t Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE = NVC097_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE; \
    UNUSED uint32_t Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE = NVC097_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE; \
    UNUSED uint32_t ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE = NVC097_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE; \
    UNUSED uint32_t ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE = NVC097_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE; \
    UNUSED uint32_t REDUCE_COVERAGE_DISABLE = NVC097_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE; \
    UNUSED uint32_t REDUCE_COVERAGE_ENABLE = NVC097_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE; \
    struct nv_nvc097_SET_TIR_CONTROL __data = args; \
    __NVC097_SET_TIR_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_TIR_CONTROL V_NVC097_SET_TIR_CONTROL

#define P_NVC097_SET_TIR_CONTROL(push, args...) do { \
    UNUSED uint32_t Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE = NVC097_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE; \
    UNUSED uint32_t Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE = NVC097_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE; \
    UNUSED uint32_t ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE = NVC097_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE; \
    UNUSED uint32_t ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE = NVC097_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE; \
    UNUSED uint32_t REDUCE_COVERAGE_DISABLE = NVC097_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE; \
    UNUSED uint32_t REDUCE_COVERAGE_ENABLE = NVC097_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TIR_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TIR_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_MUTABLE_METHOD_CONTROL {
    uint32_t treat_mutable_as_heavyweight;
};

static inline void
__NVC097_SET_MUTABLE_METHOD_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_MUTABLE_METHOD_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.treat_mutable_as_heavyweight < (UINT64_C(1) << 1));
    val |= st.treat_mutable_as_heavyweight << 0;
    *val_out = val;
}

#define V_NVC097_SET_MUTABLE_METHOD_CONTROL(val, args...) { \
    UNUSED uint32_t TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE = NVC097_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE; \
    UNUSED uint32_t TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE = NVC097_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE; \
    struct nv_nvc097_SET_MUTABLE_METHOD_CONTROL __data = { .treat_mutable_as_heavyweight = (args) }; \
    __NVC097_SET_MUTABLE_METHOD_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_MUTABLE_METHOD_CONTROL V_NVC097_SET_MUTABLE_METHOD_CONTROL

#define P_NVC097_SET_MUTABLE_METHOD_CONTROL(push, args...) do { \
    UNUSED uint32_t TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE = NVC097_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE; \
    UNUSED uint32_t TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE = NVC097_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_MUTABLE_METHOD_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_MUTABLE_METHOD_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POST_PS_INITIAL_COVERAGE {
    uint32_t use_pre_ps_coverage;
};

static inline void
__NVC097_SET_POST_PS_INITIAL_COVERAGE(uint32_t *val_out, struct nv_nvc097_SET_POST_PS_INITIAL_COVERAGE st)
{
    uint32_t val = 0;
    
    assert(st.use_pre_ps_coverage < (UINT64_C(1) << 1));
    val |= st.use_pre_ps_coverage << 0;
    *val_out = val;
}

#define V_NVC097_SET_POST_PS_INITIAL_COVERAGE(val, args...) { \
    UNUSED uint32_t USE_PRE_PS_COVERAGE_FALSE = NVC097_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE; \
    UNUSED uint32_t USE_PRE_PS_COVERAGE_TRUE = NVC097_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE; \
    struct nv_nvc097_SET_POST_PS_INITIAL_COVERAGE __data = { .use_pre_ps_coverage = (args) }; \
    __NVC097_SET_POST_PS_INITIAL_COVERAGE(&val, __data); \
}

#define VA_NVC097_SET_POST_PS_INITIAL_COVERAGE V_NVC097_SET_POST_PS_INITIAL_COVERAGE

#define P_NVC097_SET_POST_PS_INITIAL_COVERAGE(push, args...) do { \
    UNUSED uint32_t USE_PRE_PS_COVERAGE_FALSE = NVC097_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE; \
    UNUSED uint32_t USE_PRE_PS_COVERAGE_TRUE = NVC097_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POST_PS_INITIAL_COVERAGE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POST_PS_INITIAL_COVERAGE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FILL_VIA_TRIANGLE {
    uint32_t mode;
};

static inline void
__NVC097_SET_FILL_VIA_TRIANGLE(uint32_t *val_out, struct nv_nvc097_SET_FILL_VIA_TRIANGLE st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 2));
    val |= st.mode << 0;
    *val_out = val;
}

#define V_NVC097_SET_FILL_VIA_TRIANGLE(val, args...) { \
    UNUSED uint32_t MODE_DISABLED = NVC097_SET_FILL_VIA_TRIANGLE_MODE_DISABLED; \
    UNUSED uint32_t MODE_FILL_ALL = NVC097_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL; \
    UNUSED uint32_t MODE_FILL_BBOX = NVC097_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX; \
    struct nv_nvc097_SET_FILL_VIA_TRIANGLE __data = { .mode = (args) }; \
    __NVC097_SET_FILL_VIA_TRIANGLE(&val, __data); \
}

#define VA_NVC097_SET_FILL_VIA_TRIANGLE V_NVC097_SET_FILL_VIA_TRIANGLE

#define P_NVC097_SET_FILL_VIA_TRIANGLE(push, args...) do { \
    UNUSED uint32_t MODE_DISABLED = NVC097_SET_FILL_VIA_TRIANGLE_MODE_DISABLED; \
    UNUSED uint32_t MODE_FILL_ALL = NVC097_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL; \
    UNUSED uint32_t MODE_FILL_BBOX = NVC097_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FILL_VIA_TRIANGLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FILL_VIA_TRIANGLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_FORMAT_ENABLE {
    uint32_t snorm8_unorm16_snorm16;
};

static inline void
__NVC097_SET_BLEND_PER_FORMAT_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_FORMAT_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.snorm8_unorm16_snorm16 < (UINT64_C(1) << 1));
    val |= st.snorm8_unorm16_snorm16 << 4;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_FORMAT_ENABLE(val, args...) { \
    UNUSED uint32_t SNORM8_UNORM16_SNORM16_FALSE = NVC097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE; \
    UNUSED uint32_t SNORM8_UNORM16_SNORM16_TRUE = NVC097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE; \
    struct nv_nvc097_SET_BLEND_PER_FORMAT_ENABLE __data = { .snorm8_unorm16_snorm16 = (args) }; \
    __NVC097_SET_BLEND_PER_FORMAT_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_FORMAT_ENABLE V_NVC097_SET_BLEND_PER_FORMAT_ENABLE

#define P_NVC097_SET_BLEND_PER_FORMAT_ENABLE(push, args...) do { \
    UNUSED uint32_t SNORM8_UNORM16_SNORM16_FALSE = NVC097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE; \
    UNUSED uint32_t SNORM8_UNORM16_SNORM16_TRUE = NVC097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_FORMAT_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_FORMAT_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_FLUSH_PENDING_WRITES {
    uint32_t sm_does_global_store;
};

static inline void
__NVC097_FLUSH_PENDING_WRITES(uint32_t *val_out, struct nv_nvc097_FLUSH_PENDING_WRITES st)
{
    uint32_t val = 0;
    
    assert(st.sm_does_global_store < (UINT64_C(1) << 1));
    val |= st.sm_does_global_store << 0;
    *val_out = val;
}

#define V_NVC097_FLUSH_PENDING_WRITES(val, args...) { \
    struct nv_nvc097_FLUSH_PENDING_WRITES __data = { .sm_does_global_store = (args) }; \
    __NVC097_FLUSH_PENDING_WRITES(&val, __data); \
}

#define VA_NVC097_FLUSH_PENDING_WRITES V_NVC097_FLUSH_PENDING_WRITES

#define P_NVC097_FLUSH_PENDING_WRITES(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_FLUSH_PENDING_WRITES(nvk_p_ret, args); \
    nv_push_val(push, NVC097_FLUSH_PENDING_WRITES, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSERVATIVE_RASTER {
    uint32_t enable;
};

static inline void
__NVC097_SET_CONSERVATIVE_RASTER(uint32_t *val_out, struct nv_nvc097_SET_CONSERVATIVE_RASTER st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_CONSERVATIVE_RASTER(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_CONSERVATIVE_RASTER_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_CONSERVATIVE_RASTER_ENABLE_TRUE; \
    struct nv_nvc097_SET_CONSERVATIVE_RASTER __data = { .enable = (args) }; \
    __NVC097_SET_CONSERVATIVE_RASTER(&val, __data); \
}

#define VA_NVC097_SET_CONSERVATIVE_RASTER V_NVC097_SET_CONSERVATIVE_RASTER

#define P_NVC097_SET_CONSERVATIVE_RASTER(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_CONSERVATIVE_RASTER_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_CONSERVATIVE_RASTER_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSERVATIVE_RASTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSERVATIVE_RASTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_ATTRIBUTE_A {
    uint32_t stream;
    uint32_t source;
    uint32_t offset;
    uint32_t component_bit_widths;
    uint32_t numerical_type;
    uint32_t swap_r_and_b;
};

static inline void
__NVC097_SET_VERTEX_ATTRIBUTE_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_ATTRIBUTE_A st)
{
    uint32_t val = 0;
    
    assert(st.stream < (UINT64_C(1) << 5));
    val |= st.stream << 0;
    
    assert(st.source < (UINT64_C(1) << 1));
    val |= st.source << 6;
    
    assert(st.offset < (UINT64_C(1) << 14));
    val |= st.offset << 7;
    
    assert(st.component_bit_widths < (UINT64_C(1) << 6));
    val |= st.component_bit_widths << 21;
    
    assert(st.numerical_type < (UINT64_C(1) << 3));
    val |= st.numerical_type << 27;
    
    assert(st.swap_r_and_b < (UINT64_C(1) << 1));
    val |= st.swap_r_and_b << 31;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_ATTRIBUTE_A(val, args...) { \
    UNUSED uint32_t SOURCE_ACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE; \
    UNUSED uint32_t SOURCE_INACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_X8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A2B10G10R10 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_B10G11R11 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8; \
    UNUSED uint32_t NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SNORM = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UNORM = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SINT = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UINT = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_USCALED = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SSCALED = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_FLOAT = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT; \
    UNUSED uint32_t SWAP_R_AND_B_FALSE = NVC097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE; \
    UNUSED uint32_t SWAP_R_AND_B_TRUE = NVC097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE; \
    struct nv_nvc097_SET_VERTEX_ATTRIBUTE_A __data = args; \
    __NVC097_SET_VERTEX_ATTRIBUTE_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_ATTRIBUTE_A(i) V_NVC097_SET_VERTEX_ATTRIBUTE_A

#define P_NVC097_SET_VERTEX_ATTRIBUTE_A(push, idx, args...) do { \
    UNUSED uint32_t SOURCE_ACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE; \
    UNUSED uint32_t SOURCE_INACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_X8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A2B10G10R10 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_B10G11R11 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8 = NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8; \
    UNUSED uint32_t NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SNORM = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UNORM = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SINT = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UINT = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_USCALED = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SSCALED = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_FLOAT = NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT; \
    UNUSED uint32_t SWAP_R_AND_B_FALSE = NVC097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE; \
    UNUSED uint32_t SWAP_R_AND_B_TRUE = NVC097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_ATTRIBUTE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_ATTRIBUTE_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_ATTRIBUTE_B {
    uint32_t stream;
    uint32_t source;
    uint32_t offset;
    uint32_t component_bit_widths;
    uint32_t numerical_type;
    uint32_t swap_r_and_b;
};

static inline void
__NVC097_SET_VERTEX_ATTRIBUTE_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_ATTRIBUTE_B st)
{
    uint32_t val = 0;
    
    assert(st.stream < (UINT64_C(1) << 5));
    val |= st.stream << 0;
    
    assert(st.source < (UINT64_C(1) << 1));
    val |= st.source << 6;
    
    assert(st.offset < (UINT64_C(1) << 14));
    val |= st.offset << 7;
    
    assert(st.component_bit_widths < (UINT64_C(1) << 6));
    val |= st.component_bit_widths << 21;
    
    assert(st.numerical_type < (UINT64_C(1) << 3));
    val |= st.numerical_type << 27;
    
    assert(st.swap_r_and_b < (UINT64_C(1) << 1));
    val |= st.swap_r_and_b << 31;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_ATTRIBUTE_B(val, args...) { \
    UNUSED uint32_t SOURCE_ACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE; \
    UNUSED uint32_t SOURCE_INACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_X8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A2B10G10R10 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_B10G11R11 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8; \
    UNUSED uint32_t NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SNORM = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UNORM = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SINT = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UINT = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_USCALED = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SSCALED = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_FLOAT = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT; \
    UNUSED uint32_t SWAP_R_AND_B_FALSE = NVC097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE; \
    UNUSED uint32_t SWAP_R_AND_B_TRUE = NVC097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE; \
    struct nv_nvc097_SET_VERTEX_ATTRIBUTE_B __data = args; \
    __NVC097_SET_VERTEX_ATTRIBUTE_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_ATTRIBUTE_B(i) V_NVC097_SET_VERTEX_ATTRIBUTE_B

#define P_NVC097_SET_VERTEX_ATTRIBUTE_B(push, idx, args...) do { \
    UNUSED uint32_t SOURCE_ACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE; \
    UNUSED uint32_t SOURCE_INACTIVE = NVC097_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32_B32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32_G32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16_B16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_X8B8G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A2B10G10R10 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_B10G11R11 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16_G16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R32 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8_B8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_G8R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8_G8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R16 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_R8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8; \
    UNUSED uint32_t COMPONENT_BIT_WIDTHS_A8 = NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8; \
    UNUSED uint32_t NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SNORM = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UNORM = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SINT = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_UINT = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_USCALED = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_SSCALED = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED; \
    UNUSED uint32_t NUMERICAL_TYPE_NUM_FLOAT = NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT; \
    UNUSED uint32_t SWAP_R_AND_B_FALSE = NVC097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE; \
    UNUSED uint32_t SWAP_R_AND_B_TRUE = NVC097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_ATTRIBUTE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_ATTRIBUTE_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ANTI_ALIAS_SAMPLE_POSITIONS {
    uint32_t x0;
    uint32_t y0;
    uint32_t x1;
    uint32_t y1;
    uint32_t x2;
    uint32_t y2;
    uint32_t x3;
    uint32_t y3;
};

static inline void
__NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(uint32_t *val_out, struct nv_nvc097_SET_ANTI_ALIAS_SAMPLE_POSITIONS st)
{
    uint32_t val = 0;
    
    assert(st.x0 < (UINT64_C(1) << 4));
    val |= st.x0 << 0;
    
    assert(st.y0 < (UINT64_C(1) << 4));
    val |= st.y0 << 4;
    
    assert(st.x1 < (UINT64_C(1) << 4));
    val |= st.x1 << 8;
    
    assert(st.y1 < (UINT64_C(1) << 4));
    val |= st.y1 << 12;
    
    assert(st.x2 < (UINT64_C(1) << 4));
    val |= st.x2 << 16;
    
    assert(st.y2 < (UINT64_C(1) << 4));
    val |= st.y2 << 20;
    
    assert(st.x3 < (UINT64_C(1) << 4));
    val |= st.x3 << 24;
    
    assert(st.y3 < (UINT64_C(1) << 4));
    val |= st.y3 << 28;
    *val_out = val;
}

#define V_NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(val, args...) { \
    struct nv_nvc097_SET_ANTI_ALIAS_SAMPLE_POSITIONS __data = args; \
    __NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(&val, __data); \
}

#define VA_NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) V_NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS

#define P_NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_OFFSET_RENDER_TARGET_INDEX {
    uint32_t by_viewport_index;
};

static inline void
__NVC097_SET_OFFSET_RENDER_TARGET_INDEX(uint32_t *val_out, struct nv_nvc097_SET_OFFSET_RENDER_TARGET_INDEX st)
{
    uint32_t val = 0;
    
    assert(st.by_viewport_index < (UINT64_C(1) << 1));
    val |= st.by_viewport_index << 0;
    *val_out = val;
}

#define V_NVC097_SET_OFFSET_RENDER_TARGET_INDEX(val, args...) { \
    UNUSED uint32_t BY_VIEWPORT_INDEX_FALSE = NVC097_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE; \
    UNUSED uint32_t BY_VIEWPORT_INDEX_TRUE = NVC097_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE; \
    struct nv_nvc097_SET_OFFSET_RENDER_TARGET_INDEX __data = { .by_viewport_index = (args) }; \
    __NVC097_SET_OFFSET_RENDER_TARGET_INDEX(&val, __data); \
}

#define VA_NVC097_SET_OFFSET_RENDER_TARGET_INDEX V_NVC097_SET_OFFSET_RENDER_TARGET_INDEX

#define P_NVC097_SET_OFFSET_RENDER_TARGET_INDEX(push, args...) do { \
    UNUSED uint32_t BY_VIEWPORT_INDEX_FALSE = NVC097_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE; \
    UNUSED uint32_t BY_VIEWPORT_INDEX_TRUE = NVC097_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_OFFSET_RENDER_TARGET_INDEX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_OFFSET_RENDER_TARGET_INDEX, nvk_p_ret); \
} while(0)

struct nv_nvc097_FORCE_HEAVYWEIGHT_METHOD_SYNC {
    uint32_t v;
};

static inline void
__NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC(uint32_t *val_out, struct nv_nvc097_FORCE_HEAVYWEIGHT_METHOD_SYNC st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC(val, args...) { \
    struct nv_nvc097_FORCE_HEAVYWEIGHT_METHOD_SYNC __data = { .v = (args) }; \
    __NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC(&val, __data); \
}

#define VA_NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC V_NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC

#define P_NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC(nvk_p_ret, args); \
    nv_push_val(push, NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COVERAGE_TO_COLOR {
    uint32_t enable;
    uint32_t ct_select;
};

static inline void
__NVC097_SET_COVERAGE_TO_COLOR(uint32_t *val_out, struct nv_nvc097_SET_COVERAGE_TO_COLOR st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.ct_select < (UINT64_C(1) << 3));
    val |= st.ct_select << 4;
    *val_out = val;
}

#define V_NVC097_SET_COVERAGE_TO_COLOR(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_COVERAGE_TO_COLOR_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_COVERAGE_TO_COLOR_ENABLE_TRUE; \
    struct nv_nvc097_SET_COVERAGE_TO_COLOR __data = args; \
    __NVC097_SET_COVERAGE_TO_COLOR(&val, __data); \
}

#define VA_NVC097_SET_COVERAGE_TO_COLOR V_NVC097_SET_COVERAGE_TO_COLOR

#define P_NVC097_SET_COVERAGE_TO_COLOR(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_COVERAGE_TO_COLOR_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_COVERAGE_TO_COLOR_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COVERAGE_TO_COLOR(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COVERAGE_TO_COLOR, nvk_p_ret); \
} while(0)

struct nv_nvc097_DECOMPRESS_ZETA_SURFACE {
    uint32_t z_enable;
    uint32_t stencil_enable;
};

static inline void
__NVC097_DECOMPRESS_ZETA_SURFACE(uint32_t *val_out, struct nv_nvc097_DECOMPRESS_ZETA_SURFACE st)
{
    uint32_t val = 0;
    
    assert(st.z_enable < (UINT64_C(1) << 1));
    val |= st.z_enable << 0;
    
    assert(st.stencil_enable < (UINT64_C(1) << 1));
    val |= st.stencil_enable << 4;
    *val_out = val;
}

#define V_NVC097_DECOMPRESS_ZETA_SURFACE(val, args...) { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE; \
    struct nv_nvc097_DECOMPRESS_ZETA_SURFACE __data = args; \
    __NVC097_DECOMPRESS_ZETA_SURFACE(&val, __data); \
}

#define VA_NVC097_DECOMPRESS_ZETA_SURFACE V_NVC097_DECOMPRESS_ZETA_SURFACE

#define P_NVC097_DECOMPRESS_ZETA_SURFACE(push, args...) do { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_DECOMPRESS_ZETA_SURFACE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DECOMPRESS_ZETA_SURFACE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SCREEN_STATE_MASK {
    uint32_t mask;
};

static inline void
__NVC097_SET_SCREEN_STATE_MASK(uint32_t *val_out, struct nv_nvc097_SET_SCREEN_STATE_MASK st)
{
    uint32_t val = 0;
    
    assert(st.mask < (UINT64_C(1) << 4));
    val |= st.mask << 0;
    *val_out = val;
}

#define V_NVC097_SET_SCREEN_STATE_MASK(val, args...) { \
    struct nv_nvc097_SET_SCREEN_STATE_MASK __data = { .mask = (args) }; \
    __NVC097_SET_SCREEN_STATE_MASK(&val, __data); \
}

#define VA_NVC097_SET_SCREEN_STATE_MASK V_NVC097_SET_SCREEN_STATE_MASK

#define P_NVC097_SET_SCREEN_STATE_MASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SCREEN_STATE_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SCREEN_STATE_MASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_SPARSE {
    uint32_t enable;
    uint32_t unmapped_compare;
};

static inline void
__NVC097_SET_ZT_SPARSE(uint32_t *val_out, struct nv_nvc097_SET_ZT_SPARSE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.unmapped_compare < (UINT64_C(1) << 1));
    val |= st.unmapped_compare << 1;
    *val_out = val;
}

#define V_NVC097_SET_ZT_SPARSE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZT_SPARSE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZT_SPARSE_ENABLE_TRUE; \
    UNUSED uint32_t UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 = NVC097_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0; \
    UNUSED uint32_t UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS = NVC097_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS; \
    struct nv_nvc097_SET_ZT_SPARSE __data = args; \
    __NVC097_SET_ZT_SPARSE(&val, __data); \
}

#define VA_NVC097_SET_ZT_SPARSE V_NVC097_SET_ZT_SPARSE

#define P_NVC097_SET_ZT_SPARSE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZT_SPARSE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZT_SPARSE_ENABLE_TRUE; \
    UNUSED uint32_t UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 = NVC097_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0; \
    UNUSED uint32_t UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS = NVC097_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_SPARSE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_SPARSE, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_SAMPLER_CACHE_ALL {
    uint32_t v;
};

static inline void
__NVC097_INVALIDATE_SAMPLER_CACHE_ALL(uint32_t *val_out, struct nv_nvc097_INVALIDATE_SAMPLER_CACHE_ALL st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_SAMPLER_CACHE_ALL(val, args...) { \
    struct nv_nvc097_INVALIDATE_SAMPLER_CACHE_ALL __data = { .v = (args) }; \
    __NVC097_INVALIDATE_SAMPLER_CACHE_ALL(&val, __data); \
}

#define VA_NVC097_INVALIDATE_SAMPLER_CACHE_ALL V_NVC097_INVALIDATE_SAMPLER_CACHE_ALL

#define P_NVC097_INVALIDATE_SAMPLER_CACHE_ALL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_SAMPLER_CACHE_ALL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_SAMPLER_CACHE_ALL, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL {
    uint32_t v;
};

static inline void
__NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL(uint32_t *val_out, struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL(val, args...) { \
    struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL __data = { .v = (args) }; \
    __NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL(&val, __data); \
}

#define VA_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL

#define P_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST {
    uint32_t start_index;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST(uint32_t *val_out, struct nv_nvc097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST st)
{
    uint32_t val = 0;
    
    assert(st.start_index < (UINT64_C(1) << 16));
    val |= st.start_index << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST __data = args; \
    __NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST(&val, __data); \
}

#define VA_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST V_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST

#define P_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT {
    uint32_t start_index;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT(uint32_t *val_out, struct nv_nvc097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT st)
{
    uint32_t val = 0;
    
    assert(st.start_index < (UINT64_C(1) << 16));
    val |= st.start_index << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT __data = args; \
    __NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT(&val, __data); \
}

#define VA_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT V_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT

#define P_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CT_SELECT {
    uint32_t target_count;
    uint32_t target0;
    uint32_t target1;
    uint32_t target2;
    uint32_t target3;
    uint32_t target4;
    uint32_t target5;
    uint32_t target6;
    uint32_t target7;
};

static inline void
__NVC097_SET_CT_SELECT(uint32_t *val_out, struct nv_nvc097_SET_CT_SELECT st)
{
    uint32_t val = 0;
    
    assert(st.target_count < (UINT64_C(1) << 4));
    val |= st.target_count << 0;
    
    assert(st.target0 < (UINT64_C(1) << 3));
    val |= st.target0 << 4;
    
    assert(st.target1 < (UINT64_C(1) << 3));
    val |= st.target1 << 7;
    
    assert(st.target2 < (UINT64_C(1) << 3));
    val |= st.target2 << 10;
    
    assert(st.target3 < (UINT64_C(1) << 3));
    val |= st.target3 << 13;
    
    assert(st.target4 < (UINT64_C(1) << 3));
    val |= st.target4 << 16;
    
    assert(st.target5 < (UINT64_C(1) << 3));
    val |= st.target5 << 19;
    
    assert(st.target6 < (UINT64_C(1) << 3));
    val |= st.target6 << 22;
    
    assert(st.target7 < (UINT64_C(1) << 3));
    val |= st.target7 << 25;
    *val_out = val;
}

#define V_NVC097_SET_CT_SELECT(val, args...) { \
    struct nv_nvc097_SET_CT_SELECT __data = args; \
    __NVC097_SET_CT_SELECT(&val, __data); \
}

#define VA_NVC097_SET_CT_SELECT V_NVC097_SET_CT_SELECT

#define P_NVC097_SET_CT_SELECT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CT_SELECT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CT_SELECT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COMPRESSION_THRESHOLD {
    uint32_t samples;
};

static inline void
__NVC097_SET_COMPRESSION_THRESHOLD(uint32_t *val_out, struct nv_nvc097_SET_COMPRESSION_THRESHOLD st)
{
    uint32_t val = 0;
    
    assert(st.samples < (UINT64_C(1) << 4));
    val |= st.samples << 0;
    *val_out = val;
}

#define V_NVC097_SET_COMPRESSION_THRESHOLD(val, args...) { \
    UNUSED uint32_t SAMPLES__0 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__0; \
    UNUSED uint32_t SAMPLES__1 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__1; \
    UNUSED uint32_t SAMPLES__2 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__2; \
    UNUSED uint32_t SAMPLES__4 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__4; \
    UNUSED uint32_t SAMPLES__8 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__8; \
    UNUSED uint32_t SAMPLES__16 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__16; \
    UNUSED uint32_t SAMPLES__32 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__32; \
    UNUSED uint32_t SAMPLES__64 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__64; \
    UNUSED uint32_t SAMPLES__128 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__128; \
    UNUSED uint32_t SAMPLES__256 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__256; \
    UNUSED uint32_t SAMPLES__512 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__512; \
    UNUSED uint32_t SAMPLES__1024 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__1024; \
    UNUSED uint32_t SAMPLES__2048 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__2048; \
    struct nv_nvc097_SET_COMPRESSION_THRESHOLD __data = { .samples = (args) }; \
    __NVC097_SET_COMPRESSION_THRESHOLD(&val, __data); \
}

#define VA_NVC097_SET_COMPRESSION_THRESHOLD V_NVC097_SET_COMPRESSION_THRESHOLD

#define P_NVC097_SET_COMPRESSION_THRESHOLD(push, args...) do { \
    UNUSED uint32_t SAMPLES__0 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__0; \
    UNUSED uint32_t SAMPLES__1 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__1; \
    UNUSED uint32_t SAMPLES__2 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__2; \
    UNUSED uint32_t SAMPLES__4 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__4; \
    UNUSED uint32_t SAMPLES__8 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__8; \
    UNUSED uint32_t SAMPLES__16 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__16; \
    UNUSED uint32_t SAMPLES__32 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__32; \
    UNUSED uint32_t SAMPLES__64 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__64; \
    UNUSED uint32_t SAMPLES__128 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__128; \
    UNUSED uint32_t SAMPLES__256 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__256; \
    UNUSED uint32_t SAMPLES__512 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__512; \
    UNUSED uint32_t SAMPLES__1024 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__1024; \
    UNUSED uint32_t SAMPLES__2048 = NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__2048; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COMPRESSION_THRESHOLD(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COMPRESSION_THRESHOLD, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIXEL_SHADER_INTERLOCK_CONTROL {
    uint32_t tile_coalescer_mode;
    uint32_t tile_coalescer_tile_size;
    uint32_t tile_coalescer_fragment_order;
};

static inline void
__NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_PIXEL_SHADER_INTERLOCK_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.tile_coalescer_mode < (UINT64_C(1) << 2));
    val |= st.tile_coalescer_mode << 0;
    
    assert(st.tile_coalescer_tile_size < (UINT64_C(1) << 1));
    val |= st.tile_coalescer_tile_size << 2;
    
    assert(st.tile_coalescer_fragment_order < (UINT64_C(1) << 1));
    val |= st.tile_coalescer_fragment_order << 3;
    *val_out = val;
}

#define V_NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL(val, args...) { \
    UNUSED uint32_t TILE_COALESCER_MODE_NO_CONFLICT_DETECT = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT; \
    UNUSED uint32_t TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE; \
    UNUSED uint32_t TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL; \
    UNUSED uint32_t TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16; \
    UNUSED uint32_t TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8; \
    UNUSED uint32_t TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED; \
    UNUSED uint32_t TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED; \
    struct nv_nvc097_SET_PIXEL_SHADER_INTERLOCK_CONTROL __data = args; \
    __NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL V_NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL

#define P_NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL(push, args...) do { \
    UNUSED uint32_t TILE_COALESCER_MODE_NO_CONFLICT_DETECT = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT; \
    UNUSED uint32_t TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE; \
    UNUSED uint32_t TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL; \
    UNUSED uint32_t TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16; \
    UNUSED uint32_t TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8; \
    UNUSED uint32_t TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED; \
    UNUSED uint32_t TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED = NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_SIZE_A {
    uint32_t width;
};

static inline void
__NVC097_SET_ZT_SIZE_A(uint32_t *val_out, struct nv_nvc097_SET_ZT_SIZE_A st)
{
    uint32_t val = 0;
    
    assert(st.width < (UINT64_C(1) << 28));
    val |= st.width << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZT_SIZE_A(val, args...) { \
    struct nv_nvc097_SET_ZT_SIZE_A __data = { .width = (args) }; \
    __NVC097_SET_ZT_SIZE_A(&val, __data); \
}

#define VA_NVC097_SET_ZT_SIZE_A V_NVC097_SET_ZT_SIZE_A

#define P_NVC097_SET_ZT_SIZE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_SIZE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_SIZE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_SIZE_B {
    uint32_t height;
};

static inline void
__NVC097_SET_ZT_SIZE_B(uint32_t *val_out, struct nv_nvc097_SET_ZT_SIZE_B st)
{
    uint32_t val = 0;
    
    assert(st.height < (UINT64_C(1) << 18));
    val |= st.height << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZT_SIZE_B(val, args...) { \
    struct nv_nvc097_SET_ZT_SIZE_B __data = { .height = (args) }; \
    __NVC097_SET_ZT_SIZE_B(&val, __data); \
}

#define VA_NVC097_SET_ZT_SIZE_B V_NVC097_SET_ZT_SIZE_B

#define P_NVC097_SET_ZT_SIZE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_SIZE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_SIZE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_SIZE_C {
    uint32_t third_dimension;
    uint32_t control;
};

static inline void
__NVC097_SET_ZT_SIZE_C(uint32_t *val_out, struct nv_nvc097_SET_ZT_SIZE_C st)
{
    uint32_t val = 0;
    
    assert(st.third_dimension < (UINT64_C(1) << 16));
    val |= st.third_dimension << 0;
    
    assert(st.control < (UINT64_C(1) << 1));
    val |= st.control << 16;
    *val_out = val;
}

#define V_NVC097_SET_ZT_SIZE_C(val, args...) { \
    UNUSED uint32_t CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE = NVC097_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE; \
    UNUSED uint32_t CONTROL_ARRAY_SIZE_IS_ONE = NVC097_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE; \
    struct nv_nvc097_SET_ZT_SIZE_C __data = args; \
    __NVC097_SET_ZT_SIZE_C(&val, __data); \
}

#define VA_NVC097_SET_ZT_SIZE_C V_NVC097_SET_ZT_SIZE_C

#define P_NVC097_SET_ZT_SIZE_C(push, args...) do { \
    UNUSED uint32_t CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE = NVC097_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE; \
    UNUSED uint32_t CONTROL_ARRAY_SIZE_IS_ONE = NVC097_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_SIZE_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_SIZE_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SAMPLER_BINDING {
    uint32_t v;
};

static inline void
__NVC097_SET_SAMPLER_BINDING(uint32_t *val_out, struct nv_nvc097_SET_SAMPLER_BINDING st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_SAMPLER_BINDING(val, args...) { \
    UNUSED uint32_t V_INDEPENDENTLY = NVC097_SET_SAMPLER_BINDING_V_INDEPENDENTLY; \
    UNUSED uint32_t V_VIA_HEADER_BINDING = NVC097_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING; \
    struct nv_nvc097_SET_SAMPLER_BINDING __data = { .v = (args) }; \
    __NVC097_SET_SAMPLER_BINDING(&val, __data); \
}

#define VA_NVC097_SET_SAMPLER_BINDING V_NVC097_SET_SAMPLER_BINDING

#define P_NVC097_SET_SAMPLER_BINDING(push, args...) do { \
    UNUSED uint32_t V_INDEPENDENTLY = NVC097_SET_SAMPLER_BINDING_V_INDEPENDENTLY; \
    UNUSED uint32_t V_VIA_HEADER_BINDING = NVC097_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SAMPLER_BINDING(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SAMPLER_BINDING, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_AUTO {
    uint32_t byte_count;
};

static inline void
__NVC097_DRAW_AUTO(uint32_t *val_out, struct nv_nvc097_DRAW_AUTO st)
{
    uint32_t val = 0;
    
    val |= st.byte_count;
    *val_out = val;
}

#define V_NVC097_DRAW_AUTO(val, args...) { \
    struct nv_nvc097_DRAW_AUTO __data = { .byte_count = (args) }; \
    __NVC097_DRAW_AUTO(&val, __data); \
}

#define VA_NVC097_DRAW_AUTO V_NVC097_DRAW_AUTO

#define P_NVC097_DRAW_AUTO(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_AUTO(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_AUTO, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK {
    uint32_t v;
};

static inline void
__NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(uint32_t *val_out, struct nv_nvc097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(val, args...) { \
    struct nv_nvc097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK __data = { .v = (args) }; \
    __NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(&val, __data); \
}

#define VA_NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) V_NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK

#define P_NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE {
    uint32_t ticket_dispenser_index;
    uint32_t ticket_dispenser_value;
};

static inline void
__NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE(uint32_t *val_out, struct nv_nvc097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE st)
{
    uint32_t val = 0;
    
    assert(st.ticket_dispenser_index < (UINT64_C(1) << 8));
    val |= st.ticket_dispenser_index << 0;
    
    assert(st.ticket_dispenser_value < (UINT64_C(1) << 16));
    val |= st.ticket_dispenser_value << 8;
    *val_out = val;
}

#define V_NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE(val, args...) { \
    struct nv_nvc097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE __data = args; \
    __NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE(&val, __data); \
}

#define VA_NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE V_NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE

#define P_NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_END_COPY_A {
    uint32_t dwords;
    uint32_t saturate32_enable;
    uint32_t timestamp_enable;
};

static inline void
__NVC097_SET_BACK_END_COPY_A(uint32_t *val_out, struct nv_nvc097_SET_BACK_END_COPY_A st)
{
    uint32_t val = 0;
    
    assert(st.dwords < (UINT64_C(1) << 8));
    val |= st.dwords << 0;
    
    assert(st.saturate32_enable < (UINT64_C(1) << 1));
    val |= st.saturate32_enable << 8;
    
    assert(st.timestamp_enable < (UINT64_C(1) << 1));
    val |= st.timestamp_enable << 12;
    *val_out = val;
}

#define V_NVC097_SET_BACK_END_COPY_A(val, args...) { \
    UNUSED uint32_t SATURATE32_ENABLE_FALSE = NVC097_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE; \
    UNUSED uint32_t SATURATE32_ENABLE_TRUE = NVC097_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE; \
    UNUSED uint32_t TIMESTAMP_ENABLE_FALSE = NVC097_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE; \
    UNUSED uint32_t TIMESTAMP_ENABLE_TRUE = NVC097_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE; \
    struct nv_nvc097_SET_BACK_END_COPY_A __data = args; \
    __NVC097_SET_BACK_END_COPY_A(&val, __data); \
}

#define VA_NVC097_SET_BACK_END_COPY_A V_NVC097_SET_BACK_END_COPY_A

#define P_NVC097_SET_BACK_END_COPY_A(push, args...) do { \
    UNUSED uint32_t SATURATE32_ENABLE_FALSE = NVC097_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE; \
    UNUSED uint32_t SATURATE32_ENABLE_TRUE = NVC097_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE; \
    UNUSED uint32_t TIMESTAMP_ENABLE_FALSE = NVC097_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE; \
    UNUSED uint32_t TIMESTAMP_ENABLE_TRUE = NVC097_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_END_COPY_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_END_COPY_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_END_COPY_B {
    uint32_t src_address_upper;
};

static inline void
__NVC097_SET_BACK_END_COPY_B(uint32_t *val_out, struct nv_nvc097_SET_BACK_END_COPY_B st)
{
    uint32_t val = 0;
    
    assert(st.src_address_upper < (UINT64_C(1) << 8));
    val |= st.src_address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_BACK_END_COPY_B(val, args...) { \
    struct nv_nvc097_SET_BACK_END_COPY_B __data = { .src_address_upper = (args) }; \
    __NVC097_SET_BACK_END_COPY_B(&val, __data); \
}

#define VA_NVC097_SET_BACK_END_COPY_B V_NVC097_SET_BACK_END_COPY_B

#define P_NVC097_SET_BACK_END_COPY_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_END_COPY_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_END_COPY_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_END_COPY_C {
    uint32_t src_address_lower;
};

static inline void
__NVC097_SET_BACK_END_COPY_C(uint32_t *val_out, struct nv_nvc097_SET_BACK_END_COPY_C st)
{
    uint32_t val = 0;
    
    val |= st.src_address_lower;
    *val_out = val;
}

#define V_NVC097_SET_BACK_END_COPY_C(val, args...) { \
    struct nv_nvc097_SET_BACK_END_COPY_C __data = { .src_address_lower = (args) }; \
    __NVC097_SET_BACK_END_COPY_C(&val, __data); \
}

#define VA_NVC097_SET_BACK_END_COPY_C V_NVC097_SET_BACK_END_COPY_C

#define P_NVC097_SET_BACK_END_COPY_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_END_COPY_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_END_COPY_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_END_COPY_D {
    uint32_t dest_address_upper;
};

static inline void
__NVC097_SET_BACK_END_COPY_D(uint32_t *val_out, struct nv_nvc097_SET_BACK_END_COPY_D st)
{
    uint32_t val = 0;
    
    assert(st.dest_address_upper < (UINT64_C(1) << 8));
    val |= st.dest_address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_BACK_END_COPY_D(val, args...) { \
    struct nv_nvc097_SET_BACK_END_COPY_D __data = { .dest_address_upper = (args) }; \
    __NVC097_SET_BACK_END_COPY_D(&val, __data); \
}

#define VA_NVC097_SET_BACK_END_COPY_D V_NVC097_SET_BACK_END_COPY_D

#define P_NVC097_SET_BACK_END_COPY_D(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_END_COPY_D(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_END_COPY_D, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_END_COPY_E {
    uint32_t dest_address_lower;
};

static inline void
__NVC097_SET_BACK_END_COPY_E(uint32_t *val_out, struct nv_nvc097_SET_BACK_END_COPY_E st)
{
    uint32_t val = 0;
    
    val |= st.dest_address_lower;
    *val_out = val;
}

#define V_NVC097_SET_BACK_END_COPY_E(val, args...) { \
    struct nv_nvc097_SET_BACK_END_COPY_E __data = { .dest_address_lower = (args) }; \
    __NVC097_SET_BACK_END_COPY_E(&val, __data); \
}

#define VA_NVC097_SET_BACK_END_COPY_E V_NVC097_SET_BACK_END_COPY_E

#define P_NVC097_SET_BACK_END_COPY_E(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_END_COPY_E(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_END_COPY_E, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CIRCULAR_BUFFER_SIZE {
    uint32_t cache_lines_per_sm;
};

static inline void
__NVC097_SET_CIRCULAR_BUFFER_SIZE(uint32_t *val_out, struct nv_nvc097_SET_CIRCULAR_BUFFER_SIZE st)
{
    uint32_t val = 0;
    
    assert(st.cache_lines_per_sm < (UINT64_C(1) << 22));
    val |= st.cache_lines_per_sm << 0;
    *val_out = val;
}

#define V_NVC097_SET_CIRCULAR_BUFFER_SIZE(val, args...) { \
    struct nv_nvc097_SET_CIRCULAR_BUFFER_SIZE __data = { .cache_lines_per_sm = (args) }; \
    __NVC097_SET_CIRCULAR_BUFFER_SIZE(&val, __data); \
}

#define VA_NVC097_SET_CIRCULAR_BUFFER_SIZE V_NVC097_SET_CIRCULAR_BUFFER_SIZE

#define P_NVC097_SET_CIRCULAR_BUFFER_SIZE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CIRCULAR_BUFFER_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CIRCULAR_BUFFER_SIZE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VTG_REGISTER_WATERMARKS {
    uint32_t low;
    uint32_t high;
};

static inline void
__NVC097_SET_VTG_REGISTER_WATERMARKS(uint32_t *val_out, struct nv_nvc097_SET_VTG_REGISTER_WATERMARKS st)
{
    uint32_t val = 0;
    
    assert(st.low < (UINT64_C(1) << 16));
    val |= st.low << 0;
    
    assert(st.high < (UINT64_C(1) << 16));
    val |= st.high << 16;
    *val_out = val;
}

#define V_NVC097_SET_VTG_REGISTER_WATERMARKS(val, args...) { \
    struct nv_nvc097_SET_VTG_REGISTER_WATERMARKS __data = args; \
    __NVC097_SET_VTG_REGISTER_WATERMARKS(&val, __data); \
}

#define VA_NVC097_SET_VTG_REGISTER_WATERMARKS V_NVC097_SET_VTG_REGISTER_WATERMARKS

#define P_NVC097_SET_VTG_REGISTER_WATERMARKS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VTG_REGISTER_WATERMARKS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VTG_REGISTER_WATERMARKS, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI {
    uint32_t lines;
    uint32_t tag;
};

static inline void
__NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI(uint32_t *val_out, struct nv_nvc097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI st)
{
    uint32_t val = 0;
    
    assert(st.lines < (UINT64_C(1) << 1));
    val |= st.lines << 0;
    
    assert(st.tag < (UINT64_C(1) << 22));
    val |= st.tag << 4;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI(val, args...) { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE; \
    struct nv_nvc097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI __data = args; \
    __NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI(&val, __data); \
}

#define VA_NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI V_NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI

#define P_NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI(push, args...) do { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS {
    uint32_t policy;
};

static inline void
__NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS(uint32_t *val_out, struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS st)
{
    uint32_t val = 0;
    
    assert(st.policy < (UINT64_C(1) << 2));
    val |= st.policy << 4;
    *val_out = val;
}

#define V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS(val, args...) { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST; \
    struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS __data = { .policy = (args) }; \
    __NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS(&val, __data); \
}

#define VA_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS

#define P_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS(push, args...) do { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE {
    uint32_t v;
};

static inline void
__NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE(uint32_t *val_out, struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE(val, args...) { \
    struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE __data = { .v = (args) }; \
    __NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE(&val, __data); \
}

#define VA_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE V_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE

#define P_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE, nvk_p_ret); \
} while(0)

struct nv_nvc097_CLEAR_ZCULL_REGION {
    uint32_t z_enable;
    uint32_t stencil_enable;
    uint32_t use_clear_rect;
    uint32_t use_rt_array_index;
    uint32_t rt_array_index;
    uint32_t make_conservative;
};

static inline void
__NVC097_CLEAR_ZCULL_REGION(uint32_t *val_out, struct nv_nvc097_CLEAR_ZCULL_REGION st)
{
    uint32_t val = 0;
    
    assert(st.z_enable < (UINT64_C(1) << 1));
    val |= st.z_enable << 0;
    
    assert(st.stencil_enable < (UINT64_C(1) << 1));
    val |= st.stencil_enable << 4;
    
    assert(st.use_clear_rect < (UINT64_C(1) << 1));
    val |= st.use_clear_rect << 1;
    
    assert(st.use_rt_array_index < (UINT64_C(1) << 1));
    val |= st.use_rt_array_index << 2;
    
    assert(st.rt_array_index < (UINT64_C(1) << 16));
    val |= st.rt_array_index << 5;
    
    assert(st.make_conservative < (UINT64_C(1) << 1));
    val |= st.make_conservative << 3;
    *val_out = val;
}

#define V_NVC097_CLEAR_ZCULL_REGION(val, args...) { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE; \
    UNUSED uint32_t USE_CLEAR_RECT_FALSE = NVC097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE; \
    UNUSED uint32_t USE_CLEAR_RECT_TRUE = NVC097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE; \
    UNUSED uint32_t USE_RT_ARRAY_INDEX_FALSE = NVC097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE; \
    UNUSED uint32_t USE_RT_ARRAY_INDEX_TRUE = NVC097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE; \
    UNUSED uint32_t MAKE_CONSERVATIVE_FALSE = NVC097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE; \
    UNUSED uint32_t MAKE_CONSERVATIVE_TRUE = NVC097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE; \
    struct nv_nvc097_CLEAR_ZCULL_REGION __data = args; \
    __NVC097_CLEAR_ZCULL_REGION(&val, __data); \
}

#define VA_NVC097_CLEAR_ZCULL_REGION V_NVC097_CLEAR_ZCULL_REGION

#define P_NVC097_CLEAR_ZCULL_REGION(push, args...) do { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE; \
    UNUSED uint32_t USE_CLEAR_RECT_FALSE = NVC097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE; \
    UNUSED uint32_t USE_CLEAR_RECT_TRUE = NVC097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE; \
    UNUSED uint32_t USE_RT_ARRAY_INDEX_FALSE = NVC097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE; \
    UNUSED uint32_t USE_RT_ARRAY_INDEX_TRUE = NVC097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE; \
    UNUSED uint32_t MAKE_CONSERVATIVE_FALSE = NVC097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE; \
    UNUSED uint32_t MAKE_CONSERVATIVE_TRUE = NVC097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_CLEAR_ZCULL_REGION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CLEAR_ZCULL_REGION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_TEST {
    uint32_t enable;
};

static inline void
__NVC097_SET_DEPTH_TEST(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_TEST st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_TEST(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DEPTH_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DEPTH_TEST_ENABLE_TRUE; \
    struct nv_nvc097_SET_DEPTH_TEST __data = { .enable = (args) }; \
    __NVC097_SET_DEPTH_TEST(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_TEST V_NVC097_SET_DEPTH_TEST

#define P_NVC097_SET_DEPTH_TEST(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DEPTH_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DEPTH_TEST_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_TEST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_TEST, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FILL_MODE {
    uint32_t v;
};

static inline void
__NVC097_SET_FILL_MODE(uint32_t *val_out, struct nv_nvc097_SET_FILL_MODE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FILL_MODE(val, args...) { \
    UNUSED uint32_t V_POINT = NVC097_SET_FILL_MODE_V_POINT; \
    UNUSED uint32_t V_WIREFRAME = NVC097_SET_FILL_MODE_V_WIREFRAME; \
    UNUSED uint32_t V_SOLID = NVC097_SET_FILL_MODE_V_SOLID; \
    struct nv_nvc097_SET_FILL_MODE __data = { .v = (args) }; \
    __NVC097_SET_FILL_MODE(&val, __data); \
}

#define VA_NVC097_SET_FILL_MODE V_NVC097_SET_FILL_MODE

#define P_NVC097_SET_FILL_MODE(push, args...) do { \
    UNUSED uint32_t V_POINT = NVC097_SET_FILL_MODE_V_POINT; \
    UNUSED uint32_t V_WIREFRAME = NVC097_SET_FILL_MODE_V_WIREFRAME; \
    UNUSED uint32_t V_SOLID = NVC097_SET_FILL_MODE_V_SOLID; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FILL_MODE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FILL_MODE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADE_MODE {
    uint32_t v;
};

static inline void
__NVC097_SET_SHADE_MODE(uint32_t *val_out, struct nv_nvc097_SET_SHADE_MODE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SHADE_MODE(val, args...) { \
    UNUSED uint32_t V_FLAT = NVC097_SET_SHADE_MODE_V_FLAT; \
    UNUSED uint32_t V_GOURAUD = NVC097_SET_SHADE_MODE_V_GOURAUD; \
    UNUSED uint32_t V_OGL_FLAT = NVC097_SET_SHADE_MODE_V_OGL_FLAT; \
    UNUSED uint32_t V_OGL_SMOOTH = NVC097_SET_SHADE_MODE_V_OGL_SMOOTH; \
    struct nv_nvc097_SET_SHADE_MODE __data = { .v = (args) }; \
    __NVC097_SET_SHADE_MODE(&val, __data); \
}

#define VA_NVC097_SET_SHADE_MODE V_NVC097_SET_SHADE_MODE

#define P_NVC097_SET_SHADE_MODE(push, args...) do { \
    UNUSED uint32_t V_FLAT = NVC097_SET_SHADE_MODE_V_FLAT; \
    UNUSED uint32_t V_GOURAUD = NVC097_SET_SHADE_MODE_V_GOURAUD; \
    UNUSED uint32_t V_OGL_FLAT = NVC097_SET_SHADE_MODE_V_OGL_FLAT; \
    UNUSED uint32_t V_OGL_SMOOTH = NVC097_SET_SHADE_MODE_V_OGL_SMOOTH; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADE_MODE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADE_MODE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS {
    uint32_t policy;
};

static inline void
__NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS(uint32_t *val_out, struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS st)
{
    uint32_t val = 0;
    
    assert(st.policy < (UINT64_C(1) << 2));
    val |= st.policy << 4;
    *val_out = val;
}

#define V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS(val, args...) { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST; \
    struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS __data = { .policy = (args) }; \
    __NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS(&val, __data); \
}

#define VA_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS

#define P_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS(push, args...) do { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS {
    uint32_t policy;
};

static inline void
__NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS(uint32_t *val_out, struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS st)
{
    uint32_t val = 0;
    
    assert(st.policy < (UINT64_C(1) << 2));
    val |= st.policy << 4;
    *val_out = val;
}

#define V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS(val, args...) { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST; \
    struct nv_nvc097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS __data = { .policy = (args) }; \
    __NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS(&val, __data); \
}

#define VA_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS

#define P_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS(push, args...) do { \
    UNUSED uint32_t POLICY_EVICT_FIRST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST; \
    UNUSED uint32_t POLICY_EVICT_NORMAL = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL; \
    UNUSED uint32_t POLICY_EVICT_LAST = NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL {
    uint32_t dither_footprint;
};

static inline void
__NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.dither_footprint < (UINT64_C(1) << 4));
    val |= st.dither_footprint << 0;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL(val, args...) { \
    UNUSED uint32_t DITHER_FOOTPRINT_PIXELS_1X1 = NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1; \
    UNUSED uint32_t DITHER_FOOTPRINT_PIXELS_2X2 = NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2; \
    UNUSED uint32_t DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES = NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES; \
    struct nv_nvc097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL __data = { .dither_footprint = (args) }; \
    __NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL V_NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL

#define P_NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL(push, args...) do { \
    UNUSED uint32_t DITHER_FOOTPRINT_PIXELS_1X1 = NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1; \
    UNUSED uint32_t DITHER_FOOTPRINT_PIXELS_2X2 = NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2; \
    UNUSED uint32_t DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES = NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_STATE_PER_TARGET {
    uint32_t enable;
};

static inline void
__NVC097_SET_BLEND_STATE_PER_TARGET(uint32_t *val_out, struct nv_nvc097_SET_BLEND_STATE_PER_TARGET st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_STATE_PER_TARGET(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE; \
    struct nv_nvc097_SET_BLEND_STATE_PER_TARGET __data = { .enable = (args) }; \
    __NVC097_SET_BLEND_STATE_PER_TARGET(&val, __data); \
}

#define VA_NVC097_SET_BLEND_STATE_PER_TARGET V_NVC097_SET_BLEND_STATE_PER_TARGET

#define P_NVC097_SET_BLEND_STATE_PER_TARGET(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_STATE_PER_TARGET(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_STATE_PER_TARGET, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_WRITE {
    uint32_t enable;
};

static inline void
__NVC097_SET_DEPTH_WRITE(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_WRITE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_WRITE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DEPTH_WRITE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DEPTH_WRITE_ENABLE_TRUE; \
    struct nv_nvc097_SET_DEPTH_WRITE __data = { .enable = (args) }; \
    __NVC097_SET_DEPTH_WRITE(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_WRITE V_NVC097_SET_DEPTH_WRITE

#define P_NVC097_SET_DEPTH_WRITE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DEPTH_WRITE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DEPTH_WRITE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_WRITE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_WRITE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_TEST {
    uint32_t enable;
};

static inline void
__NVC097_SET_ALPHA_TEST(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_TEST st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_TEST(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ALPHA_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ALPHA_TEST_ENABLE_TRUE; \
    struct nv_nvc097_SET_ALPHA_TEST __data = { .enable = (args) }; \
    __NVC097_SET_ALPHA_TEST(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_TEST V_NVC097_SET_ALPHA_TEST

#define P_NVC097_SET_ALPHA_TEST(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ALPHA_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ALPHA_TEST_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_TEST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_TEST, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INLINE_INDEX4X8_ALIGN {
    uint32_t count;
    uint32_t start;
};

static inline void
__NVC097_SET_INLINE_INDEX4X8_ALIGN(uint32_t *val_out, struct nv_nvc097_SET_INLINE_INDEX4X8_ALIGN st)
{
    uint32_t val = 0;
    
    assert(st.count < (UINT64_C(1) << 30));
    val |= st.count << 0;
    
    assert(st.start < (UINT64_C(1) << 2));
    val |= st.start << 30;
    *val_out = val;
}

#define V_NVC097_SET_INLINE_INDEX4X8_ALIGN(val, args...) { \
    struct nv_nvc097_SET_INLINE_INDEX4X8_ALIGN __data = args; \
    __NVC097_SET_INLINE_INDEX4X8_ALIGN(&val, __data); \
}

#define VA_NVC097_SET_INLINE_INDEX4X8_ALIGN V_NVC097_SET_INLINE_INDEX4X8_ALIGN

#define P_NVC097_SET_INLINE_INDEX4X8_ALIGN(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INLINE_INDEX4X8_ALIGN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INLINE_INDEX4X8_ALIGN, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INLINE_INDEX4X8 {
    uint32_t index0;
    uint32_t index1;
    uint32_t index2;
    uint32_t index3;
};

static inline void
__NVC097_DRAW_INLINE_INDEX4X8(uint32_t *val_out, struct nv_nvc097_DRAW_INLINE_INDEX4X8 st)
{
    uint32_t val = 0;
    
    assert(st.index0 < (UINT64_C(1) << 8));
    val |= st.index0 << 0;
    
    assert(st.index1 < (UINT64_C(1) << 8));
    val |= st.index1 << 8;
    
    assert(st.index2 < (UINT64_C(1) << 8));
    val |= st.index2 << 16;
    
    assert(st.index3 < (UINT64_C(1) << 8));
    val |= st.index3 << 24;
    *val_out = val;
}

#define V_NVC097_DRAW_INLINE_INDEX4X8(val, args...) { \
    struct nv_nvc097_DRAW_INLINE_INDEX4X8 __data = args; \
    __NVC097_DRAW_INLINE_INDEX4X8(&val, __data); \
}

#define VA_NVC097_DRAW_INLINE_INDEX4X8 V_NVC097_DRAW_INLINE_INDEX4X8

#define P_NVC097_DRAW_INLINE_INDEX4X8(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INLINE_INDEX4X8(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INLINE_INDEX4X8, nvk_p_ret); \
} while(0)

struct nv_nvc097_D3D_SET_CULL_MODE {
    uint32_t v;
};

static inline void
__NVC097_D3D_SET_CULL_MODE(uint32_t *val_out, struct nv_nvc097_D3D_SET_CULL_MODE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_D3D_SET_CULL_MODE(val, args...) { \
    UNUSED uint32_t V_NONE = NVC097_D3D_SET_CULL_MODE_V_NONE; \
    UNUSED uint32_t V_CW = NVC097_D3D_SET_CULL_MODE_V_CW; \
    UNUSED uint32_t V_CCW = NVC097_D3D_SET_CULL_MODE_V_CCW; \
    struct nv_nvc097_D3D_SET_CULL_MODE __data = { .v = (args) }; \
    __NVC097_D3D_SET_CULL_MODE(&val, __data); \
}

#define VA_NVC097_D3D_SET_CULL_MODE V_NVC097_D3D_SET_CULL_MODE

#define P_NVC097_D3D_SET_CULL_MODE(push, args...) do { \
    UNUSED uint32_t V_NONE = NVC097_D3D_SET_CULL_MODE_V_NONE; \
    UNUSED uint32_t V_CW = NVC097_D3D_SET_CULL_MODE_V_CW; \
    UNUSED uint32_t V_CCW = NVC097_D3D_SET_CULL_MODE_V_CCW; \
    uint32_t nvk_p_ret; \
    V_NVC097_D3D_SET_CULL_MODE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_D3D_SET_CULL_MODE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_FUNC {
    uint32_t v;
};

static inline void
__NVC097_SET_DEPTH_FUNC(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_FUNC st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_FUNC(val, args...) { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_DEPTH_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_DEPTH_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_DEPTH_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_DEPTH_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_DEPTH_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_DEPTH_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_DEPTH_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_DEPTH_FUNC_V_D3D_ALWAYS; \
    struct nv_nvc097_SET_DEPTH_FUNC __data = { .v = (args) }; \
    __NVC097_SET_DEPTH_FUNC(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_FUNC V_NVC097_SET_DEPTH_FUNC

#define P_NVC097_SET_DEPTH_FUNC(push, args...) do { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_DEPTH_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_DEPTH_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_DEPTH_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_DEPTH_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_DEPTH_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_DEPTH_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_DEPTH_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_DEPTH_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_DEPTH_FUNC_V_D3D_ALWAYS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_FUNC(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_FUNC, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_REF {
    uint32_t v;
};

static inline void
__NVC097_SET_ALPHA_REF(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_REF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_REF(val, args...) { \
    struct nv_nvc097_SET_ALPHA_REF __data = { .v = (args) }; \
    __NVC097_SET_ALPHA_REF(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_REF V_NVC097_SET_ALPHA_REF

#define P_NVC097_SET_ALPHA_REF(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_REF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_REF, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_FUNC {
    uint32_t v;
};

static inline void
__NVC097_SET_ALPHA_FUNC(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_FUNC st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_FUNC(val, args...) { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_ALPHA_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_ALPHA_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_ALPHA_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_ALPHA_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_ALPHA_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_ALPHA_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_ALPHA_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_ALPHA_FUNC_V_D3D_ALWAYS; \
    struct nv_nvc097_SET_ALPHA_FUNC __data = { .v = (args) }; \
    __NVC097_SET_ALPHA_FUNC(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_FUNC V_NVC097_SET_ALPHA_FUNC

#define P_NVC097_SET_ALPHA_FUNC(push, args...) do { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_ALPHA_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_ALPHA_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_ALPHA_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_ALPHA_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_ALPHA_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_ALPHA_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_ALPHA_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_ALPHA_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_ALPHA_FUNC_V_D3D_ALWAYS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_FUNC(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_FUNC, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DRAW_AUTO_STRIDE {
    uint32_t v;
};

static inline void
__NVC097_SET_DRAW_AUTO_STRIDE(uint32_t *val_out, struct nv_nvc097_SET_DRAW_AUTO_STRIDE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 12));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_DRAW_AUTO_STRIDE(val, args...) { \
    struct nv_nvc097_SET_DRAW_AUTO_STRIDE __data = { .v = (args) }; \
    __NVC097_SET_DRAW_AUTO_STRIDE(&val, __data); \
}

#define VA_NVC097_SET_DRAW_AUTO_STRIDE V_NVC097_SET_DRAW_AUTO_STRIDE

#define P_NVC097_SET_DRAW_AUTO_STRIDE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DRAW_AUTO_STRIDE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DRAW_AUTO_STRIDE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_CONST_RED {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_CONST_RED(uint32_t *val_out, struct nv_nvc097_SET_BLEND_CONST_RED st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_CONST_RED(val, args...) { \
    struct nv_nvc097_SET_BLEND_CONST_RED __data = { .v = (args) }; \
    __NVC097_SET_BLEND_CONST_RED(&val, __data); \
}

#define VA_NVC097_SET_BLEND_CONST_RED V_NVC097_SET_BLEND_CONST_RED

#define P_NVC097_SET_BLEND_CONST_RED(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_CONST_RED(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_CONST_RED, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_CONST_GREEN {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_CONST_GREEN(uint32_t *val_out, struct nv_nvc097_SET_BLEND_CONST_GREEN st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_CONST_GREEN(val, args...) { \
    struct nv_nvc097_SET_BLEND_CONST_GREEN __data = { .v = (args) }; \
    __NVC097_SET_BLEND_CONST_GREEN(&val, __data); \
}

#define VA_NVC097_SET_BLEND_CONST_GREEN V_NVC097_SET_BLEND_CONST_GREEN

#define P_NVC097_SET_BLEND_CONST_GREEN(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_CONST_GREEN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_CONST_GREEN, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_CONST_BLUE {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_CONST_BLUE(uint32_t *val_out, struct nv_nvc097_SET_BLEND_CONST_BLUE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_CONST_BLUE(val, args...) { \
    struct nv_nvc097_SET_BLEND_CONST_BLUE __data = { .v = (args) }; \
    __NVC097_SET_BLEND_CONST_BLUE(&val, __data); \
}

#define VA_NVC097_SET_BLEND_CONST_BLUE V_NVC097_SET_BLEND_CONST_BLUE

#define P_NVC097_SET_BLEND_CONST_BLUE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_CONST_BLUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_CONST_BLUE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_CONST_ALPHA {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_CONST_ALPHA(uint32_t *val_out, struct nv_nvc097_SET_BLEND_CONST_ALPHA st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_CONST_ALPHA(val, args...) { \
    struct nv_nvc097_SET_BLEND_CONST_ALPHA __data = { .v = (args) }; \
    __NVC097_SET_BLEND_CONST_ALPHA(&val, __data); \
}

#define VA_NVC097_SET_BLEND_CONST_ALPHA V_NVC097_SET_BLEND_CONST_ALPHA

#define P_NVC097_SET_BLEND_CONST_ALPHA(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_CONST_ALPHA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_CONST_ALPHA, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_SAMPLER_CACHE {
    uint32_t lines;
    uint32_t tag;
};

static inline void
__NVC097_INVALIDATE_SAMPLER_CACHE(uint32_t *val_out, struct nv_nvc097_INVALIDATE_SAMPLER_CACHE st)
{
    uint32_t val = 0;
    
    assert(st.lines < (UINT64_C(1) << 1));
    val |= st.lines << 0;
    
    assert(st.tag < (UINT64_C(1) << 22));
    val |= st.tag << 4;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_SAMPLER_CACHE(val, args...) { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_SAMPLER_CACHE_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_SAMPLER_CACHE_LINES_ONE; \
    struct nv_nvc097_INVALIDATE_SAMPLER_CACHE __data = args; \
    __NVC097_INVALIDATE_SAMPLER_CACHE(&val, __data); \
}

#define VA_NVC097_INVALIDATE_SAMPLER_CACHE V_NVC097_INVALIDATE_SAMPLER_CACHE

#define P_NVC097_INVALIDATE_SAMPLER_CACHE(push, args...) do { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_SAMPLER_CACHE_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_SAMPLER_CACHE_LINES_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_SAMPLER_CACHE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_SAMPLER_CACHE, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE {
    uint32_t lines;
    uint32_t tag;
};

static inline void
__NVC097_INVALIDATE_TEXTURE_HEADER_CACHE(uint32_t *val_out, struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE st)
{
    uint32_t val = 0;
    
    assert(st.lines < (UINT64_C(1) << 1));
    val |= st.lines << 0;
    
    assert(st.tag < (UINT64_C(1) << 22));
    val |= st.tag << 4;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE(val, args...) { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE; \
    struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE __data = args; \
    __NVC097_INVALIDATE_TEXTURE_HEADER_CACHE(&val, __data); \
}

#define VA_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE

#define P_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE(push, args...) do { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_TEXTURE_HEADER_CACHE, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_TEXTURE_DATA_CACHE {
    uint32_t lines;
    uint32_t tag;
};

static inline void
__NVC097_INVALIDATE_TEXTURE_DATA_CACHE(uint32_t *val_out, struct nv_nvc097_INVALIDATE_TEXTURE_DATA_CACHE st)
{
    uint32_t val = 0;
    
    assert(st.lines < (UINT64_C(1) << 1));
    val |= st.lines << 0;
    
    assert(st.tag < (UINT64_C(1) << 22));
    val |= st.tag << 4;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_TEXTURE_DATA_CACHE(val, args...) { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE; \
    struct nv_nvc097_INVALIDATE_TEXTURE_DATA_CACHE __data = args; \
    __NVC097_INVALIDATE_TEXTURE_DATA_CACHE(&val, __data); \
}

#define VA_NVC097_INVALIDATE_TEXTURE_DATA_CACHE V_NVC097_INVALIDATE_TEXTURE_DATA_CACHE

#define P_NVC097_INVALIDATE_TEXTURE_DATA_CACHE(push, args...) do { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_TEXTURE_DATA_CACHE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_TEXTURE_DATA_CACHE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_SEPARATE_FOR_ALPHA {
    uint32_t enable;
};

static inline void
__NVC097_SET_BLEND_SEPARATE_FOR_ALPHA(uint32_t *val_out, struct nv_nvc097_SET_BLEND_SEPARATE_FOR_ALPHA st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_SEPARATE_FOR_ALPHA(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE; \
    struct nv_nvc097_SET_BLEND_SEPARATE_FOR_ALPHA __data = { .enable = (args) }; \
    __NVC097_SET_BLEND_SEPARATE_FOR_ALPHA(&val, __data); \
}

#define VA_NVC097_SET_BLEND_SEPARATE_FOR_ALPHA V_NVC097_SET_BLEND_SEPARATE_FOR_ALPHA

#define P_NVC097_SET_BLEND_SEPARATE_FOR_ALPHA(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_SEPARATE_FOR_ALPHA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_SEPARATE_FOR_ALPHA, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_COLOR_OP {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_COLOR_OP(uint32_t *val_out, struct nv_nvc097_SET_BLEND_COLOR_OP st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_COLOR_OP(val, args...) { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_COLOR_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_COLOR_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_COLOR_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_COLOR_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_COLOR_OP_V_D3D_MAX; \
    struct nv_nvc097_SET_BLEND_COLOR_OP __data = { .v = (args) }; \
    __NVC097_SET_BLEND_COLOR_OP(&val, __data); \
}

#define VA_NVC097_SET_BLEND_COLOR_OP V_NVC097_SET_BLEND_COLOR_OP

#define P_NVC097_SET_BLEND_COLOR_OP(push, args...) do { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_COLOR_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_COLOR_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_COLOR_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_COLOR_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_COLOR_OP_V_D3D_MAX; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_COLOR_OP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_COLOR_OP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_COLOR_SOURCE_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_COLOR_SOURCE_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_COLOR_SOURCE_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_COLOR_SOURCE_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_COLOR_SOURCE_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_COLOR_SOURCE_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_COLOR_SOURCE_COEFF V_NVC097_SET_BLEND_COLOR_SOURCE_COEFF

#define P_NVC097_SET_BLEND_COLOR_SOURCE_COEFF(push, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_COLOR_SOURCE_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_COLOR_SOURCE_COEFF, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_COLOR_DEST_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_COLOR_DEST_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_COLOR_DEST_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_COLOR_DEST_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_COLOR_DEST_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_COLOR_DEST_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_COLOR_DEST_COEFF V_NVC097_SET_BLEND_COLOR_DEST_COEFF

#define P_NVC097_SET_BLEND_COLOR_DEST_COEFF(push, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_COLOR_DEST_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_COLOR_DEST_COEFF, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_ALPHA_OP {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_ALPHA_OP(uint32_t *val_out, struct nv_nvc097_SET_BLEND_ALPHA_OP st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_ALPHA_OP(val, args...) { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_ALPHA_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_ALPHA_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_ALPHA_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_ALPHA_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_ALPHA_OP_V_D3D_MAX; \
    struct nv_nvc097_SET_BLEND_ALPHA_OP __data = { .v = (args) }; \
    __NVC097_SET_BLEND_ALPHA_OP(&val, __data); \
}

#define VA_NVC097_SET_BLEND_ALPHA_OP V_NVC097_SET_BLEND_ALPHA_OP

#define P_NVC097_SET_BLEND_ALPHA_OP(push, args...) do { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_ALPHA_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_ALPHA_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_ALPHA_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_ALPHA_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_ALPHA_OP_V_D3D_MAX; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_ALPHA_OP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_ALPHA_OP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_ALPHA_SOURCE_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_ALPHA_SOURCE_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_ALPHA_SOURCE_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_ALPHA_SOURCE_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_ALPHA_SOURCE_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_ALPHA_SOURCE_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_ALPHA_SOURCE_COEFF V_NVC097_SET_BLEND_ALPHA_SOURCE_COEFF

#define P_NVC097_SET_BLEND_ALPHA_SOURCE_COEFF(push, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_ALPHA_SOURCE_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_ALPHA_SOURCE_COEFF, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GLOBAL_COLOR_KEY {
    uint32_t enable;
};

static inline void
__NVC097_SET_GLOBAL_COLOR_KEY(uint32_t *val_out, struct nv_nvc097_SET_GLOBAL_COLOR_KEY st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_GLOBAL_COLOR_KEY(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE; \
    struct nv_nvc097_SET_GLOBAL_COLOR_KEY __data = { .enable = (args) }; \
    __NVC097_SET_GLOBAL_COLOR_KEY(&val, __data); \
}

#define VA_NVC097_SET_GLOBAL_COLOR_KEY V_NVC097_SET_GLOBAL_COLOR_KEY

#define P_NVC097_SET_GLOBAL_COLOR_KEY(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GLOBAL_COLOR_KEY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GLOBAL_COLOR_KEY, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_ALPHA_DEST_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_ALPHA_DEST_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_ALPHA_DEST_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_ALPHA_DEST_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_ALPHA_DEST_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_ALPHA_DEST_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_ALPHA_DEST_COEFF V_NVC097_SET_BLEND_ALPHA_DEST_COEFF

#define P_NVC097_SET_BLEND_ALPHA_DEST_COEFF(push, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_ALPHA_DEST_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_ALPHA_DEST_COEFF, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SINGLE_ROP_CONTROL {
    uint32_t enable;
};

static inline void
__NVC097_SET_SINGLE_ROP_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_SINGLE_ROP_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_SINGLE_ROP_CONTROL(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE; \
    struct nv_nvc097_SET_SINGLE_ROP_CONTROL __data = { .enable = (args) }; \
    __NVC097_SET_SINGLE_ROP_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_SINGLE_ROP_CONTROL V_NVC097_SET_SINGLE_ROP_CONTROL

#define P_NVC097_SET_SINGLE_ROP_CONTROL(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SINGLE_ROP_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SINGLE_ROP_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND {
    uint32_t enable;
};

static inline void
__NVC097_SET_BLEND(uint32_t *val_out, struct nv_nvc097_SET_BLEND st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_BLEND(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_ENABLE_TRUE; \
    struct nv_nvc097_SET_BLEND __data = { .enable = (args) }; \
    __NVC097_SET_BLEND(&val, __data); \
}

#define VA_NVC097_SET_BLEND(i) V_NVC097_SET_BLEND

#define P_NVC097_SET_BLEND(push, idx, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_TEST {
    uint32_t enable;
};

static inline void
__NVC097_SET_STENCIL_TEST(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_TEST st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_TEST(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_STENCIL_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_STENCIL_TEST_ENABLE_TRUE; \
    struct nv_nvc097_SET_STENCIL_TEST __data = { .enable = (args) }; \
    __NVC097_SET_STENCIL_TEST(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_TEST V_NVC097_SET_STENCIL_TEST

#define P_NVC097_SET_STENCIL_TEST(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_STENCIL_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_STENCIL_TEST_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_TEST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_TEST, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_OP_FAIL {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_OP_FAIL(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_OP_FAIL st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_OP_FAIL(val, args...) { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_STENCIL_OP_FAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_STENCIL_OP_FAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_STENCIL_OP_FAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_STENCIL_OP_FAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_STENCIL_OP_FAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_STENCIL_OP_FAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_STENCIL_OP_FAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_STENCIL_OP_FAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_STENCIL_OP_FAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_STENCIL_OP_FAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_STENCIL_OP_FAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_STENCIL_OP_FAIL_V_D3D_DECR; \
    struct nv_nvc097_SET_STENCIL_OP_FAIL __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_OP_FAIL(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_OP_FAIL V_NVC097_SET_STENCIL_OP_FAIL

#define P_NVC097_SET_STENCIL_OP_FAIL(push, args...) do { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_STENCIL_OP_FAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_STENCIL_OP_FAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_STENCIL_OP_FAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_STENCIL_OP_FAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_STENCIL_OP_FAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_STENCIL_OP_FAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_STENCIL_OP_FAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_STENCIL_OP_FAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_STENCIL_OP_FAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_STENCIL_OP_FAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_STENCIL_OP_FAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_STENCIL_OP_FAIL_V_D3D_DECR; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_OP_FAIL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_OP_FAIL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_OP_ZFAIL {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_OP_ZFAIL(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_OP_ZFAIL st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_OP_ZFAIL(val, args...) { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_DECR; \
    struct nv_nvc097_SET_STENCIL_OP_ZFAIL __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_OP_ZFAIL(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_OP_ZFAIL V_NVC097_SET_STENCIL_OP_ZFAIL

#define P_NVC097_SET_STENCIL_OP_ZFAIL(push, args...) do { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_DECR; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_OP_ZFAIL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_OP_ZFAIL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_OP_ZPASS {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_OP_ZPASS(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_OP_ZPASS st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_OP_ZPASS(val, args...) { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_DECR; \
    struct nv_nvc097_SET_STENCIL_OP_ZPASS __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_OP_ZPASS(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_OP_ZPASS V_NVC097_SET_STENCIL_OP_ZPASS

#define P_NVC097_SET_STENCIL_OP_ZPASS(push, args...) do { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_STENCIL_OP_ZPASS_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_STENCIL_OP_ZPASS_V_D3D_DECR; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_OP_ZPASS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_OP_ZPASS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_FUNC {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_FUNC(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_FUNC st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_FUNC(val, args...) { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_STENCIL_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_STENCIL_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_STENCIL_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_STENCIL_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_STENCIL_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_STENCIL_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_STENCIL_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_STENCIL_FUNC_V_D3D_ALWAYS; \
    struct nv_nvc097_SET_STENCIL_FUNC __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_FUNC(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_FUNC V_NVC097_SET_STENCIL_FUNC

#define P_NVC097_SET_STENCIL_FUNC(push, args...) do { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_STENCIL_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_STENCIL_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_STENCIL_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_STENCIL_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_STENCIL_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_STENCIL_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_STENCIL_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_STENCIL_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_STENCIL_FUNC_V_D3D_ALWAYS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_FUNC(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_FUNC, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_FUNC_REF {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_FUNC_REF(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_FUNC_REF st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_FUNC_REF(val, args...) { \
    struct nv_nvc097_SET_STENCIL_FUNC_REF __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_FUNC_REF(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_FUNC_REF V_NVC097_SET_STENCIL_FUNC_REF

#define P_NVC097_SET_STENCIL_FUNC_REF(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_FUNC_REF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_FUNC_REF, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_FUNC_MASK {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_FUNC_MASK(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_FUNC_MASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_FUNC_MASK(val, args...) { \
    struct nv_nvc097_SET_STENCIL_FUNC_MASK __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_FUNC_MASK(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_FUNC_MASK V_NVC097_SET_STENCIL_FUNC_MASK

#define P_NVC097_SET_STENCIL_FUNC_MASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_FUNC_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_FUNC_MASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_STENCIL_MASK {
    uint32_t v;
};

static inline void
__NVC097_SET_STENCIL_MASK(uint32_t *val_out, struct nv_nvc097_SET_STENCIL_MASK st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_STENCIL_MASK(val, args...) { \
    struct nv_nvc097_SET_STENCIL_MASK __data = { .v = (args) }; \
    __NVC097_SET_STENCIL_MASK(&val, __data); \
}

#define VA_NVC097_SET_STENCIL_MASK V_NVC097_SET_STENCIL_MASK

#define P_NVC097_SET_STENCIL_MASK(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_STENCIL_MASK(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_STENCIL_MASK, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DRAW_AUTO_START {
    uint32_t byte_count;
};

static inline void
__NVC097_SET_DRAW_AUTO_START(uint32_t *val_out, struct nv_nvc097_SET_DRAW_AUTO_START st)
{
    uint32_t val = 0;
    
    val |= st.byte_count;
    *val_out = val;
}

#define V_NVC097_SET_DRAW_AUTO_START(val, args...) { \
    struct nv_nvc097_SET_DRAW_AUTO_START __data = { .byte_count = (args) }; \
    __NVC097_SET_DRAW_AUTO_START(&val, __data); \
}

#define VA_NVC097_SET_DRAW_AUTO_START V_NVC097_SET_DRAW_AUTO_START

#define P_NVC097_SET_DRAW_AUTO_START(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DRAW_AUTO_START(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DRAW_AUTO_START, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PS_SATURATE {
    uint32_t output0;
    uint32_t clamp_range0;
    uint32_t output1;
    uint32_t clamp_range1;
    uint32_t output2;
    uint32_t clamp_range2;
    uint32_t output3;
    uint32_t clamp_range3;
    uint32_t output4;
    uint32_t clamp_range4;
    uint32_t output5;
    uint32_t clamp_range5;
    uint32_t output6;
    uint32_t clamp_range6;
    uint32_t output7;
    uint32_t clamp_range7;
};

static inline void
__NVC097_SET_PS_SATURATE(uint32_t *val_out, struct nv_nvc097_SET_PS_SATURATE st)
{
    uint32_t val = 0;
    
    assert(st.output0 < (UINT64_C(1) << 1));
    val |= st.output0 << 0;
    
    assert(st.clamp_range0 < (UINT64_C(1) << 1));
    val |= st.clamp_range0 << 1;
    
    assert(st.output1 < (UINT64_C(1) << 1));
    val |= st.output1 << 4;
    
    assert(st.clamp_range1 < (UINT64_C(1) << 1));
    val |= st.clamp_range1 << 5;
    
    assert(st.output2 < (UINT64_C(1) << 1));
    val |= st.output2 << 8;
    
    assert(st.clamp_range2 < (UINT64_C(1) << 1));
    val |= st.clamp_range2 << 9;
    
    assert(st.output3 < (UINT64_C(1) << 1));
    val |= st.output3 << 12;
    
    assert(st.clamp_range3 < (UINT64_C(1) << 1));
    val |= st.clamp_range3 << 13;
    
    assert(st.output4 < (UINT64_C(1) << 1));
    val |= st.output4 << 16;
    
    assert(st.clamp_range4 < (UINT64_C(1) << 1));
    val |= st.clamp_range4 << 17;
    
    assert(st.output5 < (UINT64_C(1) << 1));
    val |= st.output5 << 20;
    
    assert(st.clamp_range5 < (UINT64_C(1) << 1));
    val |= st.clamp_range5 << 21;
    
    assert(st.output6 < (UINT64_C(1) << 1));
    val |= st.output6 << 24;
    
    assert(st.clamp_range6 < (UINT64_C(1) << 1));
    val |= st.clamp_range6 << 25;
    
    assert(st.output7 < (UINT64_C(1) << 1));
    val |= st.output7 << 28;
    
    assert(st.clamp_range7 < (UINT64_C(1) << 1));
    val |= st.clamp_range7 << 29;
    *val_out = val;
}

#define V_NVC097_SET_PS_SATURATE(val, args...) { \
    UNUSED uint32_t OUTPUT0_FALSE = NVC097_SET_PS_SATURATE_OUTPUT0_FALSE; \
    UNUSED uint32_t OUTPUT0_TRUE = NVC097_SET_PS_SATURATE_OUTPUT0_TRUE; \
    UNUSED uint32_t CLAMP_RANGE0_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT1_FALSE = NVC097_SET_PS_SATURATE_OUTPUT1_FALSE; \
    UNUSED uint32_t OUTPUT1_TRUE = NVC097_SET_PS_SATURATE_OUTPUT1_TRUE; \
    UNUSED uint32_t CLAMP_RANGE1_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT2_FALSE = NVC097_SET_PS_SATURATE_OUTPUT2_FALSE; \
    UNUSED uint32_t OUTPUT2_TRUE = NVC097_SET_PS_SATURATE_OUTPUT2_TRUE; \
    UNUSED uint32_t CLAMP_RANGE2_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT3_FALSE = NVC097_SET_PS_SATURATE_OUTPUT3_FALSE; \
    UNUSED uint32_t OUTPUT3_TRUE = NVC097_SET_PS_SATURATE_OUTPUT3_TRUE; \
    UNUSED uint32_t CLAMP_RANGE3_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT4_FALSE = NVC097_SET_PS_SATURATE_OUTPUT4_FALSE; \
    UNUSED uint32_t OUTPUT4_TRUE = NVC097_SET_PS_SATURATE_OUTPUT4_TRUE; \
    UNUSED uint32_t CLAMP_RANGE4_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT5_FALSE = NVC097_SET_PS_SATURATE_OUTPUT5_FALSE; \
    UNUSED uint32_t OUTPUT5_TRUE = NVC097_SET_PS_SATURATE_OUTPUT5_TRUE; \
    UNUSED uint32_t CLAMP_RANGE5_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT6_FALSE = NVC097_SET_PS_SATURATE_OUTPUT6_FALSE; \
    UNUSED uint32_t OUTPUT6_TRUE = NVC097_SET_PS_SATURATE_OUTPUT6_TRUE; \
    UNUSED uint32_t CLAMP_RANGE6_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT7_FALSE = NVC097_SET_PS_SATURATE_OUTPUT7_FALSE; \
    UNUSED uint32_t OUTPUT7_TRUE = NVC097_SET_PS_SATURATE_OUTPUT7_TRUE; \
    UNUSED uint32_t CLAMP_RANGE7_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE; \
    struct nv_nvc097_SET_PS_SATURATE __data = args; \
    __NVC097_SET_PS_SATURATE(&val, __data); \
}

#define VA_NVC097_SET_PS_SATURATE V_NVC097_SET_PS_SATURATE

#define P_NVC097_SET_PS_SATURATE(push, args...) do { \
    UNUSED uint32_t OUTPUT0_FALSE = NVC097_SET_PS_SATURATE_OUTPUT0_FALSE; \
    UNUSED uint32_t OUTPUT0_TRUE = NVC097_SET_PS_SATURATE_OUTPUT0_TRUE; \
    UNUSED uint32_t CLAMP_RANGE0_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT1_FALSE = NVC097_SET_PS_SATURATE_OUTPUT1_FALSE; \
    UNUSED uint32_t OUTPUT1_TRUE = NVC097_SET_PS_SATURATE_OUTPUT1_TRUE; \
    UNUSED uint32_t CLAMP_RANGE1_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT2_FALSE = NVC097_SET_PS_SATURATE_OUTPUT2_FALSE; \
    UNUSED uint32_t OUTPUT2_TRUE = NVC097_SET_PS_SATURATE_OUTPUT2_TRUE; \
    UNUSED uint32_t CLAMP_RANGE2_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT3_FALSE = NVC097_SET_PS_SATURATE_OUTPUT3_FALSE; \
    UNUSED uint32_t OUTPUT3_TRUE = NVC097_SET_PS_SATURATE_OUTPUT3_TRUE; \
    UNUSED uint32_t CLAMP_RANGE3_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT4_FALSE = NVC097_SET_PS_SATURATE_OUTPUT4_FALSE; \
    UNUSED uint32_t OUTPUT4_TRUE = NVC097_SET_PS_SATURATE_OUTPUT4_TRUE; \
    UNUSED uint32_t CLAMP_RANGE4_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT5_FALSE = NVC097_SET_PS_SATURATE_OUTPUT5_FALSE; \
    UNUSED uint32_t OUTPUT5_TRUE = NVC097_SET_PS_SATURATE_OUTPUT5_TRUE; \
    UNUSED uint32_t CLAMP_RANGE5_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT6_FALSE = NVC097_SET_PS_SATURATE_OUTPUT6_FALSE; \
    UNUSED uint32_t OUTPUT6_TRUE = NVC097_SET_PS_SATURATE_OUTPUT6_TRUE; \
    UNUSED uint32_t CLAMP_RANGE6_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE; \
    UNUSED uint32_t OUTPUT7_FALSE = NVC097_SET_PS_SATURATE_OUTPUT7_FALSE; \
    UNUSED uint32_t OUTPUT7_TRUE = NVC097_SET_PS_SATURATE_OUTPUT7_TRUE; \
    UNUSED uint32_t CLAMP_RANGE7_ZERO_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE; \
    UNUSED uint32_t CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE = NVC097_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PS_SATURATE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PS_SATURATE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_WINDOW_ORIGIN {
    uint32_t mode;
    uint32_t flip_y;
};

static inline void
__NVC097_SET_WINDOW_ORIGIN(uint32_t *val_out, struct nv_nvc097_SET_WINDOW_ORIGIN st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 1));
    val |= st.mode << 0;
    
    assert(st.flip_y < (UINT64_C(1) << 1));
    val |= st.flip_y << 4;
    *val_out = val;
}

#define V_NVC097_SET_WINDOW_ORIGIN(val, args...) { \
    UNUSED uint32_t MODE_UPPER_LEFT = NVC097_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT; \
    UNUSED uint32_t MODE_LOWER_LEFT = NVC097_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT; \
    UNUSED uint32_t FLIP_Y_FALSE = NVC097_SET_WINDOW_ORIGIN_FLIP_Y_FALSE; \
    UNUSED uint32_t FLIP_Y_TRUE = NVC097_SET_WINDOW_ORIGIN_FLIP_Y_TRUE; \
    struct nv_nvc097_SET_WINDOW_ORIGIN __data = args; \
    __NVC097_SET_WINDOW_ORIGIN(&val, __data); \
}

#define VA_NVC097_SET_WINDOW_ORIGIN V_NVC097_SET_WINDOW_ORIGIN

#define P_NVC097_SET_WINDOW_ORIGIN(push, args...) do { \
    UNUSED uint32_t MODE_UPPER_LEFT = NVC097_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT; \
    UNUSED uint32_t MODE_LOWER_LEFT = NVC097_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT; \
    UNUSED uint32_t FLIP_Y_FALSE = NVC097_SET_WINDOW_ORIGIN_FLIP_Y_FALSE; \
    UNUSED uint32_t FLIP_Y_TRUE = NVC097_SET_WINDOW_ORIGIN_FLIP_Y_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_WINDOW_ORIGIN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_WINDOW_ORIGIN, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LINE_WIDTH_FLOAT {
    uint32_t v;
};

static inline void
__NVC097_SET_LINE_WIDTH_FLOAT(uint32_t *val_out, struct nv_nvc097_SET_LINE_WIDTH_FLOAT st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_LINE_WIDTH_FLOAT(val, args...) { \
    struct nv_nvc097_SET_LINE_WIDTH_FLOAT __data = { .v = (args) }; \
    __NVC097_SET_LINE_WIDTH_FLOAT(&val, __data); \
}

#define VA_NVC097_SET_LINE_WIDTH_FLOAT V_NVC097_SET_LINE_WIDTH_FLOAT

#define P_NVC097_SET_LINE_WIDTH_FLOAT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LINE_WIDTH_FLOAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LINE_WIDTH_FLOAT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALIASED_LINE_WIDTH_FLOAT {
    uint32_t v;
};

static inline void
__NVC097_SET_ALIASED_LINE_WIDTH_FLOAT(uint32_t *val_out, struct nv_nvc097_SET_ALIASED_LINE_WIDTH_FLOAT st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_ALIASED_LINE_WIDTH_FLOAT(val, args...) { \
    struct nv_nvc097_SET_ALIASED_LINE_WIDTH_FLOAT __data = { .v = (args) }; \
    __NVC097_SET_ALIASED_LINE_WIDTH_FLOAT(&val, __data); \
}

#define VA_NVC097_SET_ALIASED_LINE_WIDTH_FLOAT V_NVC097_SET_ALIASED_LINE_WIDTH_FLOAT

#define P_NVC097_SET_ALIASED_LINE_WIDTH_FLOAT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALIASED_LINE_WIDTH_FLOAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALIASED_LINE_WIDTH_FLOAT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LINE_MULTISAMPLE_OVERRIDE {
    uint32_t enable;
};

static inline void
__NVC097_SET_LINE_MULTISAMPLE_OVERRIDE(uint32_t *val_out, struct nv_nvc097_SET_LINE_MULTISAMPLE_OVERRIDE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_LINE_MULTISAMPLE_OVERRIDE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE; \
    struct nv_nvc097_SET_LINE_MULTISAMPLE_OVERRIDE __data = { .enable = (args) }; \
    __NVC097_SET_LINE_MULTISAMPLE_OVERRIDE(&val, __data); \
}

#define VA_NVC097_SET_LINE_MULTISAMPLE_OVERRIDE V_NVC097_SET_LINE_MULTISAMPLE_OVERRIDE

#define P_NVC097_SET_LINE_MULTISAMPLE_OVERRIDE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LINE_MULTISAMPLE_OVERRIDE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LINE_MULTISAMPLE_OVERRIDE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_HYSTERESIS {
    uint32_t rounds_of_alpha;
};

static inline void
__NVC097_SET_ALPHA_HYSTERESIS(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_HYSTERESIS st)
{
    uint32_t val = 0;
    
    assert(st.rounds_of_alpha < (UINT64_C(1) << 8));
    val |= st.rounds_of_alpha << 0;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_HYSTERESIS(val, args...) { \
    struct nv_nvc097_SET_ALPHA_HYSTERESIS __data = { .rounds_of_alpha = (args) }; \
    __NVC097_SET_ALPHA_HYSTERESIS(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_HYSTERESIS V_NVC097_SET_ALPHA_HYSTERESIS

#define P_NVC097_SET_ALPHA_HYSTERESIS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_HYSTERESIS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_HYSTERESIS, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_SAMPLER_CACHE_NO_WFI {
    uint32_t lines;
    uint32_t tag;
};

static inline void
__NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI(uint32_t *val_out, struct nv_nvc097_INVALIDATE_SAMPLER_CACHE_NO_WFI st)
{
    uint32_t val = 0;
    
    assert(st.lines < (UINT64_C(1) << 1));
    val |= st.lines << 0;
    
    assert(st.tag < (UINT64_C(1) << 22));
    val |= st.tag << 4;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI(val, args...) { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE; \
    struct nv_nvc097_INVALIDATE_SAMPLER_CACHE_NO_WFI __data = args; \
    __NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI(&val, __data); \
}

#define VA_NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI V_NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI

#define P_NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI(push, args...) do { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI {
    uint32_t lines;
    uint32_t tag;
};

static inline void
__NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI(uint32_t *val_out, struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI st)
{
    uint32_t val = 0;
    
    assert(st.lines < (UINT64_C(1) << 1));
    val |= st.lines << 0;
    
    assert(st.tag < (UINT64_C(1) << 22));
    val |= st.tag << 4;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI(val, args...) { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE; \
    struct nv_nvc097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI __data = args; \
    __NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI(&val, __data); \
}

#define VA_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI

#define P_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI(push, args...) do { \
    UNUSED uint32_t LINES_ALL = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL; \
    UNUSED uint32_t LINES_ONE = NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GLOBAL_BASE_VERTEX_INDEX {
    uint32_t v;
};

static inline void
__NVC097_SET_GLOBAL_BASE_VERTEX_INDEX(uint32_t *val_out, struct nv_nvc097_SET_GLOBAL_BASE_VERTEX_INDEX st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_GLOBAL_BASE_VERTEX_INDEX(val, args...) { \
    struct nv_nvc097_SET_GLOBAL_BASE_VERTEX_INDEX __data = { .v = (args) }; \
    __NVC097_SET_GLOBAL_BASE_VERTEX_INDEX(&val, __data); \
}

#define VA_NVC097_SET_GLOBAL_BASE_VERTEX_INDEX V_NVC097_SET_GLOBAL_BASE_VERTEX_INDEX

#define P_NVC097_SET_GLOBAL_BASE_VERTEX_INDEX(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GLOBAL_BASE_VERTEX_INDEX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GLOBAL_BASE_VERTEX_INDEX, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_GLOBAL_BASE_INSTANCE_INDEX {
    uint32_t v;
};

static inline void
__NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX(uint32_t *val_out, struct nv_nvc097_SET_GLOBAL_BASE_INSTANCE_INDEX st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX(val, args...) { \
    struct nv_nvc097_SET_GLOBAL_BASE_INSTANCE_INDEX __data = { .v = (args) }; \
    __NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX(&val, __data); \
}

#define VA_NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX V_NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX

#define P_NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PS_WARP_WATERMARKS {
    uint32_t low;
    uint32_t high;
};

static inline void
__NVC097_SET_PS_WARP_WATERMARKS(uint32_t *val_out, struct nv_nvc097_SET_PS_WARP_WATERMARKS st)
{
    uint32_t val = 0;
    
    assert(st.low < (UINT64_C(1) << 16));
    val |= st.low << 0;
    
    assert(st.high < (UINT64_C(1) << 16));
    val |= st.high << 16;
    *val_out = val;
}

#define V_NVC097_SET_PS_WARP_WATERMARKS(val, args...) { \
    struct nv_nvc097_SET_PS_WARP_WATERMARKS __data = args; \
    __NVC097_SET_PS_WARP_WATERMARKS(&val, __data); \
}

#define VA_NVC097_SET_PS_WARP_WATERMARKS V_NVC097_SET_PS_WARP_WATERMARKS

#define P_NVC097_SET_PS_WARP_WATERMARKS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PS_WARP_WATERMARKS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PS_WARP_WATERMARKS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PS_REGISTER_WATERMARKS {
    uint32_t low;
    uint32_t high;
};

static inline void
__NVC097_SET_PS_REGISTER_WATERMARKS(uint32_t *val_out, struct nv_nvc097_SET_PS_REGISTER_WATERMARKS st)
{
    uint32_t val = 0;
    
    assert(st.low < (UINT64_C(1) << 16));
    val |= st.low << 0;
    
    assert(st.high < (UINT64_C(1) << 16));
    val |= st.high << 16;
    *val_out = val;
}

#define V_NVC097_SET_PS_REGISTER_WATERMARKS(val, args...) { \
    struct nv_nvc097_SET_PS_REGISTER_WATERMARKS __data = args; \
    __NVC097_SET_PS_REGISTER_WATERMARKS(&val, __data); \
}

#define VA_NVC097_SET_PS_REGISTER_WATERMARKS V_NVC097_SET_PS_REGISTER_WATERMARKS

#define P_NVC097_SET_PS_REGISTER_WATERMARKS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PS_REGISTER_WATERMARKS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PS_REGISTER_WATERMARKS, nvk_p_ret); \
} while(0)

struct nv_nvc097_STORE_ZCULL {
    uint32_t v;
};

static inline void
__NVC097_STORE_ZCULL(uint32_t *val_out, struct nv_nvc097_STORE_ZCULL st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_STORE_ZCULL(val, args...) { \
    struct nv_nvc097_STORE_ZCULL __data = { .v = (args) }; \
    __NVC097_STORE_ZCULL(&val, __data); \
}

#define VA_NVC097_STORE_ZCULL V_NVC097_STORE_ZCULL

#define P_NVC097_STORE_ZCULL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_STORE_ZCULL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_STORE_ZCULL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_RED {
    uint32_t v;
};

static inline void
__NVC097_SET_ITERATED_BLEND_CONSTANT_RED(uint32_t *val_out, struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_RED st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_ITERATED_BLEND_CONSTANT_RED(val, args...) { \
    struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_RED __data = { .v = (args) }; \
    __NVC097_SET_ITERATED_BLEND_CONSTANT_RED(&val, __data); \
}

#define VA_NVC097_SET_ITERATED_BLEND_CONSTANT_RED(i) V_NVC097_SET_ITERATED_BLEND_CONSTANT_RED

#define P_NVC097_SET_ITERATED_BLEND_CONSTANT_RED(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ITERATED_BLEND_CONSTANT_RED(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ITERATED_BLEND_CONSTANT_RED(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_GREEN {
    uint32_t v;
};

static inline void
__NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(uint32_t *val_out, struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_GREEN st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(val, args...) { \
    struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_GREEN __data = { .v = (args) }; \
    __NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(&val, __data); \
}

#define VA_NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(i) V_NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN

#define P_NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_BLUE {
    uint32_t v;
};

static inline void
__NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(uint32_t *val_out, struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_BLUE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(val, args...) { \
    struct nv_nvc097_SET_ITERATED_BLEND_CONSTANT_BLUE __data = { .v = (args) }; \
    __NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(&val, __data); \
}

#define VA_NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(i) V_NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE

#define P_NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_ZCULL {
    uint32_t v;
};

static inline void
__NVC097_LOAD_ZCULL(uint32_t *val_out, struct nv_nvc097_LOAD_ZCULL st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_LOAD_ZCULL(val, args...) { \
    struct nv_nvc097_LOAD_ZCULL __data = { .v = (args) }; \
    __NVC097_LOAD_ZCULL(&val, __data); \
}

#define VA_NVC097_LOAD_ZCULL V_NVC097_LOAD_ZCULL

#define P_NVC097_LOAD_ZCULL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_ZCULL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_ZCULL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SURFACE_CLIP_ID_HEIGHT {
    uint32_t v;
};

static inline void
__NVC097_SET_SURFACE_CLIP_ID_HEIGHT(uint32_t *val_out, struct nv_nvc097_SET_SURFACE_CLIP_ID_HEIGHT st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SURFACE_CLIP_ID_HEIGHT(val, args...) { \
    struct nv_nvc097_SET_SURFACE_CLIP_ID_HEIGHT __data = { .v = (args) }; \
    __NVC097_SET_SURFACE_CLIP_ID_HEIGHT(&val, __data); \
}

#define VA_NVC097_SET_SURFACE_CLIP_ID_HEIGHT V_NVC097_SET_SURFACE_CLIP_ID_HEIGHT

#define P_NVC097_SET_SURFACE_CLIP_ID_HEIGHT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SURFACE_CLIP_ID_HEIGHT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SURFACE_CLIP_ID_HEIGHT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL {
    uint32_t xmin;
    uint32_t xmax;
};

static inline void
__NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL(uint32_t *val_out, struct nv_nvc097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL st)
{
    uint32_t val = 0;
    
    assert(st.xmin < (UINT64_C(1) << 16));
    val |= st.xmin << 0;
    
    assert(st.xmax < (UINT64_C(1) << 16));
    val |= st.xmax << 16;
    *val_out = val;
}

#define V_NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL(val, args...) { \
    struct nv_nvc097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL __data = args; \
    __NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL(&val, __data); \
}

#define VA_NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL V_NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL

#define P_NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLIP_ID_CLEAR_RECT_VERTICAL {
    uint32_t ymin;
    uint32_t ymax;
};

static inline void
__NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL(uint32_t *val_out, struct nv_nvc097_SET_CLIP_ID_CLEAR_RECT_VERTICAL st)
{
    uint32_t val = 0;
    
    assert(st.ymin < (UINT64_C(1) << 16));
    val |= st.ymin << 0;
    
    assert(st.ymax < (UINT64_C(1) << 16));
    val |= st.ymax << 16;
    *val_out = val;
}

#define V_NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL(val, args...) { \
    struct nv_nvc097_SET_CLIP_ID_CLEAR_RECT_VERTICAL __data = args; \
    __NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL(&val, __data); \
}

#define VA_NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL V_NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL

#define P_NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_USER_CLIP_ENABLE {
    uint32_t plane0;
    uint32_t plane1;
    uint32_t plane2;
    uint32_t plane3;
    uint32_t plane4;
    uint32_t plane5;
    uint32_t plane6;
    uint32_t plane7;
};

static inline void
__NVC097_SET_USER_CLIP_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_USER_CLIP_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.plane0 < (UINT64_C(1) << 1));
    val |= st.plane0 << 0;
    
    assert(st.plane1 < (UINT64_C(1) << 1));
    val |= st.plane1 << 1;
    
    assert(st.plane2 < (UINT64_C(1) << 1));
    val |= st.plane2 << 2;
    
    assert(st.plane3 < (UINT64_C(1) << 1));
    val |= st.plane3 << 3;
    
    assert(st.plane4 < (UINT64_C(1) << 1));
    val |= st.plane4 << 4;
    
    assert(st.plane5 < (UINT64_C(1) << 1));
    val |= st.plane5 << 5;
    
    assert(st.plane6 < (UINT64_C(1) << 1));
    val |= st.plane6 << 6;
    
    assert(st.plane7 < (UINT64_C(1) << 1));
    val |= st.plane7 << 7;
    *val_out = val;
}

#define V_NVC097_SET_USER_CLIP_ENABLE(val, args...) { \
    UNUSED uint32_t PLANE0_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE0_FALSE; \
    UNUSED uint32_t PLANE0_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE0_TRUE; \
    UNUSED uint32_t PLANE1_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE1_FALSE; \
    UNUSED uint32_t PLANE1_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE1_TRUE; \
    UNUSED uint32_t PLANE2_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE2_FALSE; \
    UNUSED uint32_t PLANE2_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE2_TRUE; \
    UNUSED uint32_t PLANE3_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE3_FALSE; \
    UNUSED uint32_t PLANE3_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE3_TRUE; \
    UNUSED uint32_t PLANE4_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE4_FALSE; \
    UNUSED uint32_t PLANE4_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE4_TRUE; \
    UNUSED uint32_t PLANE5_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE5_FALSE; \
    UNUSED uint32_t PLANE5_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE5_TRUE; \
    UNUSED uint32_t PLANE6_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE6_FALSE; \
    UNUSED uint32_t PLANE6_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE6_TRUE; \
    UNUSED uint32_t PLANE7_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE7_FALSE; \
    UNUSED uint32_t PLANE7_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE7_TRUE; \
    struct nv_nvc097_SET_USER_CLIP_ENABLE __data = args; \
    __NVC097_SET_USER_CLIP_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_USER_CLIP_ENABLE V_NVC097_SET_USER_CLIP_ENABLE

#define P_NVC097_SET_USER_CLIP_ENABLE(push, args...) do { \
    UNUSED uint32_t PLANE0_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE0_FALSE; \
    UNUSED uint32_t PLANE0_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE0_TRUE; \
    UNUSED uint32_t PLANE1_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE1_FALSE; \
    UNUSED uint32_t PLANE1_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE1_TRUE; \
    UNUSED uint32_t PLANE2_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE2_FALSE; \
    UNUSED uint32_t PLANE2_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE2_TRUE; \
    UNUSED uint32_t PLANE3_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE3_FALSE; \
    UNUSED uint32_t PLANE3_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE3_TRUE; \
    UNUSED uint32_t PLANE4_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE4_FALSE; \
    UNUSED uint32_t PLANE4_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE4_TRUE; \
    UNUSED uint32_t PLANE5_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE5_FALSE; \
    UNUSED uint32_t PLANE5_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE5_TRUE; \
    UNUSED uint32_t PLANE6_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE6_FALSE; \
    UNUSED uint32_t PLANE6_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE6_TRUE; \
    UNUSED uint32_t PLANE7_FALSE = NVC097_SET_USER_CLIP_ENABLE_PLANE7_FALSE; \
    UNUSED uint32_t PLANE7_TRUE = NVC097_SET_USER_CLIP_ENABLE_PLANE7_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_USER_CLIP_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_USER_CLIP_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZPASS_PIXEL_COUNT {
    uint32_t enable;
};

static inline void
__NVC097_SET_ZPASS_PIXEL_COUNT(uint32_t *val_out, struct nv_nvc097_SET_ZPASS_PIXEL_COUNT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZPASS_PIXEL_COUNT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE; \
    struct nv_nvc097_SET_ZPASS_PIXEL_COUNT __data = { .enable = (args) }; \
    __NVC097_SET_ZPASS_PIXEL_COUNT(&val, __data); \
}

#define VA_NVC097_SET_ZPASS_PIXEL_COUNT V_NVC097_SET_ZPASS_PIXEL_COUNT

#define P_NVC097_SET_ZPASS_PIXEL_COUNT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZPASS_PIXEL_COUNT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZPASS_PIXEL_COUNT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POINT_SIZE {
    uint32_t v;
};

static inline void
__NVC097_SET_POINT_SIZE(uint32_t *val_out, struct nv_nvc097_SET_POINT_SIZE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_POINT_SIZE(val, args...) { \
    struct nv_nvc097_SET_POINT_SIZE __data = { .v = (args) }; \
    __NVC097_SET_POINT_SIZE(&val, __data); \
}

#define VA_NVC097_SET_POINT_SIZE V_NVC097_SET_POINT_SIZE

#define P_NVC097_SET_POINT_SIZE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POINT_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POINT_SIZE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_STATS {
    uint32_t enable;
};

static inline void
__NVC097_SET_ZCULL_STATS(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_STATS st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_STATS(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_STATS_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_STATS_ENABLE_TRUE; \
    struct nv_nvc097_SET_ZCULL_STATS __data = { .enable = (args) }; \
    __NVC097_SET_ZCULL_STATS(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_STATS V_NVC097_SET_ZCULL_STATS

#define P_NVC097_SET_ZCULL_STATS(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ZCULL_STATS_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ZCULL_STATS_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_STATS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_STATS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POINT_SPRITE {
    uint32_t enable;
};

static inline void
__NVC097_SET_POINT_SPRITE(uint32_t *val_out, struct nv_nvc097_SET_POINT_SPRITE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_POINT_SPRITE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POINT_SPRITE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POINT_SPRITE_ENABLE_TRUE; \
    struct nv_nvc097_SET_POINT_SPRITE __data = { .enable = (args) }; \
    __NVC097_SET_POINT_SPRITE(&val, __data); \
}

#define VA_NVC097_SET_POINT_SPRITE V_NVC097_SET_POINT_SPRITE

#define P_NVC097_SET_POINT_SPRITE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POINT_SPRITE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POINT_SPRITE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POINT_SPRITE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POINT_SPRITE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_EXCEPTIONS {
    uint32_t enable;
};

static inline void
__NVC097_SET_SHADER_EXCEPTIONS(uint32_t *val_out, struct nv_nvc097_SET_SHADER_EXCEPTIONS st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_EXCEPTIONS(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SHADER_EXCEPTIONS_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SHADER_EXCEPTIONS_ENABLE_TRUE; \
    struct nv_nvc097_SET_SHADER_EXCEPTIONS __data = { .enable = (args) }; \
    __NVC097_SET_SHADER_EXCEPTIONS(&val, __data); \
}

#define VA_NVC097_SET_SHADER_EXCEPTIONS V_NVC097_SET_SHADER_EXCEPTIONS

#define P_NVC097_SET_SHADER_EXCEPTIONS(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SHADER_EXCEPTIONS_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SHADER_EXCEPTIONS_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_EXCEPTIONS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_EXCEPTIONS, nvk_p_ret); \
} while(0)

struct nv_nvc097_CLEAR_REPORT_VALUE {
    uint32_t type;
};

static inline void
__NVC097_CLEAR_REPORT_VALUE(uint32_t *val_out, struct nv_nvc097_CLEAR_REPORT_VALUE st)
{
    uint32_t val = 0;
    
    assert(st.type < (UINT64_C(1) << 5));
    val |= st.type << 0;
    *val_out = val;
}

#define V_NVC097_CLEAR_REPORT_VALUE(val, args...) { \
    UNUSED uint32_t TYPE_DA_VERTICES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED; \
    UNUSED uint32_t TYPE_DA_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_VS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS; \
    UNUSED uint32_t TYPE_TI_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS; \
    UNUSED uint32_t TYPE_TS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS; \
    UNUSED uint32_t TYPE_TS_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_GS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS; \
    UNUSED uint32_t TYPE_GS_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_VTG_PRIMITIVES_OUT = NVC097_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT; \
    UNUSED uint32_t TYPE_STREAMING_PRIMITIVES_SUCCEEDED = NVC097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED; \
    UNUSED uint32_t TYPE_STREAMING_PRIMITIVES_NEEDED = NVC097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED; \
    UNUSED uint32_t TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED = NVC097_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED; \
    UNUSED uint32_t TYPE_CLIPPER_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS; \
    UNUSED uint32_t TYPE_CLIPPER_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_ZCULL_STATS = NVC097_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS; \
    UNUSED uint32_t TYPE_PS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS; \
    UNUSED uint32_t TYPE_ZPASS_PIXEL_CNT = NVC097_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT; \
    UNUSED uint32_t TYPE_ALPHA_BETA_CLOCKS = NVC097_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS; \
    struct nv_nvc097_CLEAR_REPORT_VALUE __data = { .type = (args) }; \
    __NVC097_CLEAR_REPORT_VALUE(&val, __data); \
}

#define VA_NVC097_CLEAR_REPORT_VALUE V_NVC097_CLEAR_REPORT_VALUE

#define P_NVC097_CLEAR_REPORT_VALUE(push, args...) do { \
    UNUSED uint32_t TYPE_DA_VERTICES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED; \
    UNUSED uint32_t TYPE_DA_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_VS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS; \
    UNUSED uint32_t TYPE_TI_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS; \
    UNUSED uint32_t TYPE_TS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS; \
    UNUSED uint32_t TYPE_TS_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_GS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS; \
    UNUSED uint32_t TYPE_GS_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_VTG_PRIMITIVES_OUT = NVC097_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT; \
    UNUSED uint32_t TYPE_STREAMING_PRIMITIVES_SUCCEEDED = NVC097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED; \
    UNUSED uint32_t TYPE_STREAMING_PRIMITIVES_NEEDED = NVC097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED; \
    UNUSED uint32_t TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED = NVC097_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED; \
    UNUSED uint32_t TYPE_CLIPPER_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS; \
    UNUSED uint32_t TYPE_CLIPPER_PRIMITIVES_GENERATED = NVC097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED; \
    UNUSED uint32_t TYPE_ZCULL_STATS = NVC097_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS; \
    UNUSED uint32_t TYPE_PS_INVOCATIONS = NVC097_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS; \
    UNUSED uint32_t TYPE_ZPASS_PIXEL_CNT = NVC097_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT; \
    UNUSED uint32_t TYPE_ALPHA_BETA_CLOCKS = NVC097_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS; \
    uint32_t nvk_p_ret; \
    V_NVC097_CLEAR_REPORT_VALUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CLEAR_REPORT_VALUE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ANTI_ALIAS_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_ANTI_ALIAS_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_ANTI_ALIAS_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_ANTI_ALIAS_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_ANTI_ALIAS_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_ANTI_ALIAS_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_ANTI_ALIAS_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_ANTI_ALIAS_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_ANTI_ALIAS_ENABLE V_NVC097_SET_ANTI_ALIAS_ENABLE

#define P_NVC097_SET_ANTI_ALIAS_ENABLE(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_ANTI_ALIAS_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_ANTI_ALIAS_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ANTI_ALIAS_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ANTI_ALIAS_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_SELECT {
    uint32_t target_count;
};

static inline void
__NVC097_SET_ZT_SELECT(uint32_t *val_out, struct nv_nvc097_SET_ZT_SELECT st)
{
    uint32_t val = 0;
    
    assert(st.target_count < (UINT64_C(1) << 1));
    val |= st.target_count << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZT_SELECT(val, args...) { \
    struct nv_nvc097_SET_ZT_SELECT __data = { .target_count = (args) }; \
    __NVC097_SET_ZT_SELECT(&val, __data); \
}

#define VA_NVC097_SET_ZT_SELECT V_NVC097_SET_ZT_SELECT

#define P_NVC097_SET_ZT_SELECT(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_SELECT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_SELECT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ANTI_ALIAS_ALPHA_CONTROL {
    uint32_t alpha_to_coverage;
    uint32_t alpha_to_one;
};

static inline void
__NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_ANTI_ALIAS_ALPHA_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.alpha_to_coverage < (UINT64_C(1) << 1));
    val |= st.alpha_to_coverage << 0;
    
    assert(st.alpha_to_one < (UINT64_C(1) << 1));
    val |= st.alpha_to_one << 4;
    *val_out = val;
}

#define V_NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL(val, args...) { \
    UNUSED uint32_t ALPHA_TO_COVERAGE_DISABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE; \
    UNUSED uint32_t ALPHA_TO_COVERAGE_ENABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE; \
    UNUSED uint32_t ALPHA_TO_ONE_DISABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE; \
    UNUSED uint32_t ALPHA_TO_ONE_ENABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE; \
    struct nv_nvc097_SET_ANTI_ALIAS_ALPHA_CONTROL __data = args; \
    __NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL V_NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL

#define P_NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL(push, args...) do { \
    UNUSED uint32_t ALPHA_TO_COVERAGE_DISABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE; \
    UNUSED uint32_t ALPHA_TO_COVERAGE_ENABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE; \
    UNUSED uint32_t ALPHA_TO_ONE_DISABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE; \
    UNUSED uint32_t ALPHA_TO_ONE_ENABLE = NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RENDER_ENABLE_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_RENDER_ENABLE_A(uint32_t *val_out, struct nv_nvc097_SET_RENDER_ENABLE_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_RENDER_ENABLE_A(val, args...) { \
    struct nv_nvc097_SET_RENDER_ENABLE_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_RENDER_ENABLE_A(&val, __data); \
}

#define VA_NVC097_SET_RENDER_ENABLE_A V_NVC097_SET_RENDER_ENABLE_A

#define P_NVC097_SET_RENDER_ENABLE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RENDER_ENABLE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RENDER_ENABLE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RENDER_ENABLE_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_RENDER_ENABLE_B(uint32_t *val_out, struct nv_nvc097_SET_RENDER_ENABLE_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_RENDER_ENABLE_B(val, args...) { \
    struct nv_nvc097_SET_RENDER_ENABLE_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_RENDER_ENABLE_B(&val, __data); \
}

#define VA_NVC097_SET_RENDER_ENABLE_B V_NVC097_SET_RENDER_ENABLE_B

#define P_NVC097_SET_RENDER_ENABLE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RENDER_ENABLE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RENDER_ENABLE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RENDER_ENABLE_C {
    uint32_t mode;
};

static inline void
__NVC097_SET_RENDER_ENABLE_C(uint32_t *val_out, struct nv_nvc097_SET_RENDER_ENABLE_C st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 3));
    val |= st.mode << 0;
    *val_out = val;
}

#define V_NVC097_SET_RENDER_ENABLE_C(val, args...) { \
    UNUSED uint32_t MODE_FALSE = NVC097_SET_RENDER_ENABLE_C_MODE_FALSE; \
    UNUSED uint32_t MODE_TRUE = NVC097_SET_RENDER_ENABLE_C_MODE_TRUE; \
    UNUSED uint32_t MODE_CONDITIONAL = NVC097_SET_RENDER_ENABLE_C_MODE_CONDITIONAL; \
    UNUSED uint32_t MODE_RENDER_IF_EQUAL = NVC097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL; \
    UNUSED uint32_t MODE_RENDER_IF_NOT_EQUAL = NVC097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL; \
    struct nv_nvc097_SET_RENDER_ENABLE_C __data = { .mode = (args) }; \
    __NVC097_SET_RENDER_ENABLE_C(&val, __data); \
}

#define VA_NVC097_SET_RENDER_ENABLE_C V_NVC097_SET_RENDER_ENABLE_C

#define P_NVC097_SET_RENDER_ENABLE_C(push, args...) do { \
    UNUSED uint32_t MODE_FALSE = NVC097_SET_RENDER_ENABLE_C_MODE_FALSE; \
    UNUSED uint32_t MODE_TRUE = NVC097_SET_RENDER_ENABLE_C_MODE_TRUE; \
    UNUSED uint32_t MODE_CONDITIONAL = NVC097_SET_RENDER_ENABLE_C_MODE_CONDITIONAL; \
    UNUSED uint32_t MODE_RENDER_IF_EQUAL = NVC097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL; \
    UNUSED uint32_t MODE_RENDER_IF_NOT_EQUAL = NVC097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RENDER_ENABLE_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RENDER_ENABLE_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TEX_SAMPLER_POOL_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_TEX_SAMPLER_POOL_A(uint32_t *val_out, struct nv_nvc097_SET_TEX_SAMPLER_POOL_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_TEX_SAMPLER_POOL_A(val, args...) { \
    struct nv_nvc097_SET_TEX_SAMPLER_POOL_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_TEX_SAMPLER_POOL_A(&val, __data); \
}

#define VA_NVC097_SET_TEX_SAMPLER_POOL_A V_NVC097_SET_TEX_SAMPLER_POOL_A

#define P_NVC097_SET_TEX_SAMPLER_POOL_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TEX_SAMPLER_POOL_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TEX_SAMPLER_POOL_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TEX_SAMPLER_POOL_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_TEX_SAMPLER_POOL_B(uint32_t *val_out, struct nv_nvc097_SET_TEX_SAMPLER_POOL_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_TEX_SAMPLER_POOL_B(val, args...) { \
    struct nv_nvc097_SET_TEX_SAMPLER_POOL_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_TEX_SAMPLER_POOL_B(&val, __data); \
}

#define VA_NVC097_SET_TEX_SAMPLER_POOL_B V_NVC097_SET_TEX_SAMPLER_POOL_B

#define P_NVC097_SET_TEX_SAMPLER_POOL_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TEX_SAMPLER_POOL_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TEX_SAMPLER_POOL_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TEX_SAMPLER_POOL_C {
    uint32_t maximum_index;
};

static inline void
__NVC097_SET_TEX_SAMPLER_POOL_C(uint32_t *val_out, struct nv_nvc097_SET_TEX_SAMPLER_POOL_C st)
{
    uint32_t val = 0;
    
    assert(st.maximum_index < (UINT64_C(1) << 20));
    val |= st.maximum_index << 0;
    *val_out = val;
}

#define V_NVC097_SET_TEX_SAMPLER_POOL_C(val, args...) { \
    struct nv_nvc097_SET_TEX_SAMPLER_POOL_C __data = { .maximum_index = (args) }; \
    __NVC097_SET_TEX_SAMPLER_POOL_C(&val, __data); \
}

#define VA_NVC097_SET_TEX_SAMPLER_POOL_C V_NVC097_SET_TEX_SAMPLER_POOL_C

#define P_NVC097_SET_TEX_SAMPLER_POOL_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TEX_SAMPLER_POOL_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TEX_SAMPLER_POOL_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SLOPE_SCALE_DEPTH_BIAS {
    uint32_t v;
};

static inline void
__NVC097_SET_SLOPE_SCALE_DEPTH_BIAS(uint32_t *val_out, struct nv_nvc097_SET_SLOPE_SCALE_DEPTH_BIAS st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SLOPE_SCALE_DEPTH_BIAS(val, args...) { \
    struct nv_nvc097_SET_SLOPE_SCALE_DEPTH_BIAS __data = { .v = (args) }; \
    __NVC097_SET_SLOPE_SCALE_DEPTH_BIAS(&val, __data); \
}

#define VA_NVC097_SET_SLOPE_SCALE_DEPTH_BIAS V_NVC097_SET_SLOPE_SCALE_DEPTH_BIAS

#define P_NVC097_SET_SLOPE_SCALE_DEPTH_BIAS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SLOPE_SCALE_DEPTH_BIAS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SLOPE_SCALE_DEPTH_BIAS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ANTI_ALIASED_LINE {
    uint32_t enable;
};

static inline void
__NVC097_SET_ANTI_ALIASED_LINE(uint32_t *val_out, struct nv_nvc097_SET_ANTI_ALIASED_LINE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_ANTI_ALIASED_LINE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ANTI_ALIASED_LINE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ANTI_ALIASED_LINE_ENABLE_TRUE; \
    struct nv_nvc097_SET_ANTI_ALIASED_LINE __data = { .enable = (args) }; \
    __NVC097_SET_ANTI_ALIASED_LINE(&val, __data); \
}

#define VA_NVC097_SET_ANTI_ALIASED_LINE V_NVC097_SET_ANTI_ALIASED_LINE

#define P_NVC097_SET_ANTI_ALIASED_LINE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ANTI_ALIASED_LINE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ANTI_ALIASED_LINE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ANTI_ALIASED_LINE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ANTI_ALIASED_LINE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TEX_HEADER_POOL_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_TEX_HEADER_POOL_A(uint32_t *val_out, struct nv_nvc097_SET_TEX_HEADER_POOL_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_TEX_HEADER_POOL_A(val, args...) { \
    struct nv_nvc097_SET_TEX_HEADER_POOL_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_TEX_HEADER_POOL_A(&val, __data); \
}

#define VA_NVC097_SET_TEX_HEADER_POOL_A V_NVC097_SET_TEX_HEADER_POOL_A

#define P_NVC097_SET_TEX_HEADER_POOL_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TEX_HEADER_POOL_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TEX_HEADER_POOL_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TEX_HEADER_POOL_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_TEX_HEADER_POOL_B(uint32_t *val_out, struct nv_nvc097_SET_TEX_HEADER_POOL_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_TEX_HEADER_POOL_B(val, args...) { \
    struct nv_nvc097_SET_TEX_HEADER_POOL_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_TEX_HEADER_POOL_B(&val, __data); \
}

#define VA_NVC097_SET_TEX_HEADER_POOL_B V_NVC097_SET_TEX_HEADER_POOL_B

#define P_NVC097_SET_TEX_HEADER_POOL_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TEX_HEADER_POOL_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TEX_HEADER_POOL_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TEX_HEADER_POOL_C {
    uint32_t maximum_index;
};

static inline void
__NVC097_SET_TEX_HEADER_POOL_C(uint32_t *val_out, struct nv_nvc097_SET_TEX_HEADER_POOL_C st)
{
    uint32_t val = 0;
    
    assert(st.maximum_index < (UINT64_C(1) << 22));
    val |= st.maximum_index << 0;
    *val_out = val;
}

#define V_NVC097_SET_TEX_HEADER_POOL_C(val, args...) { \
    struct nv_nvc097_SET_TEX_HEADER_POOL_C __data = { .maximum_index = (args) }; \
    __NVC097_SET_TEX_HEADER_POOL_C(&val, __data); \
}

#define VA_NVC097_SET_TEX_HEADER_POOL_C V_NVC097_SET_TEX_HEADER_POOL_C

#define P_NVC097_SET_TEX_HEADER_POOL_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TEX_HEADER_POOL_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TEX_HEADER_POOL_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ACTIVE_ZCULL_REGION {
    uint32_t id;
};

static inline void
__NVC097_SET_ACTIVE_ZCULL_REGION(uint32_t *val_out, struct nv_nvc097_SET_ACTIVE_ZCULL_REGION st)
{
    uint32_t val = 0;
    
    assert(st.id < (UINT64_C(1) << 6));
    val |= st.id << 0;
    *val_out = val;
}

#define V_NVC097_SET_ACTIVE_ZCULL_REGION(val, args...) { \
    struct nv_nvc097_SET_ACTIVE_ZCULL_REGION __data = { .id = (args) }; \
    __NVC097_SET_ACTIVE_ZCULL_REGION(&val, __data); \
}

#define VA_NVC097_SET_ACTIVE_ZCULL_REGION V_NVC097_SET_ACTIVE_ZCULL_REGION

#define P_NVC097_SET_ACTIVE_ZCULL_REGION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ACTIVE_ZCULL_REGION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ACTIVE_ZCULL_REGION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TWO_SIDED_STENCIL_TEST {
    uint32_t enable;
};

static inline void
__NVC097_SET_TWO_SIDED_STENCIL_TEST(uint32_t *val_out, struct nv_nvc097_SET_TWO_SIDED_STENCIL_TEST st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_TWO_SIDED_STENCIL_TEST(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE; \
    struct nv_nvc097_SET_TWO_SIDED_STENCIL_TEST __data = { .enable = (args) }; \
    __NVC097_SET_TWO_SIDED_STENCIL_TEST(&val, __data); \
}

#define VA_NVC097_SET_TWO_SIDED_STENCIL_TEST V_NVC097_SET_TWO_SIDED_STENCIL_TEST

#define P_NVC097_SET_TWO_SIDED_STENCIL_TEST(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TWO_SIDED_STENCIL_TEST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TWO_SIDED_STENCIL_TEST, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_STENCIL_OP_FAIL {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_STENCIL_OP_FAIL(uint32_t *val_out, struct nv_nvc097_SET_BACK_STENCIL_OP_FAIL st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BACK_STENCIL_OP_FAIL(val, args...) { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR; \
    struct nv_nvc097_SET_BACK_STENCIL_OP_FAIL __data = { .v = (args) }; \
    __NVC097_SET_BACK_STENCIL_OP_FAIL(&val, __data); \
}

#define VA_NVC097_SET_BACK_STENCIL_OP_FAIL V_NVC097_SET_BACK_STENCIL_OP_FAIL

#define P_NVC097_SET_BACK_STENCIL_OP_FAIL(push, args...) do { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_STENCIL_OP_FAIL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_STENCIL_OP_FAIL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_STENCIL_OP_ZFAIL {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_STENCIL_OP_ZFAIL(uint32_t *val_out, struct nv_nvc097_SET_BACK_STENCIL_OP_ZFAIL st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BACK_STENCIL_OP_ZFAIL(val, args...) { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR; \
    struct nv_nvc097_SET_BACK_STENCIL_OP_ZFAIL __data = { .v = (args) }; \
    __NVC097_SET_BACK_STENCIL_OP_ZFAIL(&val, __data); \
}

#define VA_NVC097_SET_BACK_STENCIL_OP_ZFAIL V_NVC097_SET_BACK_STENCIL_OP_ZFAIL

#define P_NVC097_SET_BACK_STENCIL_OP_ZFAIL(push, args...) do { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_STENCIL_OP_ZFAIL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_STENCIL_OP_ZFAIL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_STENCIL_OP_ZPASS {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_STENCIL_OP_ZPASS(uint32_t *val_out, struct nv_nvc097_SET_BACK_STENCIL_OP_ZPASS st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BACK_STENCIL_OP_ZPASS(val, args...) { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR; \
    struct nv_nvc097_SET_BACK_STENCIL_OP_ZPASS __data = { .v = (args) }; \
    __NVC097_SET_BACK_STENCIL_OP_ZPASS(&val, __data); \
}

#define VA_NVC097_SET_BACK_STENCIL_OP_ZPASS V_NVC097_SET_BACK_STENCIL_OP_ZPASS

#define P_NVC097_SET_BACK_STENCIL_OP_ZPASS(push, args...) do { \
    UNUSED uint32_t V_OGL_KEEP = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP; \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE; \
    UNUSED uint32_t V_OGL_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT; \
    UNUSED uint32_t V_OGL_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT; \
    UNUSED uint32_t V_OGL_INVERT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT; \
    UNUSED uint32_t V_OGL_INCR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR; \
    UNUSED uint32_t V_OGL_DECR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR; \
    UNUSED uint32_t V_D3D_KEEP = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_REPLACE = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE; \
    UNUSED uint32_t V_D3D_INCRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT; \
    UNUSED uint32_t V_D3D_DECRSAT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT; \
    UNUSED uint32_t V_D3D_INVERT = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT; \
    UNUSED uint32_t V_D3D_INCR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR; \
    UNUSED uint32_t V_D3D_DECR = NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_STENCIL_OP_ZPASS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_STENCIL_OP_ZPASS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BACK_STENCIL_FUNC {
    uint32_t v;
};

static inline void
__NVC097_SET_BACK_STENCIL_FUNC(uint32_t *val_out, struct nv_nvc097_SET_BACK_STENCIL_FUNC st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BACK_STENCIL_FUNC(val, args...) { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS; \
    struct nv_nvc097_SET_BACK_STENCIL_FUNC __data = { .v = (args) }; \
    __NVC097_SET_BACK_STENCIL_FUNC(&val, __data); \
}

#define VA_NVC097_SET_BACK_STENCIL_FUNC V_NVC097_SET_BACK_STENCIL_FUNC

#define P_NVC097_SET_BACK_STENCIL_FUNC(push, args...) do { \
    UNUSED uint32_t V_OGL_NEVER = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_NEVER; \
    UNUSED uint32_t V_OGL_LESS = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_LESS; \
    UNUSED uint32_t V_OGL_EQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL; \
    UNUSED uint32_t V_OGL_LEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL; \
    UNUSED uint32_t V_OGL_GREATER = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_GREATER; \
    UNUSED uint32_t V_OGL_NOTEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL; \
    UNUSED uint32_t V_OGL_GEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL; \
    UNUSED uint32_t V_OGL_ALWAYS = NVC097_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS; \
    UNUSED uint32_t V_D3D_NEVER = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_NEVER; \
    UNUSED uint32_t V_D3D_LESS = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_LESS; \
    UNUSED uint32_t V_D3D_EQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL; \
    UNUSED uint32_t V_D3D_LESSEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL; \
    UNUSED uint32_t V_D3D_GREATER = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_GREATER; \
    UNUSED uint32_t V_D3D_NOTEQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL; \
    UNUSED uint32_t V_D3D_GREATEREQUAL = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL; \
    UNUSED uint32_t V_D3D_ALWAYS = NVC097_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BACK_STENCIL_FUNC(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BACK_STENCIL_FUNC, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SRGB_WRITE {
    uint32_t enable;
};

static inline void
__NVC097_SET_SRGB_WRITE(uint32_t *val_out, struct nv_nvc097_SET_SRGB_WRITE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_SRGB_WRITE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SRGB_WRITE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SRGB_WRITE_ENABLE_TRUE; \
    struct nv_nvc097_SET_SRGB_WRITE __data = { .enable = (args) }; \
    __NVC097_SET_SRGB_WRITE(&val, __data); \
}

#define VA_NVC097_SET_SRGB_WRITE V_NVC097_SET_SRGB_WRITE

#define P_NVC097_SET_SRGB_WRITE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_SRGB_WRITE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_SRGB_WRITE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SRGB_WRITE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SRGB_WRITE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_BIAS {
    uint32_t v;
};

static inline void
__NVC097_SET_DEPTH_BIAS(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_BIAS st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_BIAS(val, args...) { \
    struct nv_nvc097_SET_DEPTH_BIAS __data = { .v = (args) }; \
    __NVC097_SET_DEPTH_BIAS(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_BIAS V_NVC097_SET_DEPTH_BIAS

#define P_NVC097_SET_DEPTH_BIAS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_BIAS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_BIAS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_FORMAT {
    uint32_t type;
};

static inline void
__NVC097_SET_ZCULL_REGION_FORMAT(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_FORMAT st)
{
    uint32_t val = 0;
    
    assert(st.type < (UINT64_C(1) << 4));
    val |= st.type << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_FORMAT(val, args...) { \
    UNUSED uint32_t TYPE_Z_4X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4; \
    UNUSED uint32_t TYPE_ZS_4X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4; \
    UNUSED uint32_t TYPE_Z_4X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2; \
    UNUSED uint32_t TYPE_Z_2X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4; \
    UNUSED uint32_t TYPE_Z_16X8_4X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4; \
    UNUSED uint32_t TYPE_Z_8X8_4X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2; \
    UNUSED uint32_t TYPE_Z_8X8_2X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4; \
    UNUSED uint32_t TYPE_Z_16X16_4X8 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8; \
    UNUSED uint32_t TYPE_Z_4X8_2X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2; \
    UNUSED uint32_t TYPE_ZS_16X8_4X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2; \
    UNUSED uint32_t TYPE_ZS_16X8_2X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4; \
    UNUSED uint32_t TYPE_ZS_8X8_2X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2; \
    UNUSED uint32_t TYPE_Z_4X8_1X1 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1; \
    struct nv_nvc097_SET_ZCULL_REGION_FORMAT __data = { .type = (args) }; \
    __NVC097_SET_ZCULL_REGION_FORMAT(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_FORMAT V_NVC097_SET_ZCULL_REGION_FORMAT

#define P_NVC097_SET_ZCULL_REGION_FORMAT(push, args...) do { \
    UNUSED uint32_t TYPE_Z_4X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4; \
    UNUSED uint32_t TYPE_ZS_4X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4; \
    UNUSED uint32_t TYPE_Z_4X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2; \
    UNUSED uint32_t TYPE_Z_2X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4; \
    UNUSED uint32_t TYPE_Z_16X8_4X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4; \
    UNUSED uint32_t TYPE_Z_8X8_4X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2; \
    UNUSED uint32_t TYPE_Z_8X8_2X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4; \
    UNUSED uint32_t TYPE_Z_16X16_4X8 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8; \
    UNUSED uint32_t TYPE_Z_4X8_2X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2; \
    UNUSED uint32_t TYPE_ZS_16X8_4X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2; \
    UNUSED uint32_t TYPE_ZS_16X8_2X4 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4; \
    UNUSED uint32_t TYPE_ZS_8X8_2X2 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2; \
    UNUSED uint32_t TYPE_Z_4X8_1X1 = NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_FORMAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_FORMAT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RT_LAYER {
    uint32_t v;
    uint32_t control;
};

static inline void
__NVC097_SET_RT_LAYER(uint32_t *val_out, struct nv_nvc097_SET_RT_LAYER st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    
    assert(st.control < (UINT64_C(1) << 1));
    val |= st.control << 16;
    *val_out = val;
}

#define V_NVC097_SET_RT_LAYER(val, args...) { \
    UNUSED uint32_t CONTROL_V_SELECTS_LAYER = NVC097_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER; \
    UNUSED uint32_t CONTROL_GEOMETRY_SHADER_SELECTS_LAYER = NVC097_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER; \
    struct nv_nvc097_SET_RT_LAYER __data = args; \
    __NVC097_SET_RT_LAYER(&val, __data); \
}

#define VA_NVC097_SET_RT_LAYER V_NVC097_SET_RT_LAYER

#define P_NVC097_SET_RT_LAYER(push, args...) do { \
    UNUSED uint32_t CONTROL_V_SELECTS_LAYER = NVC097_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER; \
    UNUSED uint32_t CONTROL_GEOMETRY_SHADER_SELECTS_LAYER = NVC097_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RT_LAYER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RT_LAYER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ANTI_ALIAS {
    uint32_t samples;
};

static inline void
__NVC097_SET_ANTI_ALIAS(uint32_t *val_out, struct nv_nvc097_SET_ANTI_ALIAS st)
{
    uint32_t val = 0;
    
    assert(st.samples < (UINT64_C(1) << 4));
    val |= st.samples << 0;
    *val_out = val;
}

#define V_NVC097_SET_ANTI_ALIAS(val, args...) { \
    UNUSED uint32_t SAMPLES_MODE_1X1 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_1X1; \
    UNUSED uint32_t SAMPLES_MODE_2X1 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1; \
    UNUSED uint32_t SAMPLES_MODE_2X2 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2; \
    UNUSED uint32_t SAMPLES_MODE_4X2 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2; \
    UNUSED uint32_t SAMPLES_MODE_4X2_D3D = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D; \
    UNUSED uint32_t SAMPLES_MODE_2X1_D3D = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D; \
    UNUSED uint32_t SAMPLES_MODE_4X4 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X4; \
    UNUSED uint32_t SAMPLES_MODE_2X2_VC_4 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4; \
    UNUSED uint32_t SAMPLES_MODE_2X2_VC_12 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12; \
    UNUSED uint32_t SAMPLES_MODE_4X2_VC_8 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8; \
    UNUSED uint32_t SAMPLES_MODE_4X2_VC_24 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24; \
    struct nv_nvc097_SET_ANTI_ALIAS __data = { .samples = (args) }; \
    __NVC097_SET_ANTI_ALIAS(&val, __data); \
}

#define VA_NVC097_SET_ANTI_ALIAS V_NVC097_SET_ANTI_ALIAS

#define P_NVC097_SET_ANTI_ALIAS(push, args...) do { \
    UNUSED uint32_t SAMPLES_MODE_1X1 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_1X1; \
    UNUSED uint32_t SAMPLES_MODE_2X1 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1; \
    UNUSED uint32_t SAMPLES_MODE_2X2 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2; \
    UNUSED uint32_t SAMPLES_MODE_4X2 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2; \
    UNUSED uint32_t SAMPLES_MODE_4X2_D3D = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D; \
    UNUSED uint32_t SAMPLES_MODE_2X1_D3D = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D; \
    UNUSED uint32_t SAMPLES_MODE_4X4 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X4; \
    UNUSED uint32_t SAMPLES_MODE_2X2_VC_4 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4; \
    UNUSED uint32_t SAMPLES_MODE_2X2_VC_12 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12; \
    UNUSED uint32_t SAMPLES_MODE_4X2_VC_8 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8; \
    UNUSED uint32_t SAMPLES_MODE_4X2_VC_24 = NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ANTI_ALIAS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ANTI_ALIAS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_EDGE_FLAG {
    uint32_t v;
};

static inline void
__NVC097_SET_EDGE_FLAG(uint32_t *val_out, struct nv_nvc097_SET_EDGE_FLAG st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_EDGE_FLAG(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_EDGE_FLAG_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_EDGE_FLAG_V_TRUE; \
    struct nv_nvc097_SET_EDGE_FLAG __data = { .v = (args) }; \
    __NVC097_SET_EDGE_FLAG(&val, __data); \
}

#define VA_NVC097_SET_EDGE_FLAG V_NVC097_SET_EDGE_FLAG

#define P_NVC097_SET_EDGE_FLAG(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_EDGE_FLAG_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_EDGE_FLAG_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_EDGE_FLAG(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_EDGE_FLAG, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INLINE_INDEX {
    uint32_t v;
};

static inline void
__NVC097_DRAW_INLINE_INDEX(uint32_t *val_out, struct nv_nvc097_DRAW_INLINE_INDEX st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_DRAW_INLINE_INDEX(val, args...) { \
    struct nv_nvc097_DRAW_INLINE_INDEX __data = { .v = (args) }; \
    __NVC097_DRAW_INLINE_INDEX(&val, __data); \
}

#define VA_NVC097_DRAW_INLINE_INDEX V_NVC097_DRAW_INLINE_INDEX

#define P_NVC097_DRAW_INLINE_INDEX(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INLINE_INDEX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INLINE_INDEX, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INLINE_INDEX2X16_ALIGN {
    uint32_t count;
    uint32_t start_odd;
};

static inline void
__NVC097_SET_INLINE_INDEX2X16_ALIGN(uint32_t *val_out, struct nv_nvc097_SET_INLINE_INDEX2X16_ALIGN st)
{
    uint32_t val = 0;
    
    assert(st.count < (UINT64_C(1) << 31));
    val |= st.count << 0;
    
    assert(st.start_odd < (UINT64_C(1) << 1));
    val |= st.start_odd << 31;
    *val_out = val;
}

#define V_NVC097_SET_INLINE_INDEX2X16_ALIGN(val, args...) { \
    UNUSED uint32_t START_ODD_FALSE = NVC097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE; \
    UNUSED uint32_t START_ODD_TRUE = NVC097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE; \
    struct nv_nvc097_SET_INLINE_INDEX2X16_ALIGN __data = args; \
    __NVC097_SET_INLINE_INDEX2X16_ALIGN(&val, __data); \
}

#define VA_NVC097_SET_INLINE_INDEX2X16_ALIGN V_NVC097_SET_INLINE_INDEX2X16_ALIGN

#define P_NVC097_SET_INLINE_INDEX2X16_ALIGN(push, args...) do { \
    UNUSED uint32_t START_ODD_FALSE = NVC097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE; \
    UNUSED uint32_t START_ODD_TRUE = NVC097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INLINE_INDEX2X16_ALIGN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INLINE_INDEX2X16_ALIGN, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INLINE_INDEX2X16 {
    uint32_t even;
    uint32_t odd;
};

static inline void
__NVC097_DRAW_INLINE_INDEX2X16(uint32_t *val_out, struct nv_nvc097_DRAW_INLINE_INDEX2X16 st)
{
    uint32_t val = 0;
    
    assert(st.even < (UINT64_C(1) << 16));
    val |= st.even << 0;
    
    assert(st.odd < (UINT64_C(1) << 16));
    val |= st.odd << 16;
    *val_out = val;
}

#define V_NVC097_DRAW_INLINE_INDEX2X16(val, args...) { \
    struct nv_nvc097_DRAW_INLINE_INDEX2X16 __data = args; \
    __NVC097_DRAW_INLINE_INDEX2X16(&val, __data); \
}

#define VA_NVC097_DRAW_INLINE_INDEX2X16 V_NVC097_DRAW_INLINE_INDEX2X16

#define P_NVC097_DRAW_INLINE_INDEX2X16(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INLINE_INDEX2X16(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INLINE_INDEX2X16, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_GLOBAL_BASE_OFFSET_A {
    uint32_t upper;
};

static inline void
__NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_GLOBAL_BASE_OFFSET_A st)
{
    uint32_t val = 0;
    
    assert(st.upper < (UINT64_C(1) << 8));
    val |= st.upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A(val, args...) { \
    struct nv_nvc097_SET_VERTEX_GLOBAL_BASE_OFFSET_A __data = { .upper = (args) }; \
    __NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A V_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A

#define P_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_GLOBAL_BASE_OFFSET_B {
    uint32_t lower;
};

static inline void
__NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_GLOBAL_BASE_OFFSET_B st)
{
    uint32_t val = 0;
    
    val |= st.lower;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B(val, args...) { \
    struct nv_nvc097_SET_VERTEX_GLOBAL_BASE_OFFSET_B __data = { .lower = (args) }; \
    __NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B V_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B

#define P_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_A {
    uint32_t width;
};

static inline void
__NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_A st)
{
    uint32_t val = 0;
    
    assert(st.width < (UINT64_C(1) << 16));
    val |= st.width << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_A __data = { .width = (args) }; \
    __NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A

#define P_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_B {
    uint32_t height;
};

static inline void
__NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_B st)
{
    uint32_t val = 0;
    
    assert(st.height < (UINT64_C(1) << 16));
    val |= st.height << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B(val, args...) { \
    struct nv_nvc097_SET_ZCULL_REGION_PIXEL_OFFSET_B __data = { .height = (args) }; \
    __NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B

#define P_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POINT_SPRITE_SELECT {
    uint32_t rmode;
    uint32_t origin;
    uint32_t texture0;
    uint32_t texture1;
    uint32_t texture2;
    uint32_t texture3;
    uint32_t texture4;
    uint32_t texture5;
    uint32_t texture6;
    uint32_t texture7;
    uint32_t texture8;
    uint32_t texture9;
};

static inline void
__NVC097_SET_POINT_SPRITE_SELECT(uint32_t *val_out, struct nv_nvc097_SET_POINT_SPRITE_SELECT st)
{
    uint32_t val = 0;
    
    assert(st.rmode < (UINT64_C(1) << 2));
    val |= st.rmode << 0;
    
    assert(st.origin < (UINT64_C(1) << 1));
    val |= st.origin << 2;
    
    assert(st.texture0 < (UINT64_C(1) << 1));
    val |= st.texture0 << 3;
    
    assert(st.texture1 < (UINT64_C(1) << 1));
    val |= st.texture1 << 4;
    
    assert(st.texture2 < (UINT64_C(1) << 1));
    val |= st.texture2 << 5;
    
    assert(st.texture3 < (UINT64_C(1) << 1));
    val |= st.texture3 << 6;
    
    assert(st.texture4 < (UINT64_C(1) << 1));
    val |= st.texture4 << 7;
    
    assert(st.texture5 < (UINT64_C(1) << 1));
    val |= st.texture5 << 8;
    
    assert(st.texture6 < (UINT64_C(1) << 1));
    val |= st.texture6 << 9;
    
    assert(st.texture7 < (UINT64_C(1) << 1));
    val |= st.texture7 << 10;
    
    assert(st.texture8 < (UINT64_C(1) << 1));
    val |= st.texture8 << 11;
    
    assert(st.texture9 < (UINT64_C(1) << 1));
    val |= st.texture9 << 12;
    *val_out = val;
}

#define V_NVC097_SET_POINT_SPRITE_SELECT(val, args...) { \
    UNUSED uint32_t RMODE_ZERO = NVC097_SET_POINT_SPRITE_SELECT_RMODE_ZERO; \
    UNUSED uint32_t RMODE_FROM_R = NVC097_SET_POINT_SPRITE_SELECT_RMODE_FROM_R; \
    UNUSED uint32_t RMODE_FROM_S = NVC097_SET_POINT_SPRITE_SELECT_RMODE_FROM_S; \
    UNUSED uint32_t ORIGIN_BOTTOM = NVC097_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM; \
    UNUSED uint32_t ORIGIN_TOP = NVC097_SET_POINT_SPRITE_SELECT_ORIGIN_TOP; \
    UNUSED uint32_t TEXTURE0_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE0_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE; \
    UNUSED uint32_t TEXTURE1_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE1_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE; \
    UNUSED uint32_t TEXTURE2_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE2_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE; \
    UNUSED uint32_t TEXTURE3_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE3_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE; \
    UNUSED uint32_t TEXTURE4_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE4_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE; \
    UNUSED uint32_t TEXTURE5_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE5_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE; \
    UNUSED uint32_t TEXTURE6_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE6_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE; \
    UNUSED uint32_t TEXTURE7_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE7_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE; \
    UNUSED uint32_t TEXTURE8_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE8_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE; \
    UNUSED uint32_t TEXTURE9_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE9_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE; \
    struct nv_nvc097_SET_POINT_SPRITE_SELECT __data = args; \
    __NVC097_SET_POINT_SPRITE_SELECT(&val, __data); \
}

#define VA_NVC097_SET_POINT_SPRITE_SELECT V_NVC097_SET_POINT_SPRITE_SELECT

#define P_NVC097_SET_POINT_SPRITE_SELECT(push, args...) do { \
    UNUSED uint32_t RMODE_ZERO = NVC097_SET_POINT_SPRITE_SELECT_RMODE_ZERO; \
    UNUSED uint32_t RMODE_FROM_R = NVC097_SET_POINT_SPRITE_SELECT_RMODE_FROM_R; \
    UNUSED uint32_t RMODE_FROM_S = NVC097_SET_POINT_SPRITE_SELECT_RMODE_FROM_S; \
    UNUSED uint32_t ORIGIN_BOTTOM = NVC097_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM; \
    UNUSED uint32_t ORIGIN_TOP = NVC097_SET_POINT_SPRITE_SELECT_ORIGIN_TOP; \
    UNUSED uint32_t TEXTURE0_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE0_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE; \
    UNUSED uint32_t TEXTURE1_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE1_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE; \
    UNUSED uint32_t TEXTURE2_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE2_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE; \
    UNUSED uint32_t TEXTURE3_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE3_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE; \
    UNUSED uint32_t TEXTURE4_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE4_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE; \
    UNUSED uint32_t TEXTURE5_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE5_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE; \
    UNUSED uint32_t TEXTURE6_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE6_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE; \
    UNUSED uint32_t TEXTURE7_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE7_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE; \
    UNUSED uint32_t TEXTURE8_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE8_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE; \
    UNUSED uint32_t TEXTURE9_PASSTHROUGH = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH; \
    UNUSED uint32_t TEXTURE9_GENERATE = NVC097_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POINT_SPRITE_SELECT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POINT_SPRITE_SELECT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PROGRAM_REGION_A {
    uint32_t address_upper;
};

static inline void
__NVC097_SET_PROGRAM_REGION_A(uint32_t *val_out, struct nv_nvc097_SET_PROGRAM_REGION_A st)
{
    uint32_t val = 0;
    
    assert(st.address_upper < (UINT64_C(1) << 8));
    val |= st.address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_PROGRAM_REGION_A(val, args...) { \
    struct nv_nvc097_SET_PROGRAM_REGION_A __data = { .address_upper = (args) }; \
    __NVC097_SET_PROGRAM_REGION_A(&val, __data); \
}

#define VA_NVC097_SET_PROGRAM_REGION_A V_NVC097_SET_PROGRAM_REGION_A

#define P_NVC097_SET_PROGRAM_REGION_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PROGRAM_REGION_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PROGRAM_REGION_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PROGRAM_REGION_B {
    uint32_t address_lower;
};

static inline void
__NVC097_SET_PROGRAM_REGION_B(uint32_t *val_out, struct nv_nvc097_SET_PROGRAM_REGION_B st)
{
    uint32_t val = 0;
    
    val |= st.address_lower;
    *val_out = val;
}

#define V_NVC097_SET_PROGRAM_REGION_B(val, args...) { \
    struct nv_nvc097_SET_PROGRAM_REGION_B __data = { .address_lower = (args) }; \
    __NVC097_SET_PROGRAM_REGION_B(&val, __data); \
}

#define VA_NVC097_SET_PROGRAM_REGION_B V_NVC097_SET_PROGRAM_REGION_B

#define P_NVC097_SET_PROGRAM_REGION_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PROGRAM_REGION_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PROGRAM_REGION_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ATTRIBUTE_DEFAULT {
    uint32_t color_front_diffuse;
    uint32_t color_front_specular;
    uint32_t generic_vector;
    uint32_t fixed_fnc_texture;
    uint32_t dx9_color0;
    uint32_t dx9_color1_to_color15;
};

static inline void
__NVC097_SET_ATTRIBUTE_DEFAULT(uint32_t *val_out, struct nv_nvc097_SET_ATTRIBUTE_DEFAULT st)
{
    uint32_t val = 0;
    
    assert(st.color_front_diffuse < (UINT64_C(1) << 1));
    val |= st.color_front_diffuse << 0;
    
    assert(st.color_front_specular < (UINT64_C(1) << 1));
    val |= st.color_front_specular << 1;
    
    assert(st.generic_vector < (UINT64_C(1) << 1));
    val |= st.generic_vector << 2;
    
    assert(st.fixed_fnc_texture < (UINT64_C(1) << 1));
    val |= st.fixed_fnc_texture << 3;
    
    assert(st.dx9_color0 < (UINT64_C(1) << 1));
    val |= st.dx9_color0 << 4;
    
    assert(st.dx9_color1_to_color15 < (UINT64_C(1) << 1));
    val |= st.dx9_color1_to_color15 << 5;
    *val_out = val;
}

#define V_NVC097_SET_ATTRIBUTE_DEFAULT(val, args...) { \
    UNUSED uint32_t COLOR_FRONT_DIFFUSE_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001; \
    UNUSED uint32_t COLOR_FRONT_DIFFUSE_VECTOR_1111 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111; \
    UNUSED uint32_t COLOR_FRONT_SPECULAR_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000; \
    UNUSED uint32_t COLOR_FRONT_SPECULAR_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001; \
    UNUSED uint32_t GENERIC_VECTOR_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000; \
    UNUSED uint32_t GENERIC_VECTOR_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001; \
    UNUSED uint32_t FIXED_FNC_TEXTURE_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000; \
    UNUSED uint32_t FIXED_FNC_TEXTURE_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001; \
    UNUSED uint32_t DX9_COLOR0_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001; \
    UNUSED uint32_t DX9_COLOR0_VECTOR_1111 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111; \
    UNUSED uint32_t DX9_COLOR1_TO_COLOR15_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000; \
    UNUSED uint32_t DX9_COLOR1_TO_COLOR15_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001; \
    struct nv_nvc097_SET_ATTRIBUTE_DEFAULT __data = args; \
    __NVC097_SET_ATTRIBUTE_DEFAULT(&val, __data); \
}

#define VA_NVC097_SET_ATTRIBUTE_DEFAULT V_NVC097_SET_ATTRIBUTE_DEFAULT

#define P_NVC097_SET_ATTRIBUTE_DEFAULT(push, args...) do { \
    UNUSED uint32_t COLOR_FRONT_DIFFUSE_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001; \
    UNUSED uint32_t COLOR_FRONT_DIFFUSE_VECTOR_1111 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111; \
    UNUSED uint32_t COLOR_FRONT_SPECULAR_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000; \
    UNUSED uint32_t COLOR_FRONT_SPECULAR_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001; \
    UNUSED uint32_t GENERIC_VECTOR_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000; \
    UNUSED uint32_t GENERIC_VECTOR_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001; \
    UNUSED uint32_t FIXED_FNC_TEXTURE_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000; \
    UNUSED uint32_t FIXED_FNC_TEXTURE_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001; \
    UNUSED uint32_t DX9_COLOR0_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001; \
    UNUSED uint32_t DX9_COLOR0_VECTOR_1111 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111; \
    UNUSED uint32_t DX9_COLOR1_TO_COLOR15_VECTOR_0000 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000; \
    UNUSED uint32_t DX9_COLOR1_TO_COLOR15_VECTOR_0001 = NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ATTRIBUTE_DEFAULT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ATTRIBUTE_DEFAULT, nvk_p_ret); \
} while(0)

struct nv_nvc097_END {
    uint32_t v;
};

static inline void
__NVC097_END(uint32_t *val_out, struct nv_nvc097_END st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_END(val, args...) { \
    struct nv_nvc097_END __data = { .v = (args) }; \
    __NVC097_END(&val, __data); \
}

#define VA_NVC097_END V_NVC097_END

#define P_NVC097_END(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_END(nvk_p_ret, args); \
    nv_push_val(push, NVC097_END, nvk_p_ret); \
} while(0)

struct nv_nvc097_BEGIN {
    uint32_t op;
    uint32_t primitive_id;
    uint32_t instance_id;
    uint32_t split_mode;
};

static inline void
__NVC097_BEGIN(uint32_t *val_out, struct nv_nvc097_BEGIN st)
{
    uint32_t val = 0;
    
    assert(st.op < (UINT64_C(1) << 16));
    val |= st.op << 0;
    
    assert(st.primitive_id < (UINT64_C(1) << 1));
    val |= st.primitive_id << 24;
    
    assert(st.instance_id < (UINT64_C(1) << 2));
    val |= st.instance_id << 26;
    
    assert(st.split_mode < (UINT64_C(1) << 2));
    val |= st.split_mode << 29;
    *val_out = val;
}

#define V_NVC097_BEGIN(val, args...) { \
    UNUSED uint32_t OP_POINTS = NVC097_BEGIN_OP_POINTS; \
    UNUSED uint32_t OP_LINES = NVC097_BEGIN_OP_LINES; \
    UNUSED uint32_t OP_LINE_LOOP = NVC097_BEGIN_OP_LINE_LOOP; \
    UNUSED uint32_t OP_LINE_STRIP = NVC097_BEGIN_OP_LINE_STRIP; \
    UNUSED uint32_t OP_TRIANGLES = NVC097_BEGIN_OP_TRIANGLES; \
    UNUSED uint32_t OP_TRIANGLE_STRIP = NVC097_BEGIN_OP_TRIANGLE_STRIP; \
    UNUSED uint32_t OP_TRIANGLE_FAN = NVC097_BEGIN_OP_TRIANGLE_FAN; \
    UNUSED uint32_t OP_QUADS = NVC097_BEGIN_OP_QUADS; \
    UNUSED uint32_t OP_QUAD_STRIP = NVC097_BEGIN_OP_QUAD_STRIP; \
    UNUSED uint32_t OP_POLYGON = NVC097_BEGIN_OP_POLYGON; \
    UNUSED uint32_t OP_LINELIST_ADJCY = NVC097_BEGIN_OP_LINELIST_ADJCY; \
    UNUSED uint32_t OP_LINESTRIP_ADJCY = NVC097_BEGIN_OP_LINESTRIP_ADJCY; \
    UNUSED uint32_t OP_TRIANGLELIST_ADJCY = NVC097_BEGIN_OP_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t OP_TRIANGLESTRIP_ADJCY = NVC097_BEGIN_OP_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t OP_PATCH = NVC097_BEGIN_OP_PATCH; \
    UNUSED uint32_t PRIMITIVE_ID_FIRST = NVC097_BEGIN_PRIMITIVE_ID_FIRST; \
    UNUSED uint32_t PRIMITIVE_ID_UNCHANGED = NVC097_BEGIN_PRIMITIVE_ID_UNCHANGED; \
    UNUSED uint32_t INSTANCE_ID_FIRST = NVC097_BEGIN_INSTANCE_ID_FIRST; \
    UNUSED uint32_t INSTANCE_ID_SUBSEQUENT = NVC097_BEGIN_INSTANCE_ID_SUBSEQUENT; \
    UNUSED uint32_t INSTANCE_ID_UNCHANGED = NVC097_BEGIN_INSTANCE_ID_UNCHANGED; \
    UNUSED uint32_t SPLIT_MODE_NORMAL_BEGIN_NORMAL_END = NVC097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END; \
    UNUSED uint32_t SPLIT_MODE_NORMAL_BEGIN_OPEN_END = NVC097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END; \
    UNUSED uint32_t SPLIT_MODE_OPEN_BEGIN_OPEN_END = NVC097_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END; \
    UNUSED uint32_t SPLIT_MODE_OPEN_BEGIN_NORMAL_END = NVC097_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END; \
    struct nv_nvc097_BEGIN __data = args; \
    __NVC097_BEGIN(&val, __data); \
}

#define VA_NVC097_BEGIN V_NVC097_BEGIN

#define P_NVC097_BEGIN(push, args...) do { \
    UNUSED uint32_t OP_POINTS = NVC097_BEGIN_OP_POINTS; \
    UNUSED uint32_t OP_LINES = NVC097_BEGIN_OP_LINES; \
    UNUSED uint32_t OP_LINE_LOOP = NVC097_BEGIN_OP_LINE_LOOP; \
    UNUSED uint32_t OP_LINE_STRIP = NVC097_BEGIN_OP_LINE_STRIP; \
    UNUSED uint32_t OP_TRIANGLES = NVC097_BEGIN_OP_TRIANGLES; \
    UNUSED uint32_t OP_TRIANGLE_STRIP = NVC097_BEGIN_OP_TRIANGLE_STRIP; \
    UNUSED uint32_t OP_TRIANGLE_FAN = NVC097_BEGIN_OP_TRIANGLE_FAN; \
    UNUSED uint32_t OP_QUADS = NVC097_BEGIN_OP_QUADS; \
    UNUSED uint32_t OP_QUAD_STRIP = NVC097_BEGIN_OP_QUAD_STRIP; \
    UNUSED uint32_t OP_POLYGON = NVC097_BEGIN_OP_POLYGON; \
    UNUSED uint32_t OP_LINELIST_ADJCY = NVC097_BEGIN_OP_LINELIST_ADJCY; \
    UNUSED uint32_t OP_LINESTRIP_ADJCY = NVC097_BEGIN_OP_LINESTRIP_ADJCY; \
    UNUSED uint32_t OP_TRIANGLELIST_ADJCY = NVC097_BEGIN_OP_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t OP_TRIANGLESTRIP_ADJCY = NVC097_BEGIN_OP_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t OP_PATCH = NVC097_BEGIN_OP_PATCH; \
    UNUSED uint32_t PRIMITIVE_ID_FIRST = NVC097_BEGIN_PRIMITIVE_ID_FIRST; \
    UNUSED uint32_t PRIMITIVE_ID_UNCHANGED = NVC097_BEGIN_PRIMITIVE_ID_UNCHANGED; \
    UNUSED uint32_t INSTANCE_ID_FIRST = NVC097_BEGIN_INSTANCE_ID_FIRST; \
    UNUSED uint32_t INSTANCE_ID_SUBSEQUENT = NVC097_BEGIN_INSTANCE_ID_SUBSEQUENT; \
    UNUSED uint32_t INSTANCE_ID_UNCHANGED = NVC097_BEGIN_INSTANCE_ID_UNCHANGED; \
    UNUSED uint32_t SPLIT_MODE_NORMAL_BEGIN_NORMAL_END = NVC097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END; \
    UNUSED uint32_t SPLIT_MODE_NORMAL_BEGIN_OPEN_END = NVC097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END; \
    UNUSED uint32_t SPLIT_MODE_OPEN_BEGIN_OPEN_END = NVC097_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END; \
    UNUSED uint32_t SPLIT_MODE_OPEN_BEGIN_NORMAL_END = NVC097_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END; \
    uint32_t nvk_p_ret; \
    V_NVC097_BEGIN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_BEGIN, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_ID_COPY {
    uint32_t enable;
    uint32_t attribute_slot;
};

static inline void
__NVC097_SET_VERTEX_ID_COPY(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_ID_COPY st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.attribute_slot < (UINT64_C(1) << 8));
    val |= st.attribute_slot << 4;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_ID_COPY(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VERTEX_ID_COPY_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VERTEX_ID_COPY_ENABLE_TRUE; \
    struct nv_nvc097_SET_VERTEX_ID_COPY __data = args; \
    __NVC097_SET_VERTEX_ID_COPY(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_ID_COPY V_NVC097_SET_VERTEX_ID_COPY

#define P_NVC097_SET_VERTEX_ID_COPY(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VERTEX_ID_COPY_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VERTEX_ID_COPY_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_ID_COPY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_ID_COPY, nvk_p_ret); \
} while(0)

struct nv_nvc097_ADD_TO_PRIMITIVE_ID {
    uint32_t v;
};

static inline void
__NVC097_ADD_TO_PRIMITIVE_ID(uint32_t *val_out, struct nv_nvc097_ADD_TO_PRIMITIVE_ID st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_ADD_TO_PRIMITIVE_ID(val, args...) { \
    struct nv_nvc097_ADD_TO_PRIMITIVE_ID __data = { .v = (args) }; \
    __NVC097_ADD_TO_PRIMITIVE_ID(&val, __data); \
}

#define VA_NVC097_ADD_TO_PRIMITIVE_ID V_NVC097_ADD_TO_PRIMITIVE_ID

#define P_NVC097_ADD_TO_PRIMITIVE_ID(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_ADD_TO_PRIMITIVE_ID(nvk_p_ret, args); \
    nv_push_val(push, NVC097_ADD_TO_PRIMITIVE_ID, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_PRIMITIVE_ID {
    uint32_t v;
};

static inline void
__NVC097_LOAD_PRIMITIVE_ID(uint32_t *val_out, struct nv_nvc097_LOAD_PRIMITIVE_ID st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_LOAD_PRIMITIVE_ID(val, args...) { \
    struct nv_nvc097_LOAD_PRIMITIVE_ID __data = { .v = (args) }; \
    __NVC097_LOAD_PRIMITIVE_ID(&val, __data); \
}

#define VA_NVC097_LOAD_PRIMITIVE_ID V_NVC097_LOAD_PRIMITIVE_ID

#define P_NVC097_LOAD_PRIMITIVE_ID(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_PRIMITIVE_ID(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_PRIMITIVE_ID, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_BASED_CULL {
    uint32_t batch_cull_enable;
    uint32_t before_fetch_enable;
};

static inline void
__NVC097_SET_SHADER_BASED_CULL(uint32_t *val_out, struct nv_nvc097_SET_SHADER_BASED_CULL st)
{
    uint32_t val = 0;
    
    assert(st.batch_cull_enable < (UINT64_C(1) << 1));
    val |= st.batch_cull_enable << 1;
    
    assert(st.before_fetch_enable < (UINT64_C(1) << 1));
    val |= st.before_fetch_enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_BASED_CULL(val, args...) { \
    UNUSED uint32_t BATCH_CULL_ENABLE_FALSE = NVC097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE; \
    UNUSED uint32_t BATCH_CULL_ENABLE_TRUE = NVC097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE; \
    UNUSED uint32_t BEFORE_FETCH_ENABLE_FALSE = NVC097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE; \
    UNUSED uint32_t BEFORE_FETCH_ENABLE_TRUE = NVC097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE; \
    struct nv_nvc097_SET_SHADER_BASED_CULL __data = args; \
    __NVC097_SET_SHADER_BASED_CULL(&val, __data); \
}

#define VA_NVC097_SET_SHADER_BASED_CULL V_NVC097_SET_SHADER_BASED_CULL

#define P_NVC097_SET_SHADER_BASED_CULL(push, args...) do { \
    UNUSED uint32_t BATCH_CULL_ENABLE_FALSE = NVC097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE; \
    UNUSED uint32_t BATCH_CULL_ENABLE_TRUE = NVC097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE; \
    UNUSED uint32_t BEFORE_FETCH_ENABLE_FALSE = NVC097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE; \
    UNUSED uint32_t BEFORE_FETCH_ENABLE_TRUE = NVC097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_BASED_CULL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_BASED_CULL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLASS_VERSION {
    uint32_t current;
    uint32_t oldest_supported;
};

static inline void
__NVC097_SET_CLASS_VERSION(uint32_t *val_out, struct nv_nvc097_SET_CLASS_VERSION st)
{
    uint32_t val = 0;
    
    assert(st.current < (UINT64_C(1) << 16));
    val |= st.current << 0;
    
    assert(st.oldest_supported < (UINT64_C(1) << 16));
    val |= st.oldest_supported << 16;
    *val_out = val;
}

#define V_NVC097_SET_CLASS_VERSION(val, args...) { \
    struct nv_nvc097_SET_CLASS_VERSION __data = args; \
    __NVC097_SET_CLASS_VERSION(&val, __data); \
}

#define VA_NVC097_SET_CLASS_VERSION V_NVC097_SET_CLASS_VERSION

#define P_NVC097_SET_CLASS_VERSION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLASS_VERSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLASS_VERSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_PRIMITIVE_RESTART {
    uint32_t enable;
};

static inline void
__NVC097_SET_DA_PRIMITIVE_RESTART(uint32_t *val_out, struct nv_nvc097_SET_DA_PRIMITIVE_RESTART st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_DA_PRIMITIVE_RESTART(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE; \
    struct nv_nvc097_SET_DA_PRIMITIVE_RESTART __data = { .enable = (args) }; \
    __NVC097_SET_DA_PRIMITIVE_RESTART(&val, __data); \
}

#define VA_NVC097_SET_DA_PRIMITIVE_RESTART V_NVC097_SET_DA_PRIMITIVE_RESTART

#define P_NVC097_SET_DA_PRIMITIVE_RESTART(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_PRIMITIVE_RESTART(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_PRIMITIVE_RESTART, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_INDEX {
    uint32_t v;
};

static inline void
__NVC097_SET_DA_PRIMITIVE_RESTART_INDEX(uint32_t *val_out, struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_INDEX st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX(val, args...) { \
    struct nv_nvc097_SET_DA_PRIMITIVE_RESTART_INDEX __data = { .v = (args) }; \
    __NVC097_SET_DA_PRIMITIVE_RESTART_INDEX(&val, __data); \
}

#define VA_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX V_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX

#define P_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_PRIMITIVE_RESTART_INDEX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_PRIMITIVE_RESTART_INDEX, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DA_OUTPUT {
    uint32_t vertex_id_uses_array_start;
};

static inline void
__NVC097_SET_DA_OUTPUT(uint32_t *val_out, struct nv_nvc097_SET_DA_OUTPUT st)
{
    uint32_t val = 0;
    
    assert(st.vertex_id_uses_array_start < (UINT64_C(1) << 1));
    val |= st.vertex_id_uses_array_start << 12;
    *val_out = val;
}

#define V_NVC097_SET_DA_OUTPUT(val, args...) { \
    UNUSED uint32_t VERTEX_ID_USES_ARRAY_START_FALSE = NVC097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE; \
    UNUSED uint32_t VERTEX_ID_USES_ARRAY_START_TRUE = NVC097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE; \
    struct nv_nvc097_SET_DA_OUTPUT __data = { .vertex_id_uses_array_start = (args) }; \
    __NVC097_SET_DA_OUTPUT(&val, __data); \
}

#define VA_NVC097_SET_DA_OUTPUT V_NVC097_SET_DA_OUTPUT

#define P_NVC097_SET_DA_OUTPUT(push, args...) do { \
    UNUSED uint32_t VERTEX_ID_USES_ARRAY_START_FALSE = NVC097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE; \
    UNUSED uint32_t VERTEX_ID_USES_ARRAY_START_TRUE = NVC097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DA_OUTPUT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DA_OUTPUT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ANTI_ALIASED_POINT {
    uint32_t enable;
};

static inline void
__NVC097_SET_ANTI_ALIASED_POINT(uint32_t *val_out, struct nv_nvc097_SET_ANTI_ALIASED_POINT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_ANTI_ALIASED_POINT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ANTI_ALIASED_POINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ANTI_ALIASED_POINT_ENABLE_TRUE; \
    struct nv_nvc097_SET_ANTI_ALIASED_POINT __data = { .enable = (args) }; \
    __NVC097_SET_ANTI_ALIASED_POINT(&val, __data); \
}

#define VA_NVC097_SET_ANTI_ALIASED_POINT V_NVC097_SET_ANTI_ALIASED_POINT

#define P_NVC097_SET_ANTI_ALIASED_POINT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ANTI_ALIASED_POINT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ANTI_ALIASED_POINT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ANTI_ALIASED_POINT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ANTI_ALIASED_POINT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POINT_CENTER_MODE {
    uint32_t v;
};

static inline void
__NVC097_SET_POINT_CENTER_MODE(uint32_t *val_out, struct nv_nvc097_SET_POINT_CENTER_MODE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_POINT_CENTER_MODE(val, args...) { \
    UNUSED uint32_t V_OGL = NVC097_SET_POINT_CENTER_MODE_V_OGL; \
    UNUSED uint32_t V_D3D = NVC097_SET_POINT_CENTER_MODE_V_D3D; \
    struct nv_nvc097_SET_POINT_CENTER_MODE __data = { .v = (args) }; \
    __NVC097_SET_POINT_CENTER_MODE(&val, __data); \
}

#define VA_NVC097_SET_POINT_CENTER_MODE V_NVC097_SET_POINT_CENTER_MODE

#define P_NVC097_SET_POINT_CENTER_MODE(push, args...) do { \
    UNUSED uint32_t V_OGL = NVC097_SET_POINT_CENTER_MODE_V_OGL; \
    UNUSED uint32_t V_D3D = NVC097_SET_POINT_CENTER_MODE_V_D3D; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POINT_CENTER_MODE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POINT_CENTER_MODE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LINE_SMOOTH_PARAMETERS {
    uint32_t falloff;
};

static inline void
__NVC097_SET_LINE_SMOOTH_PARAMETERS(uint32_t *val_out, struct nv_nvc097_SET_LINE_SMOOTH_PARAMETERS st)
{
    uint32_t val = 0;
    
    val |= st.falloff;
    *val_out = val;
}

#define V_NVC097_SET_LINE_SMOOTH_PARAMETERS(val, args...) { \
    UNUSED uint32_t FALLOFF__1_00 = NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00; \
    UNUSED uint32_t FALLOFF__1_33 = NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33; \
    UNUSED uint32_t FALLOFF__1_60 = NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60; \
    struct nv_nvc097_SET_LINE_SMOOTH_PARAMETERS __data = { .falloff = (args) }; \
    __NVC097_SET_LINE_SMOOTH_PARAMETERS(&val, __data); \
}

#define VA_NVC097_SET_LINE_SMOOTH_PARAMETERS V_NVC097_SET_LINE_SMOOTH_PARAMETERS

#define P_NVC097_SET_LINE_SMOOTH_PARAMETERS(push, args...) do { \
    UNUSED uint32_t FALLOFF__1_00 = NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00; \
    UNUSED uint32_t FALLOFF__1_33 = NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33; \
    UNUSED uint32_t FALLOFF__1_60 = NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LINE_SMOOTH_PARAMETERS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LINE_SMOOTH_PARAMETERS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LINE_STIPPLE {
    uint32_t enable;
};

static inline void
__NVC097_SET_LINE_STIPPLE(uint32_t *val_out, struct nv_nvc097_SET_LINE_STIPPLE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_LINE_STIPPLE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_LINE_STIPPLE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_LINE_STIPPLE_ENABLE_TRUE; \
    struct nv_nvc097_SET_LINE_STIPPLE __data = { .enable = (args) }; \
    __NVC097_SET_LINE_STIPPLE(&val, __data); \
}

#define VA_NVC097_SET_LINE_STIPPLE V_NVC097_SET_LINE_STIPPLE

#define P_NVC097_SET_LINE_STIPPLE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_LINE_STIPPLE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_LINE_STIPPLE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LINE_STIPPLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LINE_STIPPLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LINE_SMOOTH_EDGE_TABLE {
    uint32_t v0;
    uint32_t v1;
    uint32_t v2;
    uint32_t v3;
};

static inline void
__NVC097_SET_LINE_SMOOTH_EDGE_TABLE(uint32_t *val_out, struct nv_nvc097_SET_LINE_SMOOTH_EDGE_TABLE st)
{
    uint32_t val = 0;
    
    assert(st.v0 < (UINT64_C(1) << 8));
    val |= st.v0 << 0;
    
    assert(st.v1 < (UINT64_C(1) << 8));
    val |= st.v1 << 8;
    
    assert(st.v2 < (UINT64_C(1) << 8));
    val |= st.v2 << 16;
    
    assert(st.v3 < (UINT64_C(1) << 8));
    val |= st.v3 << 24;
    *val_out = val;
}

#define V_NVC097_SET_LINE_SMOOTH_EDGE_TABLE(val, args...) { \
    struct nv_nvc097_SET_LINE_SMOOTH_EDGE_TABLE __data = args; \
    __NVC097_SET_LINE_SMOOTH_EDGE_TABLE(&val, __data); \
}

#define VA_NVC097_SET_LINE_SMOOTH_EDGE_TABLE(i) V_NVC097_SET_LINE_SMOOTH_EDGE_TABLE

#define P_NVC097_SET_LINE_SMOOTH_EDGE_TABLE(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LINE_SMOOTH_EDGE_TABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LINE_SMOOTH_EDGE_TABLE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LINE_STIPPLE_PARAMETERS {
    uint32_t factor;
    uint32_t pattern;
};

static inline void
__NVC097_SET_LINE_STIPPLE_PARAMETERS(uint32_t *val_out, struct nv_nvc097_SET_LINE_STIPPLE_PARAMETERS st)
{
    uint32_t val = 0;
    
    assert(st.factor < (UINT64_C(1) << 8));
    val |= st.factor << 0;
    
    assert(st.pattern < (UINT64_C(1) << 16));
    val |= st.pattern << 8;
    *val_out = val;
}

#define V_NVC097_SET_LINE_STIPPLE_PARAMETERS(val, args...) { \
    struct nv_nvc097_SET_LINE_STIPPLE_PARAMETERS __data = args; \
    __NVC097_SET_LINE_STIPPLE_PARAMETERS(&val, __data); \
}

#define VA_NVC097_SET_LINE_STIPPLE_PARAMETERS V_NVC097_SET_LINE_STIPPLE_PARAMETERS

#define P_NVC097_SET_LINE_STIPPLE_PARAMETERS(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LINE_STIPPLE_PARAMETERS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LINE_STIPPLE_PARAMETERS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PROVOKING_VERTEX {
    uint32_t v;
};

static inline void
__NVC097_SET_PROVOKING_VERTEX(uint32_t *val_out, struct nv_nvc097_SET_PROVOKING_VERTEX st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PROVOKING_VERTEX(val, args...) { \
    UNUSED uint32_t V_FIRST = NVC097_SET_PROVOKING_VERTEX_V_FIRST; \
    UNUSED uint32_t V_LAST = NVC097_SET_PROVOKING_VERTEX_V_LAST; \
    struct nv_nvc097_SET_PROVOKING_VERTEX __data = { .v = (args) }; \
    __NVC097_SET_PROVOKING_VERTEX(&val, __data); \
}

#define VA_NVC097_SET_PROVOKING_VERTEX V_NVC097_SET_PROVOKING_VERTEX

#define P_NVC097_SET_PROVOKING_VERTEX(push, args...) do { \
    UNUSED uint32_t V_FIRST = NVC097_SET_PROVOKING_VERTEX_V_FIRST; \
    UNUSED uint32_t V_LAST = NVC097_SET_PROVOKING_VERTEX_V_LAST; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PROVOKING_VERTEX(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PROVOKING_VERTEX, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TWO_SIDED_LIGHT {
    uint32_t enable;
};

static inline void
__NVC097_SET_TWO_SIDED_LIGHT(uint32_t *val_out, struct nv_nvc097_SET_TWO_SIDED_LIGHT st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_TWO_SIDED_LIGHT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_TWO_SIDED_LIGHT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_TWO_SIDED_LIGHT_ENABLE_TRUE; \
    struct nv_nvc097_SET_TWO_SIDED_LIGHT __data = { .enable = (args) }; \
    __NVC097_SET_TWO_SIDED_LIGHT(&val, __data); \
}

#define VA_NVC097_SET_TWO_SIDED_LIGHT V_NVC097_SET_TWO_SIDED_LIGHT

#define P_NVC097_SET_TWO_SIDED_LIGHT(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_TWO_SIDED_LIGHT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_TWO_SIDED_LIGHT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TWO_SIDED_LIGHT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TWO_SIDED_LIGHT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POLYGON_STIPPLE {
    uint32_t enable;
};

static inline void
__NVC097_SET_POLYGON_STIPPLE(uint32_t *val_out, struct nv_nvc097_SET_POLYGON_STIPPLE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_POLYGON_STIPPLE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLYGON_STIPPLE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLYGON_STIPPLE_ENABLE_TRUE; \
    struct nv_nvc097_SET_POLYGON_STIPPLE __data = { .enable = (args) }; \
    __NVC097_SET_POLYGON_STIPPLE(&val, __data); \
}

#define VA_NVC097_SET_POLYGON_STIPPLE V_NVC097_SET_POLYGON_STIPPLE

#define P_NVC097_SET_POLYGON_STIPPLE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_POLYGON_STIPPLE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_POLYGON_STIPPLE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POLYGON_STIPPLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POLYGON_STIPPLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_CONTROL {
    uint32_t default_partial;
    uint32_t fp32_nan_behavior;
    uint32_t fp32_f2i_nan_behavior;
};

static inline void
__NVC097_SET_SHADER_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_SHADER_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.default_partial < (UINT64_C(1) << 1));
    val |= st.default_partial << 0;
    
    assert(st.fp32_nan_behavior < (UINT64_C(1) << 1));
    val |= st.fp32_nan_behavior << 1;
    
    assert(st.fp32_f2i_nan_behavior < (UINT64_C(1) << 1));
    val |= st.fp32_f2i_nan_behavior << 2;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_CONTROL(val, args...) { \
    UNUSED uint32_t DEFAULT_PARTIAL_ZERO = NVC097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO; \
    UNUSED uint32_t DEFAULT_PARTIAL_INFINITY = NVC097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY; \
    UNUSED uint32_t FP32_NAN_BEHAVIOR_LEGACY = NVC097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY; \
    UNUSED uint32_t FP32_NAN_BEHAVIOR_FP64_COMPATIBLE = NVC097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE; \
    UNUSED uint32_t FP32_F2I_NAN_BEHAVIOR_PASS_ZERO = NVC097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO; \
    UNUSED uint32_t FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE = NVC097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE; \
    struct nv_nvc097_SET_SHADER_CONTROL __data = args; \
    __NVC097_SET_SHADER_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_SHADER_CONTROL V_NVC097_SET_SHADER_CONTROL

#define P_NVC097_SET_SHADER_CONTROL(push, args...) do { \
    UNUSED uint32_t DEFAULT_PARTIAL_ZERO = NVC097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO; \
    UNUSED uint32_t DEFAULT_PARTIAL_INFINITY = NVC097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY; \
    UNUSED uint32_t FP32_NAN_BEHAVIOR_LEGACY = NVC097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY; \
    UNUSED uint32_t FP32_NAN_BEHAVIOR_FP64_COMPATIBLE = NVC097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE; \
    UNUSED uint32_t FP32_F2I_NAN_BEHAVIOR_PASS_ZERO = NVC097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO; \
    UNUSED uint32_t FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE = NVC097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_CHECK_CLASS_VERSION {
    uint32_t current;
    uint32_t oldest_supported;
};

static inline void
__NVC097_CHECK_CLASS_VERSION(uint32_t *val_out, struct nv_nvc097_CHECK_CLASS_VERSION st)
{
    uint32_t val = 0;
    
    assert(st.current < (UINT64_C(1) << 16));
    val |= st.current << 0;
    
    assert(st.oldest_supported < (UINT64_C(1) << 16));
    val |= st.oldest_supported << 16;
    *val_out = val;
}

#define V_NVC097_CHECK_CLASS_VERSION(val, args...) { \
    struct nv_nvc097_CHECK_CLASS_VERSION __data = args; \
    __NVC097_CHECK_CLASS_VERSION(&val, __data); \
}

#define VA_NVC097_CHECK_CLASS_VERSION V_NVC097_CHECK_CLASS_VERSION

#define P_NVC097_CHECK_CLASS_VERSION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_CHECK_CLASS_VERSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CHECK_CLASS_VERSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPH_VERSION {
    uint32_t current;
    uint32_t oldest_supported;
};

static inline void
__NVC097_SET_SPH_VERSION(uint32_t *val_out, struct nv_nvc097_SET_SPH_VERSION st)
{
    uint32_t val = 0;
    
    assert(st.current < (UINT64_C(1) << 16));
    val |= st.current << 0;
    
    assert(st.oldest_supported < (UINT64_C(1) << 16));
    val |= st.oldest_supported << 16;
    *val_out = val;
}

#define V_NVC097_SET_SPH_VERSION(val, args...) { \
    struct nv_nvc097_SET_SPH_VERSION __data = args; \
    __NVC097_SET_SPH_VERSION(&val, __data); \
}

#define VA_NVC097_SET_SPH_VERSION V_NVC097_SET_SPH_VERSION

#define P_NVC097_SET_SPH_VERSION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPH_VERSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPH_VERSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_CHECK_SPH_VERSION {
    uint32_t current;
    uint32_t oldest_supported;
};

static inline void
__NVC097_CHECK_SPH_VERSION(uint32_t *val_out, struct nv_nvc097_CHECK_SPH_VERSION st)
{
    uint32_t val = 0;
    
    assert(st.current < (UINT64_C(1) << 16));
    val |= st.current << 0;
    
    assert(st.oldest_supported < (UINT64_C(1) << 16));
    val |= st.oldest_supported << 16;
    *val_out = val;
}

#define V_NVC097_CHECK_SPH_VERSION(val, args...) { \
    struct nv_nvc097_CHECK_SPH_VERSION __data = args; \
    __NVC097_CHECK_SPH_VERSION(&val, __data); \
}

#define VA_NVC097_CHECK_SPH_VERSION V_NVC097_CHECK_SPH_VERSION

#define P_NVC097_CHECK_SPH_VERSION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_CHECK_SPH_VERSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CHECK_SPH_VERSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ALPHA_TO_COVERAGE_OVERRIDE {
    uint32_t qualify_by_anti_alias_enable;
    uint32_t qualify_by_ps_sample_mask_output;
};

static inline void
__NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE(uint32_t *val_out, struct nv_nvc097_SET_ALPHA_TO_COVERAGE_OVERRIDE st)
{
    uint32_t val = 0;
    
    assert(st.qualify_by_anti_alias_enable < (UINT64_C(1) << 1));
    val |= st.qualify_by_anti_alias_enable << 0;
    
    assert(st.qualify_by_ps_sample_mask_output < (UINT64_C(1) << 1));
    val |= st.qualify_by_ps_sample_mask_output << 1;
    *val_out = val;
}

#define V_NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE(val, args...) { \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE; \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE; \
    UNUSED uint32_t QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE; \
    UNUSED uint32_t QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE; \
    struct nv_nvc097_SET_ALPHA_TO_COVERAGE_OVERRIDE __data = args; \
    __NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE(&val, __data); \
}

#define VA_NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE V_NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE

#define P_NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE(push, args...) do { \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE; \
    UNUSED uint32_t QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE; \
    UNUSED uint32_t QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE; \
    UNUSED uint32_t QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE = NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_POLYGON_STIPPLE_PATTERN {
    uint32_t v;
};

static inline void
__NVC097_SET_POLYGON_STIPPLE_PATTERN(uint32_t *val_out, struct nv_nvc097_SET_POLYGON_STIPPLE_PATTERN st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_POLYGON_STIPPLE_PATTERN(val, args...) { \
    struct nv_nvc097_SET_POLYGON_STIPPLE_PATTERN __data = { .v = (args) }; \
    __NVC097_SET_POLYGON_STIPPLE_PATTERN(&val, __data); \
}

#define VA_NVC097_SET_POLYGON_STIPPLE_PATTERN(i) V_NVC097_SET_POLYGON_STIPPLE_PATTERN

#define P_NVC097_SET_POLYGON_STIPPLE_PATTERN(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_POLYGON_STIPPLE_PATTERN(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_POLYGON_STIPPLE_PATTERN(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_AAM_VERSION {
    uint32_t current;
    uint32_t oldest_supported;
};

static inline void
__NVC097_SET_AAM_VERSION(uint32_t *val_out, struct nv_nvc097_SET_AAM_VERSION st)
{
    uint32_t val = 0;
    
    assert(st.current < (UINT64_C(1) << 16));
    val |= st.current << 0;
    
    assert(st.oldest_supported < (UINT64_C(1) << 16));
    val |= st.oldest_supported << 16;
    *val_out = val;
}

#define V_NVC097_SET_AAM_VERSION(val, args...) { \
    struct nv_nvc097_SET_AAM_VERSION __data = args; \
    __NVC097_SET_AAM_VERSION(&val, __data); \
}

#define VA_NVC097_SET_AAM_VERSION V_NVC097_SET_AAM_VERSION

#define P_NVC097_SET_AAM_VERSION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_AAM_VERSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_AAM_VERSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_CHECK_AAM_VERSION {
    uint32_t current;
    uint32_t oldest_supported;
};

static inline void
__NVC097_CHECK_AAM_VERSION(uint32_t *val_out, struct nv_nvc097_CHECK_AAM_VERSION st)
{
    uint32_t val = 0;
    
    assert(st.current < (UINT64_C(1) << 16));
    val |= st.current << 0;
    
    assert(st.oldest_supported < (UINT64_C(1) << 16));
    val |= st.oldest_supported << 16;
    *val_out = val;
}

#define V_NVC097_CHECK_AAM_VERSION(val, args...) { \
    struct nv_nvc097_CHECK_AAM_VERSION __data = args; \
    __NVC097_CHECK_AAM_VERSION(&val, __data); \
}

#define VA_NVC097_CHECK_AAM_VERSION V_NVC097_CHECK_AAM_VERSION

#define P_NVC097_CHECK_AAM_VERSION(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_CHECK_AAM_VERSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CHECK_AAM_VERSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZT_LAYER {
    uint32_t offset;
};

static inline void
__NVC097_SET_ZT_LAYER(uint32_t *val_out, struct nv_nvc097_SET_ZT_LAYER st)
{
    uint32_t val = 0;
    
    assert(st.offset < (UINT64_C(1) << 16));
    val |= st.offset << 0;
    *val_out = val;
}

#define V_NVC097_SET_ZT_LAYER(val, args...) { \
    struct nv_nvc097_SET_ZT_LAYER __data = { .offset = (args) }; \
    __NVC097_SET_ZT_LAYER(&val, __data); \
}

#define VA_NVC097_SET_ZT_LAYER V_NVC097_SET_ZT_LAYER

#define P_NVC097_SET_ZT_LAYER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZT_LAYER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZT_LAYER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INDEX_BUFFER_A {
    uint32_t address_upper;
};

static inline void
__NVC097_SET_INDEX_BUFFER_A(uint32_t *val_out, struct nv_nvc097_SET_INDEX_BUFFER_A st)
{
    uint32_t val = 0;
    
    assert(st.address_upper < (UINT64_C(1) << 8));
    val |= st.address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_INDEX_BUFFER_A(val, args...) { \
    struct nv_nvc097_SET_INDEX_BUFFER_A __data = { .address_upper = (args) }; \
    __NVC097_SET_INDEX_BUFFER_A(&val, __data); \
}

#define VA_NVC097_SET_INDEX_BUFFER_A V_NVC097_SET_INDEX_BUFFER_A

#define P_NVC097_SET_INDEX_BUFFER_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INDEX_BUFFER_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INDEX_BUFFER_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INDEX_BUFFER_B {
    uint32_t address_lower;
};

static inline void
__NVC097_SET_INDEX_BUFFER_B(uint32_t *val_out, struct nv_nvc097_SET_INDEX_BUFFER_B st)
{
    uint32_t val = 0;
    
    val |= st.address_lower;
    *val_out = val;
}

#define V_NVC097_SET_INDEX_BUFFER_B(val, args...) { \
    struct nv_nvc097_SET_INDEX_BUFFER_B __data = { .address_lower = (args) }; \
    __NVC097_SET_INDEX_BUFFER_B(&val, __data); \
}

#define VA_NVC097_SET_INDEX_BUFFER_B V_NVC097_SET_INDEX_BUFFER_B

#define P_NVC097_SET_INDEX_BUFFER_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INDEX_BUFFER_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INDEX_BUFFER_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INDEX_BUFFER_C {
    uint32_t limit_address_upper;
};

static inline void
__NVC097_SET_INDEX_BUFFER_C(uint32_t *val_out, struct nv_nvc097_SET_INDEX_BUFFER_C st)
{
    uint32_t val = 0;
    
    assert(st.limit_address_upper < (UINT64_C(1) << 8));
    val |= st.limit_address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_INDEX_BUFFER_C(val, args...) { \
    struct nv_nvc097_SET_INDEX_BUFFER_C __data = { .limit_address_upper = (args) }; \
    __NVC097_SET_INDEX_BUFFER_C(&val, __data); \
}

#define VA_NVC097_SET_INDEX_BUFFER_C V_NVC097_SET_INDEX_BUFFER_C

#define P_NVC097_SET_INDEX_BUFFER_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INDEX_BUFFER_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INDEX_BUFFER_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INDEX_BUFFER_D {
    uint32_t limit_address_lower;
};

static inline void
__NVC097_SET_INDEX_BUFFER_D(uint32_t *val_out, struct nv_nvc097_SET_INDEX_BUFFER_D st)
{
    uint32_t val = 0;
    
    val |= st.limit_address_lower;
    *val_out = val;
}

#define V_NVC097_SET_INDEX_BUFFER_D(val, args...) { \
    struct nv_nvc097_SET_INDEX_BUFFER_D __data = { .limit_address_lower = (args) }; \
    __NVC097_SET_INDEX_BUFFER_D(&val, __data); \
}

#define VA_NVC097_SET_INDEX_BUFFER_D V_NVC097_SET_INDEX_BUFFER_D

#define P_NVC097_SET_INDEX_BUFFER_D(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INDEX_BUFFER_D(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INDEX_BUFFER_D, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INDEX_BUFFER_E {
    uint32_t index_size;
};

static inline void
__NVC097_SET_INDEX_BUFFER_E(uint32_t *val_out, struct nv_nvc097_SET_INDEX_BUFFER_E st)
{
    uint32_t val = 0;
    
    assert(st.index_size < (UINT64_C(1) << 2));
    val |= st.index_size << 0;
    *val_out = val;
}

#define V_NVC097_SET_INDEX_BUFFER_E(val, args...) { \
    UNUSED uint32_t INDEX_SIZE_ONE_BYTE = NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE; \
    UNUSED uint32_t INDEX_SIZE_TWO_BYTES = NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES; \
    UNUSED uint32_t INDEX_SIZE_FOUR_BYTES = NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES; \
    struct nv_nvc097_SET_INDEX_BUFFER_E __data = { .index_size = (args) }; \
    __NVC097_SET_INDEX_BUFFER_E(&val, __data); \
}

#define VA_NVC097_SET_INDEX_BUFFER_E V_NVC097_SET_INDEX_BUFFER_E

#define P_NVC097_SET_INDEX_BUFFER_E(push, args...) do { \
    UNUSED uint32_t INDEX_SIZE_ONE_BYTE = NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE; \
    UNUSED uint32_t INDEX_SIZE_TWO_BYTES = NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES; \
    UNUSED uint32_t INDEX_SIZE_FOUR_BYTES = NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INDEX_BUFFER_E(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INDEX_BUFFER_E, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_INDEX_BUFFER_F {
    uint32_t first;
};

static inline void
__NVC097_SET_INDEX_BUFFER_F(uint32_t *val_out, struct nv_nvc097_SET_INDEX_BUFFER_F st)
{
    uint32_t val = 0;
    
    val |= st.first;
    *val_out = val;
}

#define V_NVC097_SET_INDEX_BUFFER_F(val, args...) { \
    struct nv_nvc097_SET_INDEX_BUFFER_F __data = { .first = (args) }; \
    __NVC097_SET_INDEX_BUFFER_F(&val, __data); \
}

#define VA_NVC097_SET_INDEX_BUFFER_F V_NVC097_SET_INDEX_BUFFER_F

#define P_NVC097_SET_INDEX_BUFFER_F(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_INDEX_BUFFER_F(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_INDEX_BUFFER_F, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INDEX_BUFFER {
    uint32_t count;
};

static inline void
__NVC097_DRAW_INDEX_BUFFER(uint32_t *val_out, struct nv_nvc097_DRAW_INDEX_BUFFER st)
{
    uint32_t val = 0;
    
    val |= st.count;
    *val_out = val;
}

#define V_NVC097_DRAW_INDEX_BUFFER(val, args...) { \
    struct nv_nvc097_DRAW_INDEX_BUFFER __data = { .count = (args) }; \
    __NVC097_DRAW_INDEX_BUFFER(&val, __data); \
}

#define VA_NVC097_DRAW_INDEX_BUFFER V_NVC097_DRAW_INDEX_BUFFER

#define P_NVC097_DRAW_INDEX_BUFFER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INDEX_BUFFER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INDEX_BUFFER, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST {
    uint32_t first;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST(uint32_t *val_out, struct nv_nvc097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST st)
{
    uint32_t val = 0;
    
    assert(st.first < (UINT64_C(1) << 16));
    val |= st.first << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST __data = args; \
    __NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST(&val, __data); \
}

#define VA_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST V_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST

#define P_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST {
    uint32_t first;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST(uint32_t *val_out, struct nv_nvc097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST st)
{
    uint32_t val = 0;
    
    assert(st.first < (UINT64_C(1) << 16));
    val |= st.first << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST __data = args; \
    __NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST(&val, __data); \
}

#define VA_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST V_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST

#define P_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST {
    uint32_t first;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST(uint32_t *val_out, struct nv_nvc097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST st)
{
    uint32_t val = 0;
    
    assert(st.first < (UINT64_C(1) << 16));
    val |= st.first << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST __data = args; \
    __NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST(&val, __data); \
}

#define VA_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST V_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST

#define P_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT {
    uint32_t first;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT(uint32_t *val_out, struct nv_nvc097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT st)
{
    uint32_t val = 0;
    
    assert(st.first < (UINT64_C(1) << 16));
    val |= st.first << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT __data = args; \
    __NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT(&val, __data); \
}

#define VA_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT V_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT

#define P_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT {
    uint32_t first;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT(uint32_t *val_out, struct nv_nvc097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT st)
{
    uint32_t val = 0;
    
    assert(st.first < (UINT64_C(1) << 16));
    val |= st.first << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT __data = args; \
    __NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT(&val, __data); \
}

#define VA_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT V_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT

#define P_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT, nvk_p_ret); \
} while(0)

struct nv_nvc097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT {
    uint32_t first;
    uint32_t count;
    uint32_t topology;
};

static inline void
__NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT(uint32_t *val_out, struct nv_nvc097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT st)
{
    uint32_t val = 0;
    
    assert(st.first < (UINT64_C(1) << 16));
    val |= st.first << 0;
    
    assert(st.count < (UINT64_C(1) << 12));
    val |= st.count << 16;
    
    assert(st.topology < (UINT64_C(1) << 4));
    val |= st.topology << 28;
    *val_out = val;
}

#define V_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT(val, args...) { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    struct nv_nvc097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT __data = args; \
    __NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT(&val, __data); \
}

#define VA_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT V_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT

#define P_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT(push, args...) do { \
    UNUSED uint32_t TOPOLOGY_POINTS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS; \
    UNUSED uint32_t TOPOLOGY_LINES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES; \
    UNUSED uint32_t TOPOLOGY_LINE_LOOP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP; \
    UNUSED uint32_t TOPOLOGY_LINE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLES = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP; \
    UNUSED uint32_t TOPOLOGY_TRIANGLE_FAN = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN; \
    UNUSED uint32_t TOPOLOGY_QUADS = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS; \
    UNUSED uint32_t TOPOLOGY_QUAD_STRIP = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP; \
    UNUSED uint32_t TOPOLOGY_POLYGON = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON; \
    UNUSED uint32_t TOPOLOGY_LINELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_LINESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLELIST_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t TOPOLOGY_TRIANGLESTRIP_ADJCY = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t TOPOLOGY_PATCH = NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH; \
    uint32_t nvk_p_ret; \
    V_NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_BIAS_CLAMP {
    uint32_t v;
};

static inline void
__NVC097_SET_DEPTH_BIAS_CLAMP(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_BIAS_CLAMP st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_BIAS_CLAMP(val, args...) { \
    struct nv_nvc097_SET_DEPTH_BIAS_CLAMP __data = { .v = (args) }; \
    __NVC097_SET_DEPTH_BIAS_CLAMP(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_BIAS_CLAMP V_NVC097_SET_DEPTH_BIAS_CLAMP

#define P_NVC097_SET_DEPTH_BIAS_CLAMP(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_BIAS_CLAMP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_BIAS_CLAMP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_INSTANCE_A {
    uint32_t is_instanced;
};

static inline void
__NVC097_SET_VERTEX_STREAM_INSTANCE_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_INSTANCE_A st)
{
    uint32_t val = 0;
    
    assert(st.is_instanced < (UINT64_C(1) << 1));
    val |= st.is_instanced << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_INSTANCE_A(val, args...) { \
    UNUSED uint32_t IS_INSTANCED_FALSE = NVC097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE; \
    UNUSED uint32_t IS_INSTANCED_TRUE = NVC097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE; \
    struct nv_nvc097_SET_VERTEX_STREAM_INSTANCE_A __data = { .is_instanced = (args) }; \
    __NVC097_SET_VERTEX_STREAM_INSTANCE_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_INSTANCE_A(i) V_NVC097_SET_VERTEX_STREAM_INSTANCE_A

#define P_NVC097_SET_VERTEX_STREAM_INSTANCE_A(push, idx, args...) do { \
    UNUSED uint32_t IS_INSTANCED_FALSE = NVC097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE; \
    UNUSED uint32_t IS_INSTANCED_TRUE = NVC097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_INSTANCE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_INSTANCE_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_INSTANCE_B {
    uint32_t is_instanced;
};

static inline void
__NVC097_SET_VERTEX_STREAM_INSTANCE_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_INSTANCE_B st)
{
    uint32_t val = 0;
    
    assert(st.is_instanced < (UINT64_C(1) << 1));
    val |= st.is_instanced << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_INSTANCE_B(val, args...) { \
    UNUSED uint32_t IS_INSTANCED_FALSE = NVC097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE; \
    UNUSED uint32_t IS_INSTANCED_TRUE = NVC097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE; \
    struct nv_nvc097_SET_VERTEX_STREAM_INSTANCE_B __data = { .is_instanced = (args) }; \
    __NVC097_SET_VERTEX_STREAM_INSTANCE_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_INSTANCE_B(i) V_NVC097_SET_VERTEX_STREAM_INSTANCE_B

#define P_NVC097_SET_VERTEX_STREAM_INSTANCE_B(push, idx, args...) do { \
    UNUSED uint32_t IS_INSTANCED_FALSE = NVC097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE; \
    UNUSED uint32_t IS_INSTANCED_TRUE = NVC097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_INSTANCE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_INSTANCE_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ATTRIBUTE_POINT_SIZE {
    uint32_t enable;
    uint32_t slot;
};

static inline void
__NVC097_SET_ATTRIBUTE_POINT_SIZE(uint32_t *val_out, struct nv_nvc097_SET_ATTRIBUTE_POINT_SIZE st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.slot < (UINT64_C(1) << 8));
    val |= st.slot << 4;
    *val_out = val;
}

#define V_NVC097_SET_ATTRIBUTE_POINT_SIZE(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE; \
    struct nv_nvc097_SET_ATTRIBUTE_POINT_SIZE __data = args; \
    __NVC097_SET_ATTRIBUTE_POINT_SIZE(&val, __data); \
}

#define VA_NVC097_SET_ATTRIBUTE_POINT_SIZE V_NVC097_SET_ATTRIBUTE_POINT_SIZE

#define P_NVC097_SET_ATTRIBUTE_POINT_SIZE(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ATTRIBUTE_POINT_SIZE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ATTRIBUTE_POINT_SIZE, nvk_p_ret); \
} while(0)

struct nv_nvc097_OGL_SET_CULL {
    uint32_t enable;
};

static inline void
__NVC097_OGL_SET_CULL(uint32_t *val_out, struct nv_nvc097_OGL_SET_CULL st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_OGL_SET_CULL(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_OGL_SET_CULL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_OGL_SET_CULL_ENABLE_TRUE; \
    struct nv_nvc097_OGL_SET_CULL __data = { .enable = (args) }; \
    __NVC097_OGL_SET_CULL(&val, __data); \
}

#define VA_NVC097_OGL_SET_CULL V_NVC097_OGL_SET_CULL

#define P_NVC097_OGL_SET_CULL(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_OGL_SET_CULL_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_OGL_SET_CULL_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_OGL_SET_CULL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_OGL_SET_CULL, nvk_p_ret); \
} while(0)

struct nv_nvc097_OGL_SET_FRONT_FACE {
    uint32_t v;
};

static inline void
__NVC097_OGL_SET_FRONT_FACE(uint32_t *val_out, struct nv_nvc097_OGL_SET_FRONT_FACE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_OGL_SET_FRONT_FACE(val, args...) { \
    UNUSED uint32_t V_CW = NVC097_OGL_SET_FRONT_FACE_V_CW; \
    UNUSED uint32_t V_CCW = NVC097_OGL_SET_FRONT_FACE_V_CCW; \
    struct nv_nvc097_OGL_SET_FRONT_FACE __data = { .v = (args) }; \
    __NVC097_OGL_SET_FRONT_FACE(&val, __data); \
}

#define VA_NVC097_OGL_SET_FRONT_FACE V_NVC097_OGL_SET_FRONT_FACE

#define P_NVC097_OGL_SET_FRONT_FACE(push, args...) do { \
    UNUSED uint32_t V_CW = NVC097_OGL_SET_FRONT_FACE_V_CW; \
    UNUSED uint32_t V_CCW = NVC097_OGL_SET_FRONT_FACE_V_CCW; \
    uint32_t nvk_p_ret; \
    V_NVC097_OGL_SET_FRONT_FACE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_OGL_SET_FRONT_FACE, nvk_p_ret); \
} while(0)

struct nv_nvc097_OGL_SET_CULL_FACE {
    uint32_t v;
};

static inline void
__NVC097_OGL_SET_CULL_FACE(uint32_t *val_out, struct nv_nvc097_OGL_SET_CULL_FACE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_OGL_SET_CULL_FACE(val, args...) { \
    UNUSED uint32_t V_FRONT = NVC097_OGL_SET_CULL_FACE_V_FRONT; \
    UNUSED uint32_t V_BACK = NVC097_OGL_SET_CULL_FACE_V_BACK; \
    UNUSED uint32_t V_FRONT_AND_BACK = NVC097_OGL_SET_CULL_FACE_V_FRONT_AND_BACK; \
    struct nv_nvc097_OGL_SET_CULL_FACE __data = { .v = (args) }; \
    __NVC097_OGL_SET_CULL_FACE(&val, __data); \
}

#define VA_NVC097_OGL_SET_CULL_FACE V_NVC097_OGL_SET_CULL_FACE

#define P_NVC097_OGL_SET_CULL_FACE(push, args...) do { \
    UNUSED uint32_t V_FRONT = NVC097_OGL_SET_CULL_FACE_V_FRONT; \
    UNUSED uint32_t V_BACK = NVC097_OGL_SET_CULL_FACE_V_BACK; \
    UNUSED uint32_t V_FRONT_AND_BACK = NVC097_OGL_SET_CULL_FACE_V_FRONT_AND_BACK; \
    uint32_t nvk_p_ret; \
    V_NVC097_OGL_SET_CULL_FACE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_OGL_SET_CULL_FACE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_PIXEL {
    uint32_t center;
};

static inline void
__NVC097_SET_VIEWPORT_PIXEL(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_PIXEL st)
{
    uint32_t val = 0;
    
    assert(st.center < (UINT64_C(1) << 1));
    val |= st.center << 0;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_PIXEL(val, args...) { \
    UNUSED uint32_t CENTER_AT_HALF_INTEGERS = NVC097_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS; \
    UNUSED uint32_t CENTER_AT_INTEGERS = NVC097_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS; \
    struct nv_nvc097_SET_VIEWPORT_PIXEL __data = { .center = (args) }; \
    __NVC097_SET_VIEWPORT_PIXEL(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_PIXEL V_NVC097_SET_VIEWPORT_PIXEL

#define P_NVC097_SET_VIEWPORT_PIXEL(push, args...) do { \
    UNUSED uint32_t CENTER_AT_HALF_INTEGERS = NVC097_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS; \
    UNUSED uint32_t CENTER_AT_INTEGERS = NVC097_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_PIXEL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_PIXEL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_SCALE_OFFSET {
    uint32_t enable;
};

static inline void
__NVC097_SET_VIEWPORT_SCALE_OFFSET(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_SCALE_OFFSET st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_SCALE_OFFSET(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE; \
    struct nv_nvc097_SET_VIEWPORT_SCALE_OFFSET __data = { .enable = (args) }; \
    __NVC097_SET_VIEWPORT_SCALE_OFFSET(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_SCALE_OFFSET V_NVC097_SET_VIEWPORT_SCALE_OFFSET

#define P_NVC097_SET_VIEWPORT_SCALE_OFFSET(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_SCALE_OFFSET(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_SCALE_OFFSET, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VIEWPORT_CLIP_CONTROL {
    uint32_t min_z_zero_max_z_one;
    uint32_t pixel_min_z;
    uint32_t pixel_max_z;
    uint32_t geometry_guardband;
    uint32_t line_point_cull_guardband;
    uint32_t geometry_clip;
    uint32_t geometry_guardband_z;
};

static inline void
__NVC097_SET_VIEWPORT_CLIP_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_VIEWPORT_CLIP_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.min_z_zero_max_z_one < (UINT64_C(1) << 1));
    val |= st.min_z_zero_max_z_one << 0;
    
    assert(st.pixel_min_z < (UINT64_C(1) << 1));
    val |= st.pixel_min_z << 3;
    
    assert(st.pixel_max_z < (UINT64_C(1) << 1));
    val |= st.pixel_max_z << 4;
    
    assert(st.geometry_guardband < (UINT64_C(1) << 1));
    val |= st.geometry_guardband << 7;
    
    assert(st.line_point_cull_guardband < (UINT64_C(1) << 1));
    val |= st.line_point_cull_guardband << 10;
    
    assert(st.geometry_clip < (UINT64_C(1) << 3));
    val |= st.geometry_clip << 11;
    
    assert(st.geometry_guardband_z < (UINT64_C(1) << 2));
    val |= st.geometry_guardband_z << 1;
    *val_out = val;
}

#define V_NVC097_SET_VIEWPORT_CLIP_CONTROL(val, args...) { \
    UNUSED uint32_t MIN_Z_ZERO_MAX_Z_ONE_FALSE = NVC097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE; \
    UNUSED uint32_t MIN_Z_ZERO_MAX_Z_ONE_TRUE = NVC097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE; \
    UNUSED uint32_t PIXEL_MIN_Z_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP; \
    UNUSED uint32_t PIXEL_MIN_Z_CLAMP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP; \
    UNUSED uint32_t PIXEL_MAX_Z_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP; \
    UNUSED uint32_t PIXEL_MAX_Z_CLAMP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_SCALE_256 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_SCALE_1 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1; \
    UNUSED uint32_t LINE_POINT_CULL_GUARDBAND_SCALE_256 = NVC097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256; \
    UNUSED uint32_t LINE_POINT_CULL_GUARDBAND_SCALE_1 = NVC097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1; \
    UNUSED uint32_t GEOMETRY_CLIP_WZERO_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_PASSTHRU = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU; \
    UNUSED uint32_t GEOMETRY_CLIP_FRUSTUM_XY_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL; \
    UNUSED uint32_t GEOMETRY_CLIP_FRUSTUM_Z_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_Z_SCALE_256 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_Z_SCALE_1 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1; \
    struct nv_nvc097_SET_VIEWPORT_CLIP_CONTROL __data = args; \
    __NVC097_SET_VIEWPORT_CLIP_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_VIEWPORT_CLIP_CONTROL V_NVC097_SET_VIEWPORT_CLIP_CONTROL

#define P_NVC097_SET_VIEWPORT_CLIP_CONTROL(push, args...) do { \
    UNUSED uint32_t MIN_Z_ZERO_MAX_Z_ONE_FALSE = NVC097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE; \
    UNUSED uint32_t MIN_Z_ZERO_MAX_Z_ONE_TRUE = NVC097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE; \
    UNUSED uint32_t PIXEL_MIN_Z_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP; \
    UNUSED uint32_t PIXEL_MIN_Z_CLAMP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP; \
    UNUSED uint32_t PIXEL_MAX_Z_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP; \
    UNUSED uint32_t PIXEL_MAX_Z_CLAMP = NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_SCALE_256 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_SCALE_1 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1; \
    UNUSED uint32_t LINE_POINT_CULL_GUARDBAND_SCALE_256 = NVC097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256; \
    UNUSED uint32_t LINE_POINT_CULL_GUARDBAND_SCALE_1 = NVC097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1; \
    UNUSED uint32_t GEOMETRY_CLIP_WZERO_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_PASSTHRU = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU; \
    UNUSED uint32_t GEOMETRY_CLIP_FRUSTUM_XY_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL; \
    UNUSED uint32_t GEOMETRY_CLIP_FRUSTUM_Z_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP; \
    UNUSED uint32_t GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_Z_SCALE_256 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256; \
    UNUSED uint32_t GEOMETRY_GUARDBAND_Z_SCALE_1 = NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VIEWPORT_CLIP_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VIEWPORT_CLIP_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_USER_CLIP_OP {
    uint32_t plane0;
    uint32_t plane1;
    uint32_t plane2;
    uint32_t plane3;
    uint32_t plane4;
    uint32_t plane5;
    uint32_t plane6;
    uint32_t plane7;
};

static inline void
__NVC097_SET_USER_CLIP_OP(uint32_t *val_out, struct nv_nvc097_SET_USER_CLIP_OP st)
{
    uint32_t val = 0;
    
    assert(st.plane0 < (UINT64_C(1) << 1));
    val |= st.plane0 << 0;
    
    assert(st.plane1 < (UINT64_C(1) << 1));
    val |= st.plane1 << 4;
    
    assert(st.plane2 < (UINT64_C(1) << 1));
    val |= st.plane2 << 8;
    
    assert(st.plane3 < (UINT64_C(1) << 1));
    val |= st.plane3 << 12;
    
    assert(st.plane4 < (UINT64_C(1) << 1));
    val |= st.plane4 << 16;
    
    assert(st.plane5 < (UINT64_C(1) << 1));
    val |= st.plane5 << 20;
    
    assert(st.plane6 < (UINT64_C(1) << 1));
    val |= st.plane6 << 24;
    
    assert(st.plane7 < (UINT64_C(1) << 1));
    val |= st.plane7 << 28;
    *val_out = val;
}

#define V_NVC097_SET_USER_CLIP_OP(val, args...) { \
    UNUSED uint32_t PLANE0_CLIP = NVC097_SET_USER_CLIP_OP_PLANE0_CLIP; \
    UNUSED uint32_t PLANE0_CULL = NVC097_SET_USER_CLIP_OP_PLANE0_CULL; \
    UNUSED uint32_t PLANE1_CLIP = NVC097_SET_USER_CLIP_OP_PLANE1_CLIP; \
    UNUSED uint32_t PLANE1_CULL = NVC097_SET_USER_CLIP_OP_PLANE1_CULL; \
    UNUSED uint32_t PLANE2_CLIP = NVC097_SET_USER_CLIP_OP_PLANE2_CLIP; \
    UNUSED uint32_t PLANE2_CULL = NVC097_SET_USER_CLIP_OP_PLANE2_CULL; \
    UNUSED uint32_t PLANE3_CLIP = NVC097_SET_USER_CLIP_OP_PLANE3_CLIP; \
    UNUSED uint32_t PLANE3_CULL = NVC097_SET_USER_CLIP_OP_PLANE3_CULL; \
    UNUSED uint32_t PLANE4_CLIP = NVC097_SET_USER_CLIP_OP_PLANE4_CLIP; \
    UNUSED uint32_t PLANE4_CULL = NVC097_SET_USER_CLIP_OP_PLANE4_CULL; \
    UNUSED uint32_t PLANE5_CLIP = NVC097_SET_USER_CLIP_OP_PLANE5_CLIP; \
    UNUSED uint32_t PLANE5_CULL = NVC097_SET_USER_CLIP_OP_PLANE5_CULL; \
    UNUSED uint32_t PLANE6_CLIP = NVC097_SET_USER_CLIP_OP_PLANE6_CLIP; \
    UNUSED uint32_t PLANE6_CULL = NVC097_SET_USER_CLIP_OP_PLANE6_CULL; \
    UNUSED uint32_t PLANE7_CLIP = NVC097_SET_USER_CLIP_OP_PLANE7_CLIP; \
    UNUSED uint32_t PLANE7_CULL = NVC097_SET_USER_CLIP_OP_PLANE7_CULL; \
    struct nv_nvc097_SET_USER_CLIP_OP __data = args; \
    __NVC097_SET_USER_CLIP_OP(&val, __data); \
}

#define VA_NVC097_SET_USER_CLIP_OP V_NVC097_SET_USER_CLIP_OP

#define P_NVC097_SET_USER_CLIP_OP(push, args...) do { \
    UNUSED uint32_t PLANE0_CLIP = NVC097_SET_USER_CLIP_OP_PLANE0_CLIP; \
    UNUSED uint32_t PLANE0_CULL = NVC097_SET_USER_CLIP_OP_PLANE0_CULL; \
    UNUSED uint32_t PLANE1_CLIP = NVC097_SET_USER_CLIP_OP_PLANE1_CLIP; \
    UNUSED uint32_t PLANE1_CULL = NVC097_SET_USER_CLIP_OP_PLANE1_CULL; \
    UNUSED uint32_t PLANE2_CLIP = NVC097_SET_USER_CLIP_OP_PLANE2_CLIP; \
    UNUSED uint32_t PLANE2_CULL = NVC097_SET_USER_CLIP_OP_PLANE2_CULL; \
    UNUSED uint32_t PLANE3_CLIP = NVC097_SET_USER_CLIP_OP_PLANE3_CLIP; \
    UNUSED uint32_t PLANE3_CULL = NVC097_SET_USER_CLIP_OP_PLANE3_CULL; \
    UNUSED uint32_t PLANE4_CLIP = NVC097_SET_USER_CLIP_OP_PLANE4_CLIP; \
    UNUSED uint32_t PLANE4_CULL = NVC097_SET_USER_CLIP_OP_PLANE4_CULL; \
    UNUSED uint32_t PLANE5_CLIP = NVC097_SET_USER_CLIP_OP_PLANE5_CLIP; \
    UNUSED uint32_t PLANE5_CULL = NVC097_SET_USER_CLIP_OP_PLANE5_CULL; \
    UNUSED uint32_t PLANE6_CLIP = NVC097_SET_USER_CLIP_OP_PLANE6_CLIP; \
    UNUSED uint32_t PLANE6_CULL = NVC097_SET_USER_CLIP_OP_PLANE6_CULL; \
    UNUSED uint32_t PLANE7_CLIP = NVC097_SET_USER_CLIP_OP_PLANE7_CLIP; \
    UNUSED uint32_t PLANE7_CULL = NVC097_SET_USER_CLIP_OP_PLANE7_CULL; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_USER_CLIP_OP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_USER_CLIP_OP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_RENDER_ENABLE_OVERRIDE {
    uint32_t mode;
};

static inline void
__NVC097_SET_RENDER_ENABLE_OVERRIDE(uint32_t *val_out, struct nv_nvc097_SET_RENDER_ENABLE_OVERRIDE st)
{
    uint32_t val = 0;
    
    assert(st.mode < (UINT64_C(1) << 2));
    val |= st.mode << 0;
    *val_out = val;
}

#define V_NVC097_SET_RENDER_ENABLE_OVERRIDE(val, args...) { \
    UNUSED uint32_t MODE_USE_RENDER_ENABLE = NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE; \
    UNUSED uint32_t MODE_ALWAYS_RENDER = NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER; \
    UNUSED uint32_t MODE_NEVER_RENDER = NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER; \
    struct nv_nvc097_SET_RENDER_ENABLE_OVERRIDE __data = { .mode = (args) }; \
    __NVC097_SET_RENDER_ENABLE_OVERRIDE(&val, __data); \
}

#define VA_NVC097_SET_RENDER_ENABLE_OVERRIDE V_NVC097_SET_RENDER_ENABLE_OVERRIDE

#define P_NVC097_SET_RENDER_ENABLE_OVERRIDE(push, args...) do { \
    UNUSED uint32_t MODE_USE_RENDER_ENABLE = NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE; \
    UNUSED uint32_t MODE_ALWAYS_RENDER = NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER; \
    UNUSED uint32_t MODE_NEVER_RENDER = NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_RENDER_ENABLE_OVERRIDE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_RENDER_ENABLE_OVERRIDE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PRIMITIVE_TOPOLOGY_CONTROL {
    uint32_t override;
};

static inline void
__NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_PRIMITIVE_TOPOLOGY_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.override < (UINT64_C(1) << 1));
    val |= st.override << 0;
    *val_out = val;
}

#define V_NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL(val, args...) { \
    UNUSED uint32_t OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS = NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS; \
    UNUSED uint32_t OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE = NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE; \
    struct nv_nvc097_SET_PRIMITIVE_TOPOLOGY_CONTROL __data = { .override = (args) }; \
    __NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL V_NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL

#define P_NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL(push, args...) do { \
    UNUSED uint32_t OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS = NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS; \
    UNUSED uint32_t OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE = NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_WINDOW_CLIP_ENABLE {
    uint32_t v;
};

static inline void
__NVC097_SET_WINDOW_CLIP_ENABLE(uint32_t *val_out, struct nv_nvc097_SET_WINDOW_CLIP_ENABLE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_WINDOW_CLIP_ENABLE(val, args...) { \
    UNUSED uint32_t V_FALSE = NVC097_SET_WINDOW_CLIP_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_WINDOW_CLIP_ENABLE_V_TRUE; \
    struct nv_nvc097_SET_WINDOW_CLIP_ENABLE __data = { .v = (args) }; \
    __NVC097_SET_WINDOW_CLIP_ENABLE(&val, __data); \
}

#define VA_NVC097_SET_WINDOW_CLIP_ENABLE V_NVC097_SET_WINDOW_CLIP_ENABLE

#define P_NVC097_SET_WINDOW_CLIP_ENABLE(push, args...) do { \
    UNUSED uint32_t V_FALSE = NVC097_SET_WINDOW_CLIP_ENABLE_V_FALSE; \
    UNUSED uint32_t V_TRUE = NVC097_SET_WINDOW_CLIP_ENABLE_V_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_WINDOW_CLIP_ENABLE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_WINDOW_CLIP_ENABLE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_WINDOW_CLIP_TYPE {
    uint32_t v;
};

static inline void
__NVC097_SET_WINDOW_CLIP_TYPE(uint32_t *val_out, struct nv_nvc097_SET_WINDOW_CLIP_TYPE st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 2));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_WINDOW_CLIP_TYPE(val, args...) { \
    UNUSED uint32_t V_INCLUSIVE = NVC097_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE; \
    UNUSED uint32_t V_EXCLUSIVE = NVC097_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE; \
    UNUSED uint32_t V_CLIPALL = NVC097_SET_WINDOW_CLIP_TYPE_V_CLIPALL; \
    struct nv_nvc097_SET_WINDOW_CLIP_TYPE __data = { .v = (args) }; \
    __NVC097_SET_WINDOW_CLIP_TYPE(&val, __data); \
}

#define VA_NVC097_SET_WINDOW_CLIP_TYPE V_NVC097_SET_WINDOW_CLIP_TYPE

#define P_NVC097_SET_WINDOW_CLIP_TYPE(push, args...) do { \
    UNUSED uint32_t V_INCLUSIVE = NVC097_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE; \
    UNUSED uint32_t V_EXCLUSIVE = NVC097_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE; \
    UNUSED uint32_t V_CLIPALL = NVC097_SET_WINDOW_CLIP_TYPE_V_CLIPALL; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_WINDOW_CLIP_TYPE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_WINDOW_CLIP_TYPE, nvk_p_ret); \
} while(0)

struct nv_nvc097_INVALIDATE_ZCULL {
    uint32_t v;
};

static inline void
__NVC097_INVALIDATE_ZCULL(uint32_t *val_out, struct nv_nvc097_INVALIDATE_ZCULL st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_INVALIDATE_ZCULL(val, args...) { \
    UNUSED uint32_t V_INVALIDATE = NVC097_INVALIDATE_ZCULL_V_INVALIDATE; \
    struct nv_nvc097_INVALIDATE_ZCULL __data = { .v = (args) }; \
    __NVC097_INVALIDATE_ZCULL(&val, __data); \
}

#define VA_NVC097_INVALIDATE_ZCULL V_NVC097_INVALIDATE_ZCULL

#define P_NVC097_INVALIDATE_ZCULL(push, args...) do { \
    UNUSED uint32_t V_INVALIDATE = NVC097_INVALIDATE_ZCULL_V_INVALIDATE; \
    uint32_t nvk_p_ret; \
    V_NVC097_INVALIDATE_ZCULL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_INVALIDATE_ZCULL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL {
    uint32_t z_enable;
    uint32_t stencil_enable;
};

static inline void
__NVC097_SET_ZCULL(uint32_t *val_out, struct nv_nvc097_SET_ZCULL st)
{
    uint32_t val = 0;
    
    assert(st.z_enable < (UINT64_C(1) << 1));
    val |= st.z_enable << 0;
    
    assert(st.stencil_enable < (UINT64_C(1) << 1));
    val |= st.stencil_enable << 4;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL(val, args...) { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_SET_ZCULL_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_SET_ZCULL_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_SET_ZCULL_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_SET_ZCULL_STENCIL_ENABLE_TRUE; \
    struct nv_nvc097_SET_ZCULL __data = args; \
    __NVC097_SET_ZCULL(&val, __data); \
}

#define VA_NVC097_SET_ZCULL V_NVC097_SET_ZCULL

#define P_NVC097_SET_ZCULL(push, args...) do { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_SET_ZCULL_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_SET_ZCULL_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_SET_ZCULL_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_SET_ZCULL_STENCIL_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_ZCULL_BOUNDS {
    uint32_t z_min_unbounded_enable;
    uint32_t z_max_unbounded_enable;
};

static inline void
__NVC097_SET_ZCULL_BOUNDS(uint32_t *val_out, struct nv_nvc097_SET_ZCULL_BOUNDS st)
{
    uint32_t val = 0;
    
    assert(st.z_min_unbounded_enable < (UINT64_C(1) << 1));
    val |= st.z_min_unbounded_enable << 0;
    
    assert(st.z_max_unbounded_enable < (UINT64_C(1) << 1));
    val |= st.z_max_unbounded_enable << 4;
    *val_out = val;
}

#define V_NVC097_SET_ZCULL_BOUNDS(val, args...) { \
    UNUSED uint32_t Z_MIN_UNBOUNDED_ENABLE_FALSE = NVC097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE; \
    UNUSED uint32_t Z_MIN_UNBOUNDED_ENABLE_TRUE = NVC097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE; \
    UNUSED uint32_t Z_MAX_UNBOUNDED_ENABLE_FALSE = NVC097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE; \
    UNUSED uint32_t Z_MAX_UNBOUNDED_ENABLE_TRUE = NVC097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE; \
    struct nv_nvc097_SET_ZCULL_BOUNDS __data = args; \
    __NVC097_SET_ZCULL_BOUNDS(&val, __data); \
}

#define VA_NVC097_SET_ZCULL_BOUNDS V_NVC097_SET_ZCULL_BOUNDS

#define P_NVC097_SET_ZCULL_BOUNDS(push, args...) do { \
    UNUSED uint32_t Z_MIN_UNBOUNDED_ENABLE_FALSE = NVC097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE; \
    UNUSED uint32_t Z_MIN_UNBOUNDED_ENABLE_TRUE = NVC097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE; \
    UNUSED uint32_t Z_MAX_UNBOUNDED_ENABLE_FALSE = NVC097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE; \
    UNUSED uint32_t Z_MAX_UNBOUNDED_ENABLE_TRUE = NVC097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_ZCULL_BOUNDS(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_ZCULL_BOUNDS, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PRIMITIVE_TOPOLOGY {
    uint32_t v;
};

static inline void
__NVC097_SET_PRIMITIVE_TOPOLOGY(uint32_t *val_out, struct nv_nvc097_SET_PRIMITIVE_TOPOLOGY st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PRIMITIVE_TOPOLOGY(val, args...) { \
    UNUSED uint32_t V_POINTLIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST; \
    UNUSED uint32_t V_LINELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST; \
    UNUSED uint32_t V_LINESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP; \
    UNUSED uint32_t V_TRIANGLELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST; \
    UNUSED uint32_t V_TRIANGLESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP; \
    UNUSED uint32_t V_LINELIST_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY; \
    UNUSED uint32_t V_LINESTRIP_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY; \
    UNUSED uint32_t V_TRIANGLELIST_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t V_TRIANGLESTRIP_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t V_PATCHLIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST; \
    UNUSED uint32_t V_LEGACY_POINTS = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS; \
    UNUSED uint32_t V_LEGACY_INDEXEDLINELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST; \
    UNUSED uint32_t V_LEGACY_LINELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST; \
    UNUSED uint32_t V_LEGACY_LINESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP; \
    UNUSED uint32_t V_LEGACY_INDEXEDLINESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP; \
    UNUSED uint32_t V_LEGACY_TRIANGLELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST; \
    UNUSED uint32_t V_LEGACY_TRIANGLESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP; \
    UNUSED uint32_t V_LEGACY_TRIANGLEFAN = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLEFAN = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN; \
    UNUSED uint32_t V_LEGACY_TRIANGLEFAN_IMM = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM; \
    UNUSED uint32_t V_LEGACY_LINELIST_IMM = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLELIST2 = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2; \
    UNUSED uint32_t V_LEGACY_INDEXEDLINELIST2 = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2; \
    struct nv_nvc097_SET_PRIMITIVE_TOPOLOGY __data = { .v = (args) }; \
    __NVC097_SET_PRIMITIVE_TOPOLOGY(&val, __data); \
}

#define VA_NVC097_SET_PRIMITIVE_TOPOLOGY V_NVC097_SET_PRIMITIVE_TOPOLOGY

#define P_NVC097_SET_PRIMITIVE_TOPOLOGY(push, args...) do { \
    UNUSED uint32_t V_POINTLIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST; \
    UNUSED uint32_t V_LINELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST; \
    UNUSED uint32_t V_LINESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP; \
    UNUSED uint32_t V_TRIANGLELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST; \
    UNUSED uint32_t V_TRIANGLESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP; \
    UNUSED uint32_t V_LINELIST_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY; \
    UNUSED uint32_t V_LINESTRIP_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY; \
    UNUSED uint32_t V_TRIANGLELIST_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY; \
    UNUSED uint32_t V_TRIANGLESTRIP_ADJCY = NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY; \
    UNUSED uint32_t V_PATCHLIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST; \
    UNUSED uint32_t V_LEGACY_POINTS = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS; \
    UNUSED uint32_t V_LEGACY_INDEXEDLINELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST; \
    UNUSED uint32_t V_LEGACY_LINELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST; \
    UNUSED uint32_t V_LEGACY_LINESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP; \
    UNUSED uint32_t V_LEGACY_INDEXEDLINESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP; \
    UNUSED uint32_t V_LEGACY_TRIANGLELIST = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST; \
    UNUSED uint32_t V_LEGACY_TRIANGLESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLESTRIP = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP; \
    UNUSED uint32_t V_LEGACY_TRIANGLEFAN = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLEFAN = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN; \
    UNUSED uint32_t V_LEGACY_TRIANGLEFAN_IMM = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM; \
    UNUSED uint32_t V_LEGACY_LINELIST_IMM = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM; \
    UNUSED uint32_t V_LEGACY_INDEXEDTRIANGLELIST2 = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2; \
    UNUSED uint32_t V_LEGACY_INDEXEDLINELIST2 = NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PRIMITIVE_TOPOLOGY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PRIMITIVE_TOPOLOGY, nvk_p_ret); \
} while(0)

struct nv_nvc097_ZCULL_SYNC {
    uint32_t v;
};

static inline void
__NVC097_ZCULL_SYNC(uint32_t *val_out, struct nv_nvc097_ZCULL_SYNC st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_ZCULL_SYNC(val, args...) { \
    struct nv_nvc097_ZCULL_SYNC __data = { .v = (args) }; \
    __NVC097_ZCULL_SYNC(&val, __data); \
}

#define VA_NVC097_ZCULL_SYNC V_NVC097_ZCULL_SYNC

#define P_NVC097_ZCULL_SYNC(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_ZCULL_SYNC(nvk_p_ret, args); \
    nv_push_val(push, NVC097_ZCULL_SYNC, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLIP_ID_TEST {
    uint32_t enable;
};

static inline void
__NVC097_SET_CLIP_ID_TEST(uint32_t *val_out, struct nv_nvc097_SET_CLIP_ID_TEST st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_CLIP_ID_TEST(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_CLIP_ID_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_CLIP_ID_TEST_ENABLE_TRUE; \
    struct nv_nvc097_SET_CLIP_ID_TEST __data = { .enable = (args) }; \
    __NVC097_SET_CLIP_ID_TEST(&val, __data); \
}

#define VA_NVC097_SET_CLIP_ID_TEST V_NVC097_SET_CLIP_ID_TEST

#define P_NVC097_SET_CLIP_ID_TEST(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_CLIP_ID_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_CLIP_ID_TEST_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLIP_ID_TEST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLIP_ID_TEST, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SURFACE_CLIP_ID_WIDTH {
    uint32_t v;
};

static inline void
__NVC097_SET_SURFACE_CLIP_ID_WIDTH(uint32_t *val_out, struct nv_nvc097_SET_SURFACE_CLIP_ID_WIDTH st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SURFACE_CLIP_ID_WIDTH(val, args...) { \
    struct nv_nvc097_SET_SURFACE_CLIP_ID_WIDTH __data = { .v = (args) }; \
    __NVC097_SET_SURFACE_CLIP_ID_WIDTH(&val, __data); \
}

#define VA_NVC097_SET_SURFACE_CLIP_ID_WIDTH V_NVC097_SET_SURFACE_CLIP_ID_WIDTH

#define P_NVC097_SET_SURFACE_CLIP_ID_WIDTH(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SURFACE_CLIP_ID_WIDTH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SURFACE_CLIP_ID_WIDTH, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CLIP_ID {
    uint32_t v;
};

static inline void
__NVC097_SET_CLIP_ID(uint32_t *val_out, struct nv_nvc097_SET_CLIP_ID st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_CLIP_ID(val, args...) { \
    struct nv_nvc097_SET_CLIP_ID __data = { .v = (args) }; \
    __NVC097_SET_CLIP_ID(&val, __data); \
}

#define VA_NVC097_SET_CLIP_ID V_NVC097_SET_CLIP_ID

#define P_NVC097_SET_CLIP_ID(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CLIP_ID(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CLIP_ID, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_DEPTH_BOUNDS_TEST {
    uint32_t enable;
};

static inline void
__NVC097_SET_DEPTH_BOUNDS_TEST(uint32_t *val_out, struct nv_nvc097_SET_DEPTH_BOUNDS_TEST st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_DEPTH_BOUNDS_TEST(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE; \
    struct nv_nvc097_SET_DEPTH_BOUNDS_TEST __data = { .enable = (args) }; \
    __NVC097_SET_DEPTH_BOUNDS_TEST(&val, __data); \
}

#define VA_NVC097_SET_DEPTH_BOUNDS_TEST V_NVC097_SET_DEPTH_BOUNDS_TEST

#define P_NVC097_SET_DEPTH_BOUNDS_TEST(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_DEPTH_BOUNDS_TEST(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_DEPTH_BOUNDS_TEST, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_FLOAT_OPTION {
    uint32_t zero_times_anything_is_zero;
};

static inline void
__NVC097_SET_BLEND_FLOAT_OPTION(uint32_t *val_out, struct nv_nvc097_SET_BLEND_FLOAT_OPTION st)
{
    uint32_t val = 0;
    
    assert(st.zero_times_anything_is_zero < (UINT64_C(1) << 1));
    val |= st.zero_times_anything_is_zero << 0;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_FLOAT_OPTION(val, args...) { \
    UNUSED uint32_t ZERO_TIMES_ANYTHING_IS_ZERO_FALSE = NVC097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE; \
    UNUSED uint32_t ZERO_TIMES_ANYTHING_IS_ZERO_TRUE = NVC097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE; \
    struct nv_nvc097_SET_BLEND_FLOAT_OPTION __data = { .zero_times_anything_is_zero = (args) }; \
    __NVC097_SET_BLEND_FLOAT_OPTION(&val, __data); \
}

#define VA_NVC097_SET_BLEND_FLOAT_OPTION V_NVC097_SET_BLEND_FLOAT_OPTION

#define P_NVC097_SET_BLEND_FLOAT_OPTION(push, args...) do { \
    UNUSED uint32_t ZERO_TIMES_ANYTHING_IS_ZERO_FALSE = NVC097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE; \
    UNUSED uint32_t ZERO_TIMES_ANYTHING_IS_ZERO_TRUE = NVC097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_FLOAT_OPTION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_FLOAT_OPTION, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LOGIC_OP {
    uint32_t enable;
};

static inline void
__NVC097_SET_LOGIC_OP(uint32_t *val_out, struct nv_nvc097_SET_LOGIC_OP st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_LOGIC_OP(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_LOGIC_OP_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_LOGIC_OP_ENABLE_TRUE; \
    struct nv_nvc097_SET_LOGIC_OP __data = { .enable = (args) }; \
    __NVC097_SET_LOGIC_OP(&val, __data); \
}

#define VA_NVC097_SET_LOGIC_OP V_NVC097_SET_LOGIC_OP

#define P_NVC097_SET_LOGIC_OP(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_LOGIC_OP_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_LOGIC_OP_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LOGIC_OP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LOGIC_OP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_LOGIC_OP_FUNC {
    uint32_t v;
};

static inline void
__NVC097_SET_LOGIC_OP_FUNC(uint32_t *val_out, struct nv_nvc097_SET_LOGIC_OP_FUNC st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_LOGIC_OP_FUNC(val, args...) { \
    UNUSED uint32_t V_CLEAR = NVC097_SET_LOGIC_OP_FUNC_V_CLEAR; \
    UNUSED uint32_t V_AND = NVC097_SET_LOGIC_OP_FUNC_V_AND; \
    UNUSED uint32_t V_AND_REVERSE = NVC097_SET_LOGIC_OP_FUNC_V_AND_REVERSE; \
    UNUSED uint32_t V_COPY = NVC097_SET_LOGIC_OP_FUNC_V_COPY; \
    UNUSED uint32_t V_AND_INVERTED = NVC097_SET_LOGIC_OP_FUNC_V_AND_INVERTED; \
    UNUSED uint32_t V_NOOP = NVC097_SET_LOGIC_OP_FUNC_V_NOOP; \
    UNUSED uint32_t V_XOR = NVC097_SET_LOGIC_OP_FUNC_V_XOR; \
    UNUSED uint32_t V_OR = NVC097_SET_LOGIC_OP_FUNC_V_OR; \
    UNUSED uint32_t V_NOR = NVC097_SET_LOGIC_OP_FUNC_V_NOR; \
    UNUSED uint32_t V_EQUIV = NVC097_SET_LOGIC_OP_FUNC_V_EQUIV; \
    UNUSED uint32_t V_INVERT = NVC097_SET_LOGIC_OP_FUNC_V_INVERT; \
    UNUSED uint32_t V_OR_REVERSE = NVC097_SET_LOGIC_OP_FUNC_V_OR_REVERSE; \
    UNUSED uint32_t V_COPY_INVERTED = NVC097_SET_LOGIC_OP_FUNC_V_COPY_INVERTED; \
    UNUSED uint32_t V_OR_INVERTED = NVC097_SET_LOGIC_OP_FUNC_V_OR_INVERTED; \
    UNUSED uint32_t V_NAND = NVC097_SET_LOGIC_OP_FUNC_V_NAND; \
    UNUSED uint32_t V_SET = NVC097_SET_LOGIC_OP_FUNC_V_SET; \
    struct nv_nvc097_SET_LOGIC_OP_FUNC __data = { .v = (args) }; \
    __NVC097_SET_LOGIC_OP_FUNC(&val, __data); \
}

#define VA_NVC097_SET_LOGIC_OP_FUNC V_NVC097_SET_LOGIC_OP_FUNC

#define P_NVC097_SET_LOGIC_OP_FUNC(push, args...) do { \
    UNUSED uint32_t V_CLEAR = NVC097_SET_LOGIC_OP_FUNC_V_CLEAR; \
    UNUSED uint32_t V_AND = NVC097_SET_LOGIC_OP_FUNC_V_AND; \
    UNUSED uint32_t V_AND_REVERSE = NVC097_SET_LOGIC_OP_FUNC_V_AND_REVERSE; \
    UNUSED uint32_t V_COPY = NVC097_SET_LOGIC_OP_FUNC_V_COPY; \
    UNUSED uint32_t V_AND_INVERTED = NVC097_SET_LOGIC_OP_FUNC_V_AND_INVERTED; \
    UNUSED uint32_t V_NOOP = NVC097_SET_LOGIC_OP_FUNC_V_NOOP; \
    UNUSED uint32_t V_XOR = NVC097_SET_LOGIC_OP_FUNC_V_XOR; \
    UNUSED uint32_t V_OR = NVC097_SET_LOGIC_OP_FUNC_V_OR; \
    UNUSED uint32_t V_NOR = NVC097_SET_LOGIC_OP_FUNC_V_NOR; \
    UNUSED uint32_t V_EQUIV = NVC097_SET_LOGIC_OP_FUNC_V_EQUIV; \
    UNUSED uint32_t V_INVERT = NVC097_SET_LOGIC_OP_FUNC_V_INVERT; \
    UNUSED uint32_t V_OR_REVERSE = NVC097_SET_LOGIC_OP_FUNC_V_OR_REVERSE; \
    UNUSED uint32_t V_COPY_INVERTED = NVC097_SET_LOGIC_OP_FUNC_V_COPY_INVERTED; \
    UNUSED uint32_t V_OR_INVERTED = NVC097_SET_LOGIC_OP_FUNC_V_OR_INVERTED; \
    UNUSED uint32_t V_NAND = NVC097_SET_LOGIC_OP_FUNC_V_NAND; \
    UNUSED uint32_t V_SET = NVC097_SET_LOGIC_OP_FUNC_V_SET; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_LOGIC_OP_FUNC(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_LOGIC_OP_FUNC, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_Z_COMPRESSION {
    uint32_t enable;
};

static inline void
__NVC097_SET_Z_COMPRESSION(uint32_t *val_out, struct nv_nvc097_SET_Z_COMPRESSION st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_Z_COMPRESSION(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_Z_COMPRESSION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_Z_COMPRESSION_ENABLE_TRUE; \
    struct nv_nvc097_SET_Z_COMPRESSION __data = { .enable = (args) }; \
    __NVC097_SET_Z_COMPRESSION(&val, __data); \
}

#define VA_NVC097_SET_Z_COMPRESSION V_NVC097_SET_Z_COMPRESSION

#define P_NVC097_SET_Z_COMPRESSION(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_Z_COMPRESSION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_Z_COMPRESSION_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_Z_COMPRESSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_Z_COMPRESSION, nvk_p_ret); \
} while(0)

struct nv_nvc097_CLEAR_SURFACE {
    uint32_t z_enable;
    uint32_t stencil_enable;
    uint32_t r_enable;
    uint32_t g_enable;
    uint32_t b_enable;
    uint32_t a_enable;
    uint32_t mrt_select;
    uint32_t rt_array_index;
};

static inline void
__NVC097_CLEAR_SURFACE(uint32_t *val_out, struct nv_nvc097_CLEAR_SURFACE st)
{
    uint32_t val = 0;
    
    assert(st.z_enable < (UINT64_C(1) << 1));
    val |= st.z_enable << 0;
    
    assert(st.stencil_enable < (UINT64_C(1) << 1));
    val |= st.stencil_enable << 1;
    
    assert(st.r_enable < (UINT64_C(1) << 1));
    val |= st.r_enable << 2;
    
    assert(st.g_enable < (UINT64_C(1) << 1));
    val |= st.g_enable << 3;
    
    assert(st.b_enable < (UINT64_C(1) << 1));
    val |= st.b_enable << 4;
    
    assert(st.a_enable < (UINT64_C(1) << 1));
    val |= st.a_enable << 5;
    
    assert(st.mrt_select < (UINT64_C(1) << 4));
    val |= st.mrt_select << 6;
    
    assert(st.rt_array_index < (UINT64_C(1) << 16));
    val |= st.rt_array_index << 10;
    *val_out = val;
}

#define V_NVC097_CLEAR_SURFACE(val, args...) { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_CLEAR_SURFACE_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_CLEAR_SURFACE_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_CLEAR_SURFACE_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_CLEAR_SURFACE_STENCIL_ENABLE_TRUE; \
    UNUSED uint32_t R_ENABLE_FALSE = NVC097_CLEAR_SURFACE_R_ENABLE_FALSE; \
    UNUSED uint32_t R_ENABLE_TRUE = NVC097_CLEAR_SURFACE_R_ENABLE_TRUE; \
    UNUSED uint32_t G_ENABLE_FALSE = NVC097_CLEAR_SURFACE_G_ENABLE_FALSE; \
    UNUSED uint32_t G_ENABLE_TRUE = NVC097_CLEAR_SURFACE_G_ENABLE_TRUE; \
    UNUSED uint32_t B_ENABLE_FALSE = NVC097_CLEAR_SURFACE_B_ENABLE_FALSE; \
    UNUSED uint32_t B_ENABLE_TRUE = NVC097_CLEAR_SURFACE_B_ENABLE_TRUE; \
    UNUSED uint32_t A_ENABLE_FALSE = NVC097_CLEAR_SURFACE_A_ENABLE_FALSE; \
    UNUSED uint32_t A_ENABLE_TRUE = NVC097_CLEAR_SURFACE_A_ENABLE_TRUE; \
    struct nv_nvc097_CLEAR_SURFACE __data = args; \
    __NVC097_CLEAR_SURFACE(&val, __data); \
}

#define VA_NVC097_CLEAR_SURFACE V_NVC097_CLEAR_SURFACE

#define P_NVC097_CLEAR_SURFACE(push, args...) do { \
    UNUSED uint32_t Z_ENABLE_FALSE = NVC097_CLEAR_SURFACE_Z_ENABLE_FALSE; \
    UNUSED uint32_t Z_ENABLE_TRUE = NVC097_CLEAR_SURFACE_Z_ENABLE_TRUE; \
    UNUSED uint32_t STENCIL_ENABLE_FALSE = NVC097_CLEAR_SURFACE_STENCIL_ENABLE_FALSE; \
    UNUSED uint32_t STENCIL_ENABLE_TRUE = NVC097_CLEAR_SURFACE_STENCIL_ENABLE_TRUE; \
    UNUSED uint32_t R_ENABLE_FALSE = NVC097_CLEAR_SURFACE_R_ENABLE_FALSE; \
    UNUSED uint32_t R_ENABLE_TRUE = NVC097_CLEAR_SURFACE_R_ENABLE_TRUE; \
    UNUSED uint32_t G_ENABLE_FALSE = NVC097_CLEAR_SURFACE_G_ENABLE_FALSE; \
    UNUSED uint32_t G_ENABLE_TRUE = NVC097_CLEAR_SURFACE_G_ENABLE_TRUE; \
    UNUSED uint32_t B_ENABLE_FALSE = NVC097_CLEAR_SURFACE_B_ENABLE_FALSE; \
    UNUSED uint32_t B_ENABLE_TRUE = NVC097_CLEAR_SURFACE_B_ENABLE_TRUE; \
    UNUSED uint32_t A_ENABLE_FALSE = NVC097_CLEAR_SURFACE_A_ENABLE_FALSE; \
    UNUSED uint32_t A_ENABLE_TRUE = NVC097_CLEAR_SURFACE_A_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_CLEAR_SURFACE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CLEAR_SURFACE, nvk_p_ret); \
} while(0)

struct nv_nvc097_CLEAR_CLIP_ID_SURFACE {
    uint32_t v;
};

static inline void
__NVC097_CLEAR_CLIP_ID_SURFACE(uint32_t *val_out, struct nv_nvc097_CLEAR_CLIP_ID_SURFACE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_CLEAR_CLIP_ID_SURFACE(val, args...) { \
    struct nv_nvc097_CLEAR_CLIP_ID_SURFACE __data = { .v = (args) }; \
    __NVC097_CLEAR_CLIP_ID_SURFACE(&val, __data); \
}

#define VA_NVC097_CLEAR_CLIP_ID_SURFACE V_NVC097_CLEAR_CLIP_ID_SURFACE

#define P_NVC097_CLEAR_CLIP_ID_SURFACE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_CLEAR_CLIP_ID_SURFACE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CLEAR_CLIP_ID_SURFACE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_COMPRESSION {
    uint32_t enable;
};

static inline void
__NVC097_SET_COLOR_COMPRESSION(uint32_t *val_out, struct nv_nvc097_SET_COLOR_COMPRESSION st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_COMPRESSION(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_COLOR_COMPRESSION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_COLOR_COMPRESSION_ENABLE_TRUE; \
    struct nv_nvc097_SET_COLOR_COMPRESSION __data = { .enable = (args) }; \
    __NVC097_SET_COLOR_COMPRESSION(&val, __data); \
}

#define VA_NVC097_SET_COLOR_COMPRESSION(i) V_NVC097_SET_COLOR_COMPRESSION

#define P_NVC097_SET_COLOR_COMPRESSION(push, idx, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_COLOR_COMPRESSION_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_COLOR_COMPRESSION_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_COMPRESSION(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_COMPRESSION(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CT_WRITE {
    uint32_t r_enable;
    uint32_t g_enable;
    uint32_t b_enable;
    uint32_t a_enable;
};

static inline void
__NVC097_SET_CT_WRITE(uint32_t *val_out, struct nv_nvc097_SET_CT_WRITE st)
{
    uint32_t val = 0;
    
    assert(st.r_enable < (UINT64_C(1) << 1));
    val |= st.r_enable << 0;
    
    assert(st.g_enable < (UINT64_C(1) << 1));
    val |= st.g_enable << 4;
    
    assert(st.b_enable < (UINT64_C(1) << 1));
    val |= st.b_enable << 8;
    
    assert(st.a_enable < (UINT64_C(1) << 1));
    val |= st.a_enable << 12;
    *val_out = val;
}

#define V_NVC097_SET_CT_WRITE(val, args...) { \
    UNUSED uint32_t R_ENABLE_FALSE = NVC097_SET_CT_WRITE_R_ENABLE_FALSE; \
    UNUSED uint32_t R_ENABLE_TRUE = NVC097_SET_CT_WRITE_R_ENABLE_TRUE; \
    UNUSED uint32_t G_ENABLE_FALSE = NVC097_SET_CT_WRITE_G_ENABLE_FALSE; \
    UNUSED uint32_t G_ENABLE_TRUE = NVC097_SET_CT_WRITE_G_ENABLE_TRUE; \
    UNUSED uint32_t B_ENABLE_FALSE = NVC097_SET_CT_WRITE_B_ENABLE_FALSE; \
    UNUSED uint32_t B_ENABLE_TRUE = NVC097_SET_CT_WRITE_B_ENABLE_TRUE; \
    UNUSED uint32_t A_ENABLE_FALSE = NVC097_SET_CT_WRITE_A_ENABLE_FALSE; \
    UNUSED uint32_t A_ENABLE_TRUE = NVC097_SET_CT_WRITE_A_ENABLE_TRUE; \
    struct nv_nvc097_SET_CT_WRITE __data = args; \
    __NVC097_SET_CT_WRITE(&val, __data); \
}

#define VA_NVC097_SET_CT_WRITE(i) V_NVC097_SET_CT_WRITE

#define P_NVC097_SET_CT_WRITE(push, idx, args...) do { \
    UNUSED uint32_t R_ENABLE_FALSE = NVC097_SET_CT_WRITE_R_ENABLE_FALSE; \
    UNUSED uint32_t R_ENABLE_TRUE = NVC097_SET_CT_WRITE_R_ENABLE_TRUE; \
    UNUSED uint32_t G_ENABLE_FALSE = NVC097_SET_CT_WRITE_G_ENABLE_FALSE; \
    UNUSED uint32_t G_ENABLE_TRUE = NVC097_SET_CT_WRITE_G_ENABLE_TRUE; \
    UNUSED uint32_t B_ENABLE_FALSE = NVC097_SET_CT_WRITE_B_ENABLE_FALSE; \
    UNUSED uint32_t B_ENABLE_TRUE = NVC097_SET_CT_WRITE_B_ENABLE_TRUE; \
    UNUSED uint32_t A_ENABLE_FALSE = NVC097_SET_CT_WRITE_A_ENABLE_FALSE; \
    UNUSED uint32_t A_ENABLE_TRUE = NVC097_SET_CT_WRITE_A_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CT_WRITE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CT_WRITE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_PIPE_NOP {
    uint32_t v;
};

static inline void
__NVC097_PIPE_NOP(uint32_t *val_out, struct nv_nvc097_PIPE_NOP st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_PIPE_NOP(val, args...) { \
    struct nv_nvc097_PIPE_NOP __data = { .v = (args) }; \
    __NVC097_PIPE_NOP(&val, __data); \
}

#define VA_NVC097_PIPE_NOP V_NVC097_PIPE_NOP

#define P_NVC097_PIPE_NOP(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_PIPE_NOP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_PIPE_NOP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE00 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE00(uint32_t *val_out, struct nv_nvc097_SET_SPARE00 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE00(val, args...) { \
    struct nv_nvc097_SET_SPARE00 __data = { .v = (args) }; \
    __NVC097_SET_SPARE00(&val, __data); \
}

#define VA_NVC097_SET_SPARE00 V_NVC097_SET_SPARE00

#define P_NVC097_SET_SPARE00(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE00(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE00, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE01 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE01(uint32_t *val_out, struct nv_nvc097_SET_SPARE01 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE01(val, args...) { \
    struct nv_nvc097_SET_SPARE01 __data = { .v = (args) }; \
    __NVC097_SET_SPARE01(&val, __data); \
}

#define VA_NVC097_SET_SPARE01 V_NVC097_SET_SPARE01

#define P_NVC097_SET_SPARE01(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE01(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE01, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE02 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE02(uint32_t *val_out, struct nv_nvc097_SET_SPARE02 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE02(val, args...) { \
    struct nv_nvc097_SET_SPARE02 __data = { .v = (args) }; \
    __NVC097_SET_SPARE02(&val, __data); \
}

#define VA_NVC097_SET_SPARE02 V_NVC097_SET_SPARE02

#define P_NVC097_SET_SPARE02(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE02(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE02, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SPARE03 {
    uint32_t v;
};

static inline void
__NVC097_SET_SPARE03(uint32_t *val_out, struct nv_nvc097_SET_SPARE03 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SPARE03(val, args...) { \
    struct nv_nvc097_SET_SPARE03 __data = { .v = (args) }; \
    __NVC097_SET_SPARE03(&val, __data); \
}

#define VA_NVC097_SET_SPARE03 V_NVC097_SET_SPARE03

#define P_NVC097_SET_SPARE03(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SPARE03(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SPARE03, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REPORT_SEMAPHORE_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_REPORT_SEMAPHORE_A(uint32_t *val_out, struct nv_nvc097_SET_REPORT_SEMAPHORE_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_REPORT_SEMAPHORE_A(val, args...) { \
    struct nv_nvc097_SET_REPORT_SEMAPHORE_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_REPORT_SEMAPHORE_A(&val, __data); \
}

#define VA_NVC097_SET_REPORT_SEMAPHORE_A V_NVC097_SET_REPORT_SEMAPHORE_A

#define P_NVC097_SET_REPORT_SEMAPHORE_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REPORT_SEMAPHORE_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REPORT_SEMAPHORE_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REPORT_SEMAPHORE_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_REPORT_SEMAPHORE_B(uint32_t *val_out, struct nv_nvc097_SET_REPORT_SEMAPHORE_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_REPORT_SEMAPHORE_B(val, args...) { \
    struct nv_nvc097_SET_REPORT_SEMAPHORE_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_REPORT_SEMAPHORE_B(&val, __data); \
}

#define VA_NVC097_SET_REPORT_SEMAPHORE_B V_NVC097_SET_REPORT_SEMAPHORE_B

#define P_NVC097_SET_REPORT_SEMAPHORE_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REPORT_SEMAPHORE_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REPORT_SEMAPHORE_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REPORT_SEMAPHORE_C {
    uint32_t payload;
};

static inline void
__NVC097_SET_REPORT_SEMAPHORE_C(uint32_t *val_out, struct nv_nvc097_SET_REPORT_SEMAPHORE_C st)
{
    uint32_t val = 0;
    
    val |= st.payload;
    *val_out = val;
}

#define V_NVC097_SET_REPORT_SEMAPHORE_C(val, args...) { \
    struct nv_nvc097_SET_REPORT_SEMAPHORE_C __data = { .payload = (args) }; \
    __NVC097_SET_REPORT_SEMAPHORE_C(&val, __data); \
}

#define VA_NVC097_SET_REPORT_SEMAPHORE_C V_NVC097_SET_REPORT_SEMAPHORE_C

#define P_NVC097_SET_REPORT_SEMAPHORE_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REPORT_SEMAPHORE_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REPORT_SEMAPHORE_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_REPORT_SEMAPHORE_D {
    uint32_t operation;
    uint32_t release;
    uint32_t acquire;
    uint32_t pipeline_location;
    uint32_t comparison;
    uint32_t awaken_enable;
    uint32_t report;
    uint32_t structure_size;
    uint32_t sub_report;
    uint32_t report_dword_number;
    uint32_t flush_disable;
    uint32_t reduction_enable;
    uint32_t reduction_op;
    uint32_t reduction_format;
};

static inline void
__NVC097_SET_REPORT_SEMAPHORE_D(uint32_t *val_out, struct nv_nvc097_SET_REPORT_SEMAPHORE_D st)
{
    uint32_t val = 0;
    
    assert(st.operation < (UINT64_C(1) << 2));
    val |= st.operation << 0;
    
    assert(st.release < (UINT64_C(1) << 1));
    val |= st.release << 4;
    
    assert(st.acquire < (UINT64_C(1) << 1));
    val |= st.acquire << 8;
    
    assert(st.pipeline_location < (UINT64_C(1) << 4));
    val |= st.pipeline_location << 12;
    
    assert(st.comparison < (UINT64_C(1) << 1));
    val |= st.comparison << 16;
    
    assert(st.awaken_enable < (UINT64_C(1) << 1));
    val |= st.awaken_enable << 20;
    
    assert(st.report < (UINT64_C(1) << 5));
    val |= st.report << 23;
    
    assert(st.structure_size < (UINT64_C(1) << 1));
    val |= st.structure_size << 28;
    
    assert(st.sub_report < (UINT64_C(1) << 3));
    val |= st.sub_report << 5;
    
    assert(st.report_dword_number < (UINT64_C(1) << 1));
    val |= st.report_dword_number << 21;
    
    assert(st.flush_disable < (UINT64_C(1) << 1));
    val |= st.flush_disable << 2;
    
    assert(st.reduction_enable < (UINT64_C(1) << 1));
    val |= st.reduction_enable << 3;
    
    assert(st.reduction_op < (UINT64_C(1) << 3));
    val |= st.reduction_op << 9;
    
    assert(st.reduction_format < (UINT64_C(1) << 2));
    val |= st.reduction_format << 17;
    *val_out = val;
}

#define V_NVC097_SET_REPORT_SEMAPHORE_D(val, args...) { \
    UNUSED uint32_t OPERATION_RELEASE = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE; \
    UNUSED uint32_t OPERATION_ACQUIRE = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE; \
    UNUSED uint32_t OPERATION_REPORT_ONLY = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY; \
    UNUSED uint32_t OPERATION_TRAP = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP; \
    UNUSED uint32_t RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE = NVC097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE; \
    UNUSED uint32_t RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE = NVC097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE; \
    UNUSED uint32_t ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START = NVC097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START; \
    UNUSED uint32_t ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START = NVC097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START; \
    UNUSED uint32_t PIPELINE_LOCATION_NONE = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE; \
    UNUSED uint32_t PIPELINE_LOCATION_DATA_ASSEMBLER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER; \
    UNUSED uint32_t PIPELINE_LOCATION_VERTEX_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_TESSELATION_INIT_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_TESSELATION_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_GEOMETRY_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_STREAMING_OUTPUT = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT; \
    UNUSED uint32_t PIPELINE_LOCATION_VPC = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC; \
    UNUSED uint32_t PIPELINE_LOCATION_ZCULL = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL; \
    UNUSED uint32_t PIPELINE_LOCATION_PIXEL_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_DEPTH_TEST = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST; \
    UNUSED uint32_t PIPELINE_LOCATION_ALL = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL; \
    UNUSED uint32_t COMPARISON_EQ = NVC097_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ; \
    UNUSED uint32_t COMPARISON_GE = NVC097_SET_REPORT_SEMAPHORE_D_COMPARISON_GE; \
    UNUSED uint32_t AWAKEN_ENABLE_FALSE = NVC097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE; \
    UNUSED uint32_t AWAKEN_ENABLE_TRUE = NVC097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE; \
    UNUSED uint32_t REPORT_NONE = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_NONE; \
    UNUSED uint32_t REPORT_DA_VERTICES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED; \
    UNUSED uint32_t REPORT_DA_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_VS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS; \
    UNUSED uint32_t REPORT_TI_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS; \
    UNUSED uint32_t REPORT_TS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS; \
    UNUSED uint32_t REPORT_TS_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_GS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS; \
    UNUSED uint32_t REPORT_GS_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_ALPHA_BETA_CLOCKS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS; \
    UNUSED uint32_t REPORT_VTG_PRIMITIVES_OUT = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT; \
    UNUSED uint32_t REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED; \
    UNUSED uint32_t REPORT_STREAMING_PRIMITIVES_SUCCEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED; \
    UNUSED uint32_t REPORT_STREAMING_PRIMITIVES_NEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED; \
    UNUSED uint32_t REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED; \
    UNUSED uint32_t REPORT_STREAMING_BYTE_COUNT = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT; \
    UNUSED uint32_t REPORT_CLIPPER_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS; \
    UNUSED uint32_t REPORT_CLIPPER_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_ZCULL_STATS0 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0; \
    UNUSED uint32_t REPORT_ZCULL_STATS1 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1; \
    UNUSED uint32_t REPORT_ZCULL_STATS2 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2; \
    UNUSED uint32_t REPORT_ZCULL_STATS3 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3; \
    UNUSED uint32_t REPORT_PS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS; \
    UNUSED uint32_t REPORT_ZPASS_PIXEL_CNT = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT; \
    UNUSED uint32_t REPORT_ZPASS_PIXEL_CNT64 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64; \
    UNUSED uint32_t REPORT_TILED_ZPASS_PIXEL_CNT64 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64; \
    UNUSED uint32_t REPORT_IEEE_CLEAN_COLOR_TARGET = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET; \
    UNUSED uint32_t REPORT_IEEE_CLEAN_ZETA_TARGET = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET; \
    UNUSED uint32_t REPORT_BOUNDING_RECTANGLE = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE; \
    UNUSED uint32_t STRUCTURE_SIZE_FOUR_WORDS = NVC097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS; \
    UNUSED uint32_t STRUCTURE_SIZE_ONE_WORD = NVC097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD; \
    UNUSED uint32_t FLUSH_DISABLE_FALSE = NVC097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE; \
    UNUSED uint32_t FLUSH_DISABLE_TRUE = NVC097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE; \
    UNUSED uint32_t REDUCTION_ENABLE_FALSE = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE; \
    UNUSED uint32_t REDUCTION_ENABLE_TRUE = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE; \
    UNUSED uint32_t REDUCTION_OP_RED_ADD = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD; \
    UNUSED uint32_t REDUCTION_OP_RED_MIN = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN; \
    UNUSED uint32_t REDUCTION_OP_RED_MAX = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX; \
    UNUSED uint32_t REDUCTION_OP_RED_INC = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC; \
    UNUSED uint32_t REDUCTION_OP_RED_DEC = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC; \
    UNUSED uint32_t REDUCTION_OP_RED_AND = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND; \
    UNUSED uint32_t REDUCTION_OP_RED_OR = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR; \
    UNUSED uint32_t REDUCTION_OP_RED_XOR = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR; \
    UNUSED uint32_t REDUCTION_FORMAT_UNSIGNED_32 = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32; \
    UNUSED uint32_t REDUCTION_FORMAT_SIGNED_32 = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32; \
    struct nv_nvc097_SET_REPORT_SEMAPHORE_D __data = args; \
    __NVC097_SET_REPORT_SEMAPHORE_D(&val, __data); \
}

#define VA_NVC097_SET_REPORT_SEMAPHORE_D V_NVC097_SET_REPORT_SEMAPHORE_D

#define P_NVC097_SET_REPORT_SEMAPHORE_D(push, args...) do { \
    UNUSED uint32_t OPERATION_RELEASE = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE; \
    UNUSED uint32_t OPERATION_ACQUIRE = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE; \
    UNUSED uint32_t OPERATION_REPORT_ONLY = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY; \
    UNUSED uint32_t OPERATION_TRAP = NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP; \
    UNUSED uint32_t RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE = NVC097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE; \
    UNUSED uint32_t RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE = NVC097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE; \
    UNUSED uint32_t ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START = NVC097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START; \
    UNUSED uint32_t ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START = NVC097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START; \
    UNUSED uint32_t PIPELINE_LOCATION_NONE = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE; \
    UNUSED uint32_t PIPELINE_LOCATION_DATA_ASSEMBLER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER; \
    UNUSED uint32_t PIPELINE_LOCATION_VERTEX_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_TESSELATION_INIT_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_TESSELATION_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_GEOMETRY_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_STREAMING_OUTPUT = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT; \
    UNUSED uint32_t PIPELINE_LOCATION_VPC = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC; \
    UNUSED uint32_t PIPELINE_LOCATION_ZCULL = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL; \
    UNUSED uint32_t PIPELINE_LOCATION_PIXEL_SHADER = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER; \
    UNUSED uint32_t PIPELINE_LOCATION_DEPTH_TEST = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST; \
    UNUSED uint32_t PIPELINE_LOCATION_ALL = NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL; \
    UNUSED uint32_t COMPARISON_EQ = NVC097_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ; \
    UNUSED uint32_t COMPARISON_GE = NVC097_SET_REPORT_SEMAPHORE_D_COMPARISON_GE; \
    UNUSED uint32_t AWAKEN_ENABLE_FALSE = NVC097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE; \
    UNUSED uint32_t AWAKEN_ENABLE_TRUE = NVC097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE; \
    UNUSED uint32_t REPORT_NONE = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_NONE; \
    UNUSED uint32_t REPORT_DA_VERTICES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED; \
    UNUSED uint32_t REPORT_DA_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_VS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS; \
    UNUSED uint32_t REPORT_TI_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS; \
    UNUSED uint32_t REPORT_TS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS; \
    UNUSED uint32_t REPORT_TS_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_GS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS; \
    UNUSED uint32_t REPORT_GS_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_ALPHA_BETA_CLOCKS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS; \
    UNUSED uint32_t REPORT_VTG_PRIMITIVES_OUT = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT; \
    UNUSED uint32_t REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED; \
    UNUSED uint32_t REPORT_STREAMING_PRIMITIVES_SUCCEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED; \
    UNUSED uint32_t REPORT_STREAMING_PRIMITIVES_NEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED; \
    UNUSED uint32_t REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED; \
    UNUSED uint32_t REPORT_STREAMING_BYTE_COUNT = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT; \
    UNUSED uint32_t REPORT_CLIPPER_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS; \
    UNUSED uint32_t REPORT_CLIPPER_PRIMITIVES_GENERATED = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED; \
    UNUSED uint32_t REPORT_ZCULL_STATS0 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0; \
    UNUSED uint32_t REPORT_ZCULL_STATS1 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1; \
    UNUSED uint32_t REPORT_ZCULL_STATS2 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2; \
    UNUSED uint32_t REPORT_ZCULL_STATS3 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3; \
    UNUSED uint32_t REPORT_PS_INVOCATIONS = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS; \
    UNUSED uint32_t REPORT_ZPASS_PIXEL_CNT = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT; \
    UNUSED uint32_t REPORT_ZPASS_PIXEL_CNT64 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64; \
    UNUSED uint32_t REPORT_TILED_ZPASS_PIXEL_CNT64 = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64; \
    UNUSED uint32_t REPORT_IEEE_CLEAN_COLOR_TARGET = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET; \
    UNUSED uint32_t REPORT_IEEE_CLEAN_ZETA_TARGET = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET; \
    UNUSED uint32_t REPORT_BOUNDING_RECTANGLE = NVC097_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE; \
    UNUSED uint32_t STRUCTURE_SIZE_FOUR_WORDS = NVC097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS; \
    UNUSED uint32_t STRUCTURE_SIZE_ONE_WORD = NVC097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD; \
    UNUSED uint32_t FLUSH_DISABLE_FALSE = NVC097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE; \
    UNUSED uint32_t FLUSH_DISABLE_TRUE = NVC097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE; \
    UNUSED uint32_t REDUCTION_ENABLE_FALSE = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE; \
    UNUSED uint32_t REDUCTION_ENABLE_TRUE = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE; \
    UNUSED uint32_t REDUCTION_OP_RED_ADD = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD; \
    UNUSED uint32_t REDUCTION_OP_RED_MIN = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN; \
    UNUSED uint32_t REDUCTION_OP_RED_MAX = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX; \
    UNUSED uint32_t REDUCTION_OP_RED_INC = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC; \
    UNUSED uint32_t REDUCTION_OP_RED_DEC = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC; \
    UNUSED uint32_t REDUCTION_OP_RED_AND = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND; \
    UNUSED uint32_t REDUCTION_OP_RED_OR = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR; \
    UNUSED uint32_t REDUCTION_OP_RED_XOR = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR; \
    UNUSED uint32_t REDUCTION_FORMAT_UNSIGNED_32 = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32; \
    UNUSED uint32_t REDUCTION_FORMAT_SIGNED_32 = NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_REPORT_SEMAPHORE_D(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_REPORT_SEMAPHORE_D, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_A_FORMAT {
    uint32_t stride;
    uint32_t enable;
};

static inline void
__NVC097_SET_VERTEX_STREAM_A_FORMAT(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_A_FORMAT st)
{
    uint32_t val = 0;
    
    assert(st.stride < (UINT64_C(1) << 12));
    val |= st.stride << 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 12;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_A_FORMAT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE; \
    struct nv_nvc097_SET_VERTEX_STREAM_A_FORMAT __data = args; \
    __NVC097_SET_VERTEX_STREAM_A_FORMAT(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_A_FORMAT(i) V_NVC097_SET_VERTEX_STREAM_A_FORMAT

#define P_NVC097_SET_VERTEX_STREAM_A_FORMAT(push, idx, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_A_FORMAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_A_FORMAT(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_A_LOCATION_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_VERTEX_STREAM_A_LOCATION_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_A_LOCATION_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_A_LOCATION_A(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_A_LOCATION_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_VERTEX_STREAM_A_LOCATION_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_A_LOCATION_A(i) V_NVC097_SET_VERTEX_STREAM_A_LOCATION_A

#define P_NVC097_SET_VERTEX_STREAM_A_LOCATION_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_A_LOCATION_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_A_LOCATION_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_A_LOCATION_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_VERTEX_STREAM_A_LOCATION_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_A_LOCATION_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_A_LOCATION_B(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_A_LOCATION_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_VERTEX_STREAM_A_LOCATION_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_A_LOCATION_B(i) V_NVC097_SET_VERTEX_STREAM_A_LOCATION_B

#define P_NVC097_SET_VERTEX_STREAM_A_LOCATION_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_A_LOCATION_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_A_LOCATION_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_A_FREQUENCY {
    uint32_t v;
};

static inline void
__NVC097_SET_VERTEX_STREAM_A_FREQUENCY(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_A_FREQUENCY st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_A_FREQUENCY(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_A_FREQUENCY __data = { .v = (args) }; \
    __NVC097_SET_VERTEX_STREAM_A_FREQUENCY(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_A_FREQUENCY(i) V_NVC097_SET_VERTEX_STREAM_A_FREQUENCY

#define P_NVC097_SET_VERTEX_STREAM_A_FREQUENCY(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_A_FREQUENCY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_A_FREQUENCY(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_B_FORMAT {
    uint32_t stride;
    uint32_t enable;
};

static inline void
__NVC097_SET_VERTEX_STREAM_B_FORMAT(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_B_FORMAT st)
{
    uint32_t val = 0;
    
    assert(st.stride < (UINT64_C(1) << 12));
    val |= st.stride << 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 12;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_B_FORMAT(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE; \
    struct nv_nvc097_SET_VERTEX_STREAM_B_FORMAT __data = args; \
    __NVC097_SET_VERTEX_STREAM_B_FORMAT(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_B_FORMAT(i) V_NVC097_SET_VERTEX_STREAM_B_FORMAT

#define P_NVC097_SET_VERTEX_STREAM_B_FORMAT(push, idx, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_B_FORMAT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_B_FORMAT(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_B_LOCATION_A {
    uint32_t offset_upper;
};

static inline void
__NVC097_SET_VERTEX_STREAM_B_LOCATION_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_B_LOCATION_A st)
{
    uint32_t val = 0;
    
    assert(st.offset_upper < (UINT64_C(1) << 8));
    val |= st.offset_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_B_LOCATION_A(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_B_LOCATION_A __data = { .offset_upper = (args) }; \
    __NVC097_SET_VERTEX_STREAM_B_LOCATION_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_B_LOCATION_A(i) V_NVC097_SET_VERTEX_STREAM_B_LOCATION_A

#define P_NVC097_SET_VERTEX_STREAM_B_LOCATION_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_B_LOCATION_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_B_LOCATION_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_B_LOCATION_B {
    uint32_t offset_lower;
};

static inline void
__NVC097_SET_VERTEX_STREAM_B_LOCATION_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_B_LOCATION_B st)
{
    uint32_t val = 0;
    
    val |= st.offset_lower;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_B_LOCATION_B(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_B_LOCATION_B __data = { .offset_lower = (args) }; \
    __NVC097_SET_VERTEX_STREAM_B_LOCATION_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_B_LOCATION_B(i) V_NVC097_SET_VERTEX_STREAM_B_LOCATION_B

#define P_NVC097_SET_VERTEX_STREAM_B_LOCATION_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_B_LOCATION_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_B_LOCATION_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_B_FREQUENCY {
    uint32_t v;
};

static inline void
__NVC097_SET_VERTEX_STREAM_B_FREQUENCY(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_B_FREQUENCY st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_B_FREQUENCY(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_B_FREQUENCY __data = { .v = (args) }; \
    __NVC097_SET_VERTEX_STREAM_B_FREQUENCY(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_B_FREQUENCY(i) V_NVC097_SET_VERTEX_STREAM_B_FREQUENCY

#define P_NVC097_SET_VERTEX_STREAM_B_FREQUENCY(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_B_FREQUENCY(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_B_FREQUENCY(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA {
    uint32_t enable;
};

static inline void
__NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE; \
    struct nv_nvc097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA __data = { .enable = (args) }; \
    __NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(i) V_NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA

#define P_NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(push, idx, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_OP {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_PER_TARGET_COLOR_OP(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_OP st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_TARGET_COLOR_OP(val, args...) { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX; \
    struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_OP __data = { .v = (args) }; \
    __NVC097_SET_BLEND_PER_TARGET_COLOR_OP(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_TARGET_COLOR_OP(i) V_NVC097_SET_BLEND_PER_TARGET_COLOR_OP

#define P_NVC097_SET_BLEND_PER_TARGET_COLOR_OP(push, idx, args...) do { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_TARGET_COLOR_OP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_TARGET_COLOR_OP(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(i) V_NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF

#define P_NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(push, idx, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(i) V_NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF

#define P_NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(push, idx, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_OP {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_OP st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(val, args...) { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX; \
    struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_OP __data = { .v = (args) }; \
    __NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(i) V_NVC097_SET_BLEND_PER_TARGET_ALPHA_OP

#define P_NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(push, idx, args...) do { \
    UNUSED uint32_t V_OGL_FUNC_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_REVERSE_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT; \
    UNUSED uint32_t V_OGL_FUNC_ADD = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD; \
    UNUSED uint32_t V_OGL_MIN = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN; \
    UNUSED uint32_t V_OGL_MAX = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX; \
    UNUSED uint32_t V_D3D_ADD = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD; \
    UNUSED uint32_t V_D3D_SUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT; \
    UNUSED uint32_t V_D3D_REVSUBTRACT = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT; \
    UNUSED uint32_t V_D3D_MIN = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN; \
    UNUSED uint32_t V_D3D_MAX = NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(i) V_NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF

#define P_NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(push, idx, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BOTHSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA; \
    UNUSED uint32_t V_D3D_BOTHINVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF {
    uint32_t v;
};

static inline void
__NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(uint32_t *val_out, struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(val, args...) { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    struct nv_nvc097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF __data = { .v = (args) }; \
    __NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(&val, __data); \
}

#define VA_NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(i) V_NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF

#define P_NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(push, idx, args...) do { \
    UNUSED uint32_t V_OGL_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO; \
    UNUSED uint32_t V_OGL_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE; \
    UNUSED uint32_t V_OGL_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_SRC_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA; \
    UNUSED uint32_t V_OGL_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA; \
    UNUSED uint32_t V_OGL_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_DST_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR; \
    UNUSED uint32_t V_OGL_SRC_ALPHA_SATURATE = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE; \
    UNUSED uint32_t V_OGL_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR; \
    UNUSED uint32_t V_OGL_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_ONE_MINUS_CONSTANT_ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA; \
    UNUSED uint32_t V_OGL_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR; \
    UNUSED uint32_t V_OGL_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR; \
    UNUSED uint32_t V_OGL_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA; \
    UNUSED uint32_t V_OGL_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA; \
    UNUSED uint32_t V_D3D_ZERO = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO; \
    UNUSED uint32_t V_D3D_ONE = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE; \
    UNUSED uint32_t V_D3D_SRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR; \
    UNUSED uint32_t V_D3D_INVSRCCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA; \
    UNUSED uint32_t V_D3D_INVSRCALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA; \
    UNUSED uint32_t V_D3D_DESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA; \
    UNUSED uint32_t V_D3D_INVDESTALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA; \
    UNUSED uint32_t V_D3D_DESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR; \
    UNUSED uint32_t V_D3D_INVDESTCOLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR; \
    UNUSED uint32_t V_D3D_SRCALPHASAT = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT; \
    UNUSED uint32_t V_D3D_BLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR; \
    UNUSED uint32_t V_D3D_INVBLENDFACTOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR; \
    UNUSED uint32_t V_D3D_SRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR; \
    UNUSED uint32_t V_D3D_INVSRC1COLOR = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR; \
    UNUSED uint32_t V_D3D_SRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA; \
    UNUSED uint32_t V_D3D_INVSRC1ALPHA = NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_A_A {
    uint32_t upper;
};

static inline void
__NVC097_SET_VERTEX_STREAM_LIMIT_A_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_A_A st)
{
    uint32_t val = 0;
    
    assert(st.upper < (UINT64_C(1) << 8));
    val |= st.upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_LIMIT_A_A(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_A_A __data = { .upper = (args) }; \
    __NVC097_SET_VERTEX_STREAM_LIMIT_A_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_LIMIT_A_A(i) V_NVC097_SET_VERTEX_STREAM_LIMIT_A_A

#define P_NVC097_SET_VERTEX_STREAM_LIMIT_A_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_LIMIT_A_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_LIMIT_A_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_A_B {
    uint32_t lower;
};

static inline void
__NVC097_SET_VERTEX_STREAM_LIMIT_A_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_A_B st)
{
    uint32_t val = 0;
    
    val |= st.lower;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_LIMIT_A_B(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_A_B __data = { .lower = (args) }; \
    __NVC097_SET_VERTEX_STREAM_LIMIT_A_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_LIMIT_A_B(i) V_NVC097_SET_VERTEX_STREAM_LIMIT_A_B

#define P_NVC097_SET_VERTEX_STREAM_LIMIT_A_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_LIMIT_A_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_LIMIT_A_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_B_A {
    uint32_t upper;
};

static inline void
__NVC097_SET_VERTEX_STREAM_LIMIT_B_A(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_B_A st)
{
    uint32_t val = 0;
    
    assert(st.upper < (UINT64_C(1) << 8));
    val |= st.upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_LIMIT_B_A(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_B_A __data = { .upper = (args) }; \
    __NVC097_SET_VERTEX_STREAM_LIMIT_B_A(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_LIMIT_B_A(i) V_NVC097_SET_VERTEX_STREAM_LIMIT_B_A

#define P_NVC097_SET_VERTEX_STREAM_LIMIT_B_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_LIMIT_B_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_LIMIT_B_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_B_B {
    uint32_t lower;
};

static inline void
__NVC097_SET_VERTEX_STREAM_LIMIT_B_B(uint32_t *val_out, struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_B_B st)
{
    uint32_t val = 0;
    
    val |= st.lower;
    *val_out = val;
}

#define V_NVC097_SET_VERTEX_STREAM_LIMIT_B_B(val, args...) { \
    struct nv_nvc097_SET_VERTEX_STREAM_LIMIT_B_B __data = { .lower = (args) }; \
    __NVC097_SET_VERTEX_STREAM_LIMIT_B_B(&val, __data); \
}

#define VA_NVC097_SET_VERTEX_STREAM_LIMIT_B_B(i) V_NVC097_SET_VERTEX_STREAM_LIMIT_B_B

#define P_NVC097_SET_VERTEX_STREAM_LIMIT_B_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_VERTEX_STREAM_LIMIT_B_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_VERTEX_STREAM_LIMIT_B_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_SHADER {
    uint32_t enable;
    uint32_t type;
};

static inline void
__NVC097_SET_PIPELINE_SHADER(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_SHADER st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    
    assert(st.type < (UINT64_C(1) << 4));
    val |= st.type << 4;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_SHADER(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_PIPELINE_SHADER_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_PIPELINE_SHADER_ENABLE_TRUE; \
    UNUSED uint32_t TYPE_VERTEX_CULL_BEFORE_FETCH = NVC097_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH; \
    UNUSED uint32_t TYPE_VERTEX = NVC097_SET_PIPELINE_SHADER_TYPE_VERTEX; \
    UNUSED uint32_t TYPE_TESSELLATION_INIT = NVC097_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT; \
    UNUSED uint32_t TYPE_TESSELLATION = NVC097_SET_PIPELINE_SHADER_TYPE_TESSELLATION; \
    UNUSED uint32_t TYPE_GEOMETRY = NVC097_SET_PIPELINE_SHADER_TYPE_GEOMETRY; \
    UNUSED uint32_t TYPE_PIXEL = NVC097_SET_PIPELINE_SHADER_TYPE_PIXEL; \
    struct nv_nvc097_SET_PIPELINE_SHADER __data = args; \
    __NVC097_SET_PIPELINE_SHADER(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_SHADER(i) V_NVC097_SET_PIPELINE_SHADER

#define P_NVC097_SET_PIPELINE_SHADER(push, idx, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_PIPELINE_SHADER_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_PIPELINE_SHADER_ENABLE_TRUE; \
    UNUSED uint32_t TYPE_VERTEX_CULL_BEFORE_FETCH = NVC097_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH; \
    UNUSED uint32_t TYPE_VERTEX = NVC097_SET_PIPELINE_SHADER_TYPE_VERTEX; \
    UNUSED uint32_t TYPE_TESSELLATION_INIT = NVC097_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT; \
    UNUSED uint32_t TYPE_TESSELLATION = NVC097_SET_PIPELINE_SHADER_TYPE_TESSELLATION; \
    UNUSED uint32_t TYPE_GEOMETRY = NVC097_SET_PIPELINE_SHADER_TYPE_GEOMETRY; \
    UNUSED uint32_t TYPE_PIXEL = NVC097_SET_PIPELINE_SHADER_TYPE_PIXEL; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_SHADER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_SHADER(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_PROGRAM {
    uint32_t offset;
};

static inline void
__NVC097_SET_PIPELINE_PROGRAM(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_PROGRAM st)
{
    uint32_t val = 0;
    
    val |= st.offset;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_PROGRAM(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_PROGRAM __data = { .offset = (args) }; \
    __NVC097_SET_PIPELINE_PROGRAM(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_PROGRAM(i) V_NVC097_SET_PIPELINE_PROGRAM

#define P_NVC097_SET_PIPELINE_PROGRAM(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_PROGRAM(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_PROGRAM(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_RESERVED_A {
    uint32_t v;
};

static inline void
__NVC097_SET_PIPELINE_RESERVED_A(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_RESERVED_A st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_RESERVED_A(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_RESERVED_A __data = { .v = (args) }; \
    __NVC097_SET_PIPELINE_RESERVED_A(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_RESERVED_A(i) V_NVC097_SET_PIPELINE_RESERVED_A

#define P_NVC097_SET_PIPELINE_RESERVED_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_RESERVED_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_RESERVED_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_REGISTER_COUNT {
    uint32_t v;
};

static inline void
__NVC097_SET_PIPELINE_REGISTER_COUNT(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_REGISTER_COUNT st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 8));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_REGISTER_COUNT(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_REGISTER_COUNT __data = { .v = (args) }; \
    __NVC097_SET_PIPELINE_REGISTER_COUNT(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_REGISTER_COUNT(i) V_NVC097_SET_PIPELINE_REGISTER_COUNT

#define P_NVC097_SET_PIPELINE_REGISTER_COUNT(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_REGISTER_COUNT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_REGISTER_COUNT(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_BINDING {
    uint32_t group;
};

static inline void
__NVC097_SET_PIPELINE_BINDING(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_BINDING st)
{
    uint32_t val = 0;
    
    assert(st.group < (UINT64_C(1) << 3));
    val |= st.group << 0;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_BINDING(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_BINDING __data = { .group = (args) }; \
    __NVC097_SET_PIPELINE_BINDING(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_BINDING(i) V_NVC097_SET_PIPELINE_BINDING

#define P_NVC097_SET_PIPELINE_BINDING(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_BINDING(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_BINDING(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_RESERVED_B {
    uint32_t v;
};

static inline void
__NVC097_SET_PIPELINE_RESERVED_B(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_RESERVED_B st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_RESERVED_B(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_RESERVED_B __data = { .v = (args) }; \
    __NVC097_SET_PIPELINE_RESERVED_B(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_RESERVED_B(i) V_NVC097_SET_PIPELINE_RESERVED_B

#define P_NVC097_SET_PIPELINE_RESERVED_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_RESERVED_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_RESERVED_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_RESERVED_C {
    uint32_t v;
};

static inline void
__NVC097_SET_PIPELINE_RESERVED_C(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_RESERVED_C st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_RESERVED_C(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_RESERVED_C __data = { .v = (args) }; \
    __NVC097_SET_PIPELINE_RESERVED_C(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_RESERVED_C(i) V_NVC097_SET_PIPELINE_RESERVED_C

#define P_NVC097_SET_PIPELINE_RESERVED_C(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_RESERVED_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_RESERVED_C(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_RESERVED_D {
    uint32_t v;
};

static inline void
__NVC097_SET_PIPELINE_RESERVED_D(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_RESERVED_D st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_RESERVED_D(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_RESERVED_D __data = { .v = (args) }; \
    __NVC097_SET_PIPELINE_RESERVED_D(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_RESERVED_D(i) V_NVC097_SET_PIPELINE_RESERVED_D

#define P_NVC097_SET_PIPELINE_RESERVED_D(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_RESERVED_D(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_RESERVED_D(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_PIPELINE_RESERVED_E {
    uint32_t v;
};

static inline void
__NVC097_SET_PIPELINE_RESERVED_E(uint32_t *val_out, struct nv_nvc097_SET_PIPELINE_RESERVED_E st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_SET_PIPELINE_RESERVED_E(val, args...) { \
    struct nv_nvc097_SET_PIPELINE_RESERVED_E __data = { .v = (args) }; \
    __NVC097_SET_PIPELINE_RESERVED_E(&val, __data); \
}

#define VA_NVC097_SET_PIPELINE_RESERVED_E(i) V_NVC097_SET_PIPELINE_RESERVED_E

#define P_NVC097_SET_PIPELINE_RESERVED_E(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_PIPELINE_RESERVED_E(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_PIPELINE_RESERVED_E(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON00 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON00(uint32_t *val_out, struct nv_nvc097_SET_FALCON00 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON00(val, args...) { \
    struct nv_nvc097_SET_FALCON00 __data = { .v = (args) }; \
    __NVC097_SET_FALCON00(&val, __data); \
}

#define VA_NVC097_SET_FALCON00 V_NVC097_SET_FALCON00

#define P_NVC097_SET_FALCON00(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON00(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON00, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON01 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON01(uint32_t *val_out, struct nv_nvc097_SET_FALCON01 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON01(val, args...) { \
    struct nv_nvc097_SET_FALCON01 __data = { .v = (args) }; \
    __NVC097_SET_FALCON01(&val, __data); \
}

#define VA_NVC097_SET_FALCON01 V_NVC097_SET_FALCON01

#define P_NVC097_SET_FALCON01(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON01(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON01, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON02 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON02(uint32_t *val_out, struct nv_nvc097_SET_FALCON02 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON02(val, args...) { \
    struct nv_nvc097_SET_FALCON02 __data = { .v = (args) }; \
    __NVC097_SET_FALCON02(&val, __data); \
}

#define VA_NVC097_SET_FALCON02 V_NVC097_SET_FALCON02

#define P_NVC097_SET_FALCON02(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON02(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON02, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON03 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON03(uint32_t *val_out, struct nv_nvc097_SET_FALCON03 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON03(val, args...) { \
    struct nv_nvc097_SET_FALCON03 __data = { .v = (args) }; \
    __NVC097_SET_FALCON03(&val, __data); \
}

#define VA_NVC097_SET_FALCON03 V_NVC097_SET_FALCON03

#define P_NVC097_SET_FALCON03(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON03(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON03, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON04 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON04(uint32_t *val_out, struct nv_nvc097_SET_FALCON04 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON04(val, args...) { \
    struct nv_nvc097_SET_FALCON04 __data = { .v = (args) }; \
    __NVC097_SET_FALCON04(&val, __data); \
}

#define VA_NVC097_SET_FALCON04 V_NVC097_SET_FALCON04

#define P_NVC097_SET_FALCON04(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON04(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON04, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON05 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON05(uint32_t *val_out, struct nv_nvc097_SET_FALCON05 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON05(val, args...) { \
    struct nv_nvc097_SET_FALCON05 __data = { .v = (args) }; \
    __NVC097_SET_FALCON05(&val, __data); \
}

#define VA_NVC097_SET_FALCON05 V_NVC097_SET_FALCON05

#define P_NVC097_SET_FALCON05(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON05(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON05, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON06 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON06(uint32_t *val_out, struct nv_nvc097_SET_FALCON06 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON06(val, args...) { \
    struct nv_nvc097_SET_FALCON06 __data = { .v = (args) }; \
    __NVC097_SET_FALCON06(&val, __data); \
}

#define VA_NVC097_SET_FALCON06 V_NVC097_SET_FALCON06

#define P_NVC097_SET_FALCON06(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON06(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON06, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON07 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON07(uint32_t *val_out, struct nv_nvc097_SET_FALCON07 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON07(val, args...) { \
    struct nv_nvc097_SET_FALCON07 __data = { .v = (args) }; \
    __NVC097_SET_FALCON07(&val, __data); \
}

#define VA_NVC097_SET_FALCON07 V_NVC097_SET_FALCON07

#define P_NVC097_SET_FALCON07(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON07(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON07, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON08 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON08(uint32_t *val_out, struct nv_nvc097_SET_FALCON08 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON08(val, args...) { \
    struct nv_nvc097_SET_FALCON08 __data = { .v = (args) }; \
    __NVC097_SET_FALCON08(&val, __data); \
}

#define VA_NVC097_SET_FALCON08 V_NVC097_SET_FALCON08

#define P_NVC097_SET_FALCON08(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON08(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON08, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON09 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON09(uint32_t *val_out, struct nv_nvc097_SET_FALCON09 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON09(val, args...) { \
    struct nv_nvc097_SET_FALCON09 __data = { .v = (args) }; \
    __NVC097_SET_FALCON09(&val, __data); \
}

#define VA_NVC097_SET_FALCON09 V_NVC097_SET_FALCON09

#define P_NVC097_SET_FALCON09(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON09(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON09, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON10 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON10(uint32_t *val_out, struct nv_nvc097_SET_FALCON10 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON10(val, args...) { \
    struct nv_nvc097_SET_FALCON10 __data = { .v = (args) }; \
    __NVC097_SET_FALCON10(&val, __data); \
}

#define VA_NVC097_SET_FALCON10 V_NVC097_SET_FALCON10

#define P_NVC097_SET_FALCON10(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON10(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON10, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON11 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON11(uint32_t *val_out, struct nv_nvc097_SET_FALCON11 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON11(val, args...) { \
    struct nv_nvc097_SET_FALCON11 __data = { .v = (args) }; \
    __NVC097_SET_FALCON11(&val, __data); \
}

#define VA_NVC097_SET_FALCON11 V_NVC097_SET_FALCON11

#define P_NVC097_SET_FALCON11(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON11(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON11, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON12 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON12(uint32_t *val_out, struct nv_nvc097_SET_FALCON12 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON12(val, args...) { \
    struct nv_nvc097_SET_FALCON12 __data = { .v = (args) }; \
    __NVC097_SET_FALCON12(&val, __data); \
}

#define VA_NVC097_SET_FALCON12 V_NVC097_SET_FALCON12

#define P_NVC097_SET_FALCON12(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON12(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON12, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON13 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON13(uint32_t *val_out, struct nv_nvc097_SET_FALCON13 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON13(val, args...) { \
    struct nv_nvc097_SET_FALCON13 __data = { .v = (args) }; \
    __NVC097_SET_FALCON13(&val, __data); \
}

#define VA_NVC097_SET_FALCON13 V_NVC097_SET_FALCON13

#define P_NVC097_SET_FALCON13(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON13(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON13, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON14 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON14(uint32_t *val_out, struct nv_nvc097_SET_FALCON14 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON14(val, args...) { \
    struct nv_nvc097_SET_FALCON14 __data = { .v = (args) }; \
    __NVC097_SET_FALCON14(&val, __data); \
}

#define VA_NVC097_SET_FALCON14 V_NVC097_SET_FALCON14

#define P_NVC097_SET_FALCON14(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON14(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON14, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON15 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON15(uint32_t *val_out, struct nv_nvc097_SET_FALCON15 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON15(val, args...) { \
    struct nv_nvc097_SET_FALCON15 __data = { .v = (args) }; \
    __NVC097_SET_FALCON15(&val, __data); \
}

#define VA_NVC097_SET_FALCON15 V_NVC097_SET_FALCON15

#define P_NVC097_SET_FALCON15(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON15(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON15, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON16 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON16(uint32_t *val_out, struct nv_nvc097_SET_FALCON16 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON16(val, args...) { \
    struct nv_nvc097_SET_FALCON16 __data = { .v = (args) }; \
    __NVC097_SET_FALCON16(&val, __data); \
}

#define VA_NVC097_SET_FALCON16 V_NVC097_SET_FALCON16

#define P_NVC097_SET_FALCON16(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON16(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON16, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON17 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON17(uint32_t *val_out, struct nv_nvc097_SET_FALCON17 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON17(val, args...) { \
    struct nv_nvc097_SET_FALCON17 __data = { .v = (args) }; \
    __NVC097_SET_FALCON17(&val, __data); \
}

#define VA_NVC097_SET_FALCON17 V_NVC097_SET_FALCON17

#define P_NVC097_SET_FALCON17(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON17(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON17, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON18 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON18(uint32_t *val_out, struct nv_nvc097_SET_FALCON18 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON18(val, args...) { \
    struct nv_nvc097_SET_FALCON18 __data = { .v = (args) }; \
    __NVC097_SET_FALCON18(&val, __data); \
}

#define VA_NVC097_SET_FALCON18 V_NVC097_SET_FALCON18

#define P_NVC097_SET_FALCON18(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON18(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON18, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON19 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON19(uint32_t *val_out, struct nv_nvc097_SET_FALCON19 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON19(val, args...) { \
    struct nv_nvc097_SET_FALCON19 __data = { .v = (args) }; \
    __NVC097_SET_FALCON19(&val, __data); \
}

#define VA_NVC097_SET_FALCON19 V_NVC097_SET_FALCON19

#define P_NVC097_SET_FALCON19(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON19(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON19, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON20 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON20(uint32_t *val_out, struct nv_nvc097_SET_FALCON20 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON20(val, args...) { \
    struct nv_nvc097_SET_FALCON20 __data = { .v = (args) }; \
    __NVC097_SET_FALCON20(&val, __data); \
}

#define VA_NVC097_SET_FALCON20 V_NVC097_SET_FALCON20

#define P_NVC097_SET_FALCON20(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON20(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON20, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON21 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON21(uint32_t *val_out, struct nv_nvc097_SET_FALCON21 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON21(val, args...) { \
    struct nv_nvc097_SET_FALCON21 __data = { .v = (args) }; \
    __NVC097_SET_FALCON21(&val, __data); \
}

#define VA_NVC097_SET_FALCON21 V_NVC097_SET_FALCON21

#define P_NVC097_SET_FALCON21(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON21(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON21, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON22 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON22(uint32_t *val_out, struct nv_nvc097_SET_FALCON22 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON22(val, args...) { \
    struct nv_nvc097_SET_FALCON22 __data = { .v = (args) }; \
    __NVC097_SET_FALCON22(&val, __data); \
}

#define VA_NVC097_SET_FALCON22 V_NVC097_SET_FALCON22

#define P_NVC097_SET_FALCON22(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON22(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON22, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON23 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON23(uint32_t *val_out, struct nv_nvc097_SET_FALCON23 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON23(val, args...) { \
    struct nv_nvc097_SET_FALCON23 __data = { .v = (args) }; \
    __NVC097_SET_FALCON23(&val, __data); \
}

#define VA_NVC097_SET_FALCON23 V_NVC097_SET_FALCON23

#define P_NVC097_SET_FALCON23(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON23(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON23, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON24 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON24(uint32_t *val_out, struct nv_nvc097_SET_FALCON24 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON24(val, args...) { \
    struct nv_nvc097_SET_FALCON24 __data = { .v = (args) }; \
    __NVC097_SET_FALCON24(&val, __data); \
}

#define VA_NVC097_SET_FALCON24 V_NVC097_SET_FALCON24

#define P_NVC097_SET_FALCON24(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON24(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON24, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON25 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON25(uint32_t *val_out, struct nv_nvc097_SET_FALCON25 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON25(val, args...) { \
    struct nv_nvc097_SET_FALCON25 __data = { .v = (args) }; \
    __NVC097_SET_FALCON25(&val, __data); \
}

#define VA_NVC097_SET_FALCON25 V_NVC097_SET_FALCON25

#define P_NVC097_SET_FALCON25(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON25(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON25, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON26 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON26(uint32_t *val_out, struct nv_nvc097_SET_FALCON26 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON26(val, args...) { \
    struct nv_nvc097_SET_FALCON26 __data = { .v = (args) }; \
    __NVC097_SET_FALCON26(&val, __data); \
}

#define VA_NVC097_SET_FALCON26 V_NVC097_SET_FALCON26

#define P_NVC097_SET_FALCON26(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON26(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON26, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON27 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON27(uint32_t *val_out, struct nv_nvc097_SET_FALCON27 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON27(val, args...) { \
    struct nv_nvc097_SET_FALCON27 __data = { .v = (args) }; \
    __NVC097_SET_FALCON27(&val, __data); \
}

#define VA_NVC097_SET_FALCON27 V_NVC097_SET_FALCON27

#define P_NVC097_SET_FALCON27(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON27(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON27, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON28 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON28(uint32_t *val_out, struct nv_nvc097_SET_FALCON28 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON28(val, args...) { \
    struct nv_nvc097_SET_FALCON28 __data = { .v = (args) }; \
    __NVC097_SET_FALCON28(&val, __data); \
}

#define VA_NVC097_SET_FALCON28 V_NVC097_SET_FALCON28

#define P_NVC097_SET_FALCON28(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON28(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON28, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON29 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON29(uint32_t *val_out, struct nv_nvc097_SET_FALCON29 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON29(val, args...) { \
    struct nv_nvc097_SET_FALCON29 __data = { .v = (args) }; \
    __NVC097_SET_FALCON29(&val, __data); \
}

#define VA_NVC097_SET_FALCON29 V_NVC097_SET_FALCON29

#define P_NVC097_SET_FALCON29(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON29(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON29, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON30 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON30(uint32_t *val_out, struct nv_nvc097_SET_FALCON30 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON30(val, args...) { \
    struct nv_nvc097_SET_FALCON30 __data = { .v = (args) }; \
    __NVC097_SET_FALCON30(&val, __data); \
}

#define VA_NVC097_SET_FALCON30 V_NVC097_SET_FALCON30

#define P_NVC097_SET_FALCON30(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON30(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON30, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_FALCON31 {
    uint32_t v;
};

static inline void
__NVC097_SET_FALCON31(uint32_t *val_out, struct nv_nvc097_SET_FALCON31 st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_FALCON31(val, args...) { \
    struct nv_nvc097_SET_FALCON31 __data = { .v = (args) }; \
    __NVC097_SET_FALCON31(&val, __data); \
}

#define VA_NVC097_SET_FALCON31 V_NVC097_SET_FALCON31

#define P_NVC097_SET_FALCON31(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_FALCON31(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_FALCON31, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_A {
    uint32_t size;
};

static inline void
__NVC097_SET_CONSTANT_BUFFER_SELECTOR_A(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_A st)
{
    uint32_t val = 0;
    
    assert(st.size < (UINT64_C(1) << 17));
    val |= st.size << 0;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_A(val, args...) { \
    struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_A __data = { .size = (args) }; \
    __NVC097_SET_CONSTANT_BUFFER_SELECTOR_A(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_BUFFER_SELECTOR_A V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_A

#define P_NVC097_SET_CONSTANT_BUFFER_SELECTOR_A(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_BUFFER_SELECTOR_A, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_B {
    uint32_t address_upper;
};

static inline void
__NVC097_SET_CONSTANT_BUFFER_SELECTOR_B(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_B st)
{
    uint32_t val = 0;
    
    assert(st.address_upper < (UINT64_C(1) << 8));
    val |= st.address_upper << 0;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_B(val, args...) { \
    struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_B __data = { .address_upper = (args) }; \
    __NVC097_SET_CONSTANT_BUFFER_SELECTOR_B(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_BUFFER_SELECTOR_B V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_B

#define P_NVC097_SET_CONSTANT_BUFFER_SELECTOR_B(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_BUFFER_SELECTOR_B, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_C {
    uint32_t address_lower;
};

static inline void
__NVC097_SET_CONSTANT_BUFFER_SELECTOR_C(uint32_t *val_out, struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_C st)
{
    uint32_t val = 0;
    
    val |= st.address_lower;
    *val_out = val;
}

#define V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_C(val, args...) { \
    struct nv_nvc097_SET_CONSTANT_BUFFER_SELECTOR_C __data = { .address_lower = (args) }; \
    __NVC097_SET_CONSTANT_BUFFER_SELECTOR_C(&val, __data); \
}

#define VA_NVC097_SET_CONSTANT_BUFFER_SELECTOR_C V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_C

#define P_NVC097_SET_CONSTANT_BUFFER_SELECTOR_C(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_CONSTANT_BUFFER_SELECTOR_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_CONSTANT_BUFFER_SELECTOR_C, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_CONSTANT_BUFFER_OFFSET {
    uint32_t v;
};

static inline void
__NVC097_LOAD_CONSTANT_BUFFER_OFFSET(uint32_t *val_out, struct nv_nvc097_LOAD_CONSTANT_BUFFER_OFFSET st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 16));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_LOAD_CONSTANT_BUFFER_OFFSET(val, args...) { \
    struct nv_nvc097_LOAD_CONSTANT_BUFFER_OFFSET __data = { .v = (args) }; \
    __NVC097_LOAD_CONSTANT_BUFFER_OFFSET(&val, __data); \
}

#define VA_NVC097_LOAD_CONSTANT_BUFFER_OFFSET V_NVC097_LOAD_CONSTANT_BUFFER_OFFSET

#define P_NVC097_LOAD_CONSTANT_BUFFER_OFFSET(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_CONSTANT_BUFFER_OFFSET(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_CONSTANT_BUFFER_OFFSET, nvk_p_ret); \
} while(0)

struct nv_nvc097_LOAD_CONSTANT_BUFFER {
    uint32_t v;
};

static inline void
__NVC097_LOAD_CONSTANT_BUFFER(uint32_t *val_out, struct nv_nvc097_LOAD_CONSTANT_BUFFER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_LOAD_CONSTANT_BUFFER(val, args...) { \
    struct nv_nvc097_LOAD_CONSTANT_BUFFER __data = { .v = (args) }; \
    __NVC097_LOAD_CONSTANT_BUFFER(&val, __data); \
}

#define VA_NVC097_LOAD_CONSTANT_BUFFER(i) V_NVC097_LOAD_CONSTANT_BUFFER

#define P_NVC097_LOAD_CONSTANT_BUFFER(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_LOAD_CONSTANT_BUFFER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_LOAD_CONSTANT_BUFFER(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_BIND_GROUP_RESERVED_A {
    uint32_t v;
};

static inline void
__NVC097_BIND_GROUP_RESERVED_A(uint32_t *val_out, struct nv_nvc097_BIND_GROUP_RESERVED_A st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_BIND_GROUP_RESERVED_A(val, args...) { \
    struct nv_nvc097_BIND_GROUP_RESERVED_A __data = { .v = (args) }; \
    __NVC097_BIND_GROUP_RESERVED_A(&val, __data); \
}

#define VA_NVC097_BIND_GROUP_RESERVED_A(i) V_NVC097_BIND_GROUP_RESERVED_A

#define P_NVC097_BIND_GROUP_RESERVED_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_BIND_GROUP_RESERVED_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_BIND_GROUP_RESERVED_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_BIND_GROUP_RESERVED_B {
    uint32_t v;
};

static inline void
__NVC097_BIND_GROUP_RESERVED_B(uint32_t *val_out, struct nv_nvc097_BIND_GROUP_RESERVED_B st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_BIND_GROUP_RESERVED_B(val, args...) { \
    struct nv_nvc097_BIND_GROUP_RESERVED_B __data = { .v = (args) }; \
    __NVC097_BIND_GROUP_RESERVED_B(&val, __data); \
}

#define VA_NVC097_BIND_GROUP_RESERVED_B(i) V_NVC097_BIND_GROUP_RESERVED_B

#define P_NVC097_BIND_GROUP_RESERVED_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_BIND_GROUP_RESERVED_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_BIND_GROUP_RESERVED_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_BIND_GROUP_RESERVED_C {
    uint32_t v;
};

static inline void
__NVC097_BIND_GROUP_RESERVED_C(uint32_t *val_out, struct nv_nvc097_BIND_GROUP_RESERVED_C st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_BIND_GROUP_RESERVED_C(val, args...) { \
    struct nv_nvc097_BIND_GROUP_RESERVED_C __data = { .v = (args) }; \
    __NVC097_BIND_GROUP_RESERVED_C(&val, __data); \
}

#define VA_NVC097_BIND_GROUP_RESERVED_C(i) V_NVC097_BIND_GROUP_RESERVED_C

#define P_NVC097_BIND_GROUP_RESERVED_C(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_BIND_GROUP_RESERVED_C(nvk_p_ret, args); \
    nv_push_val(push, NVC097_BIND_GROUP_RESERVED_C(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_BIND_GROUP_RESERVED_D {
    uint32_t v;
};

static inline void
__NVC097_BIND_GROUP_RESERVED_D(uint32_t *val_out, struct nv_nvc097_BIND_GROUP_RESERVED_D st)
{
    uint32_t val = 0;
    
    assert(st.v < (UINT64_C(1) << 1));
    val |= st.v << 0;
    *val_out = val;
}

#define V_NVC097_BIND_GROUP_RESERVED_D(val, args...) { \
    struct nv_nvc097_BIND_GROUP_RESERVED_D __data = { .v = (args) }; \
    __NVC097_BIND_GROUP_RESERVED_D(&val, __data); \
}

#define VA_NVC097_BIND_GROUP_RESERVED_D(i) V_NVC097_BIND_GROUP_RESERVED_D

#define P_NVC097_BIND_GROUP_RESERVED_D(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_BIND_GROUP_RESERVED_D(nvk_p_ret, args); \
    nv_push_val(push, NVC097_BIND_GROUP_RESERVED_D(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_BIND_GROUP_CONSTANT_BUFFER {
    uint32_t valid;
    uint32_t shader_slot;
};

static inline void
__NVC097_BIND_GROUP_CONSTANT_BUFFER(uint32_t *val_out, struct nv_nvc097_BIND_GROUP_CONSTANT_BUFFER st)
{
    uint32_t val = 0;
    
    assert(st.valid < (UINT64_C(1) << 1));
    val |= st.valid << 0;
    
    assert(st.shader_slot < (UINT64_C(1) << 5));
    val |= st.shader_slot << 4;
    *val_out = val;
}

#define V_NVC097_BIND_GROUP_CONSTANT_BUFFER(val, args...) { \
    UNUSED uint32_t VALID_FALSE = NVC097_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE; \
    UNUSED uint32_t VALID_TRUE = NVC097_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE; \
    struct nv_nvc097_BIND_GROUP_CONSTANT_BUFFER __data = args; \
    __NVC097_BIND_GROUP_CONSTANT_BUFFER(&val, __data); \
}

#define VA_NVC097_BIND_GROUP_CONSTANT_BUFFER(i) V_NVC097_BIND_GROUP_CONSTANT_BUFFER

#define P_NVC097_BIND_GROUP_CONSTANT_BUFFER(push, idx, args...) do { \
    UNUSED uint32_t VALID_FALSE = NVC097_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE; \
    UNUSED uint32_t VALID_TRUE = NVC097_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_BIND_GROUP_CONSTANT_BUFFER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_BIND_GROUP_CONSTANT_BUFFER(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_COLOR_CLAMP {
    uint32_t enable;
};

static inline void
__NVC097_SET_COLOR_CLAMP(uint32_t *val_out, struct nv_nvc097_SET_COLOR_CLAMP st)
{
    uint32_t val = 0;
    
    assert(st.enable < (UINT64_C(1) << 1));
    val |= st.enable << 0;
    *val_out = val;
}

#define V_NVC097_SET_COLOR_CLAMP(val, args...) { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_COLOR_CLAMP_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_COLOR_CLAMP_ENABLE_TRUE; \
    struct nv_nvc097_SET_COLOR_CLAMP __data = { .enable = (args) }; \
    __NVC097_SET_COLOR_CLAMP(&val, __data); \
}

#define VA_NVC097_SET_COLOR_CLAMP V_NVC097_SET_COLOR_CLAMP

#define P_NVC097_SET_COLOR_CLAMP(push, args...) do { \
    UNUSED uint32_t ENABLE_FALSE = NVC097_SET_COLOR_CLAMP_ENABLE_FALSE; \
    UNUSED uint32_t ENABLE_TRUE = NVC097_SET_COLOR_CLAMP_ENABLE_TRUE; \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_COLOR_CLAMP(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_COLOR_CLAMP, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_BINDLESS_TEXTURE {
    uint32_t constant_buffer_slot_select;
};

static inline void
__NVC097_SET_BINDLESS_TEXTURE(uint32_t *val_out, struct nv_nvc097_SET_BINDLESS_TEXTURE st)
{
    uint32_t val = 0;
    
    assert(st.constant_buffer_slot_select < (UINT64_C(1) << 5));
    val |= st.constant_buffer_slot_select << 0;
    *val_out = val;
}

#define V_NVC097_SET_BINDLESS_TEXTURE(val, args...) { \
    struct nv_nvc097_SET_BINDLESS_TEXTURE __data = { .constant_buffer_slot_select = (args) }; \
    __NVC097_SET_BINDLESS_TEXTURE(&val, __data); \
}

#define VA_NVC097_SET_BINDLESS_TEXTURE V_NVC097_SET_BINDLESS_TEXTURE

#define P_NVC097_SET_BINDLESS_TEXTURE(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_BINDLESS_TEXTURE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_BINDLESS_TEXTURE, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_TRAP_HANDLER {
    uint32_t offset;
};

static inline void
__NVC097_SET_TRAP_HANDLER(uint32_t *val_out, struct nv_nvc097_SET_TRAP_HANDLER st)
{
    uint32_t val = 0;
    
    val |= st.offset;
    *val_out = val;
}

#define V_NVC097_SET_TRAP_HANDLER(val, args...) { \
    struct nv_nvc097_SET_TRAP_HANDLER __data = { .offset = (args) }; \
    __NVC097_SET_TRAP_HANDLER(&val, __data); \
}

#define VA_NVC097_SET_TRAP_HANDLER V_NVC097_SET_TRAP_HANDLER

#define P_NVC097_SET_TRAP_HANDLER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_TRAP_HANDLER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_TRAP_HANDLER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER {
    uint32_t v;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER __data = { .v = (args) }; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_VALUE {
    uint32_t v;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_VALUE st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_VALUE __data = { .v = (args) }; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_EVENT {
    uint32_t event;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_EVENT st)
{
    uint32_t val = 0;
    
    assert(st.event < (UINT64_C(1) << 8));
    val |= st.event << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_EVENT __data = { .event = (args) }; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A {
    uint32_t event0;
    uint32_t bit_select0;
    uint32_t event1;
    uint32_t bit_select1;
    uint32_t event2;
    uint32_t bit_select2;
    uint32_t event3;
    uint32_t bit_select3;
    uint32_t event4;
    uint32_t bit_select4;
    uint32_t event5;
    uint32_t bit_select5;
    uint32_t spare;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A st)
{
    uint32_t val = 0;
    
    assert(st.event0 < (UINT64_C(1) << 2));
    val |= st.event0 << 0;
    
    assert(st.bit_select0 < (UINT64_C(1) << 3));
    val |= st.bit_select0 << 2;
    
    assert(st.event1 < (UINT64_C(1) << 2));
    val |= st.event1 << 5;
    
    assert(st.bit_select1 < (UINT64_C(1) << 3));
    val |= st.bit_select1 << 7;
    
    assert(st.event2 < (UINT64_C(1) << 2));
    val |= st.event2 << 10;
    
    assert(st.bit_select2 < (UINT64_C(1) << 3));
    val |= st.bit_select2 << 12;
    
    assert(st.event3 < (UINT64_C(1) << 2));
    val |= st.event3 << 15;
    
    assert(st.bit_select3 < (UINT64_C(1) << 3));
    val |= st.bit_select3 << 17;
    
    assert(st.event4 < (UINT64_C(1) << 2));
    val |= st.event4 << 20;
    
    assert(st.bit_select4 < (UINT64_C(1) << 3));
    val |= st.bit_select4 << 22;
    
    assert(st.event5 < (UINT64_C(1) << 2));
    val |= st.event5 << 25;
    
    assert(st.bit_select5 < (UINT64_C(1) << 3));
    val |= st.bit_select5 << 27;
    
    assert(st.spare < (UINT64_C(1) << 2));
    val |= st.spare << 30;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A __data = args; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B {
    uint32_t edge;
    uint32_t mode;
    uint32_t windowed;
    uint32_t func;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B st)
{
    uint32_t val = 0;
    
    assert(st.edge < (UINT64_C(1) << 1));
    val |= st.edge << 0;
    
    assert(st.mode < (UINT64_C(1) << 2));
    val |= st.mode << 1;
    
    assert(st.windowed < (UINT64_C(1) << 1));
    val |= st.windowed << 3;
    
    assert(st.func < (UINT64_C(1) << 16));
    val |= st.func << 4;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B __data = args; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL {
    uint32_t mask;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL st)
{
    uint32_t val = 0;
    
    assert(st.mask < (UINT64_C(1) << 8));
    val |= st.mask << 0;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL __data = { .mask = (args) }; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL, nvk_p_ret); \
} while(0)

struct nv_nvc097_START_SHADER_PERFORMANCE_COUNTER {
    uint32_t counter_mask;
};

static inline void
__NVC097_START_SHADER_PERFORMANCE_COUNTER(uint32_t *val_out, struct nv_nvc097_START_SHADER_PERFORMANCE_COUNTER st)
{
    uint32_t val = 0;
    
    assert(st.counter_mask < (UINT64_C(1) << 8));
    val |= st.counter_mask << 0;
    *val_out = val;
}

#define V_NVC097_START_SHADER_PERFORMANCE_COUNTER(val, args...) { \
    struct nv_nvc097_START_SHADER_PERFORMANCE_COUNTER __data = { .counter_mask = (args) }; \
    __NVC097_START_SHADER_PERFORMANCE_COUNTER(&val, __data); \
}

#define VA_NVC097_START_SHADER_PERFORMANCE_COUNTER V_NVC097_START_SHADER_PERFORMANCE_COUNTER

#define P_NVC097_START_SHADER_PERFORMANCE_COUNTER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_START_SHADER_PERFORMANCE_COUNTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_START_SHADER_PERFORMANCE_COUNTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_STOP_SHADER_PERFORMANCE_COUNTER {
    uint32_t counter_mask;
};

static inline void
__NVC097_STOP_SHADER_PERFORMANCE_COUNTER(uint32_t *val_out, struct nv_nvc097_STOP_SHADER_PERFORMANCE_COUNTER st)
{
    uint32_t val = 0;
    
    assert(st.counter_mask < (UINT64_C(1) << 8));
    val |= st.counter_mask << 0;
    *val_out = val;
}

#define V_NVC097_STOP_SHADER_PERFORMANCE_COUNTER(val, args...) { \
    struct nv_nvc097_STOP_SHADER_PERFORMANCE_COUNTER __data = { .counter_mask = (args) }; \
    __NVC097_STOP_SHADER_PERFORMANCE_COUNTER(&val, __data); \
}

#define VA_NVC097_STOP_SHADER_PERFORMANCE_COUNTER V_NVC097_STOP_SHADER_PERFORMANCE_COUNTER

#define P_NVC097_STOP_SHADER_PERFORMANCE_COUNTER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_STOP_SHADER_PERFORMANCE_COUNTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_STOP_SHADER_PERFORMANCE_COUNTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER {
    uint32_t v;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER __data = { .v = (args) }; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER {
    uint32_t v;
};

static inline void
__NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER(uint32_t *val_out, struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER(val, args...) { \
    struct nv_nvc097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER __data = { .v = (args) }; \
    __NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER(&val, __data); \
}

#define VA_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER

#define P_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER(push, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER, nvk_p_ret); \
} while(0)

struct nv_nvc097_SET_MME_SHADOW_SCRATCH {
    uint32_t v;
};

static inline void
__NVC097_SET_MME_SHADOW_SCRATCH(uint32_t *val_out, struct nv_nvc097_SET_MME_SHADOW_SCRATCH st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_SET_MME_SHADOW_SCRATCH(val, args...) { \
    struct nv_nvc097_SET_MME_SHADOW_SCRATCH __data = { .v = (args) }; \
    __NVC097_SET_MME_SHADOW_SCRATCH(&val, __data); \
}

#define VA_NVC097_SET_MME_SHADOW_SCRATCH(i) V_NVC097_SET_MME_SHADOW_SCRATCH

#define P_NVC097_SET_MME_SHADOW_SCRATCH(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_SET_MME_SHADOW_SCRATCH(nvk_p_ret, args); \
    nv_push_val(push, NVC097_SET_MME_SHADOW_SCRATCH(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_CALL_MME_MACRO {
    uint32_t v;
};

static inline void
__NVC097_CALL_MME_MACRO(uint32_t *val_out, struct nv_nvc097_CALL_MME_MACRO st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_CALL_MME_MACRO(val, args...) { \
    struct nv_nvc097_CALL_MME_MACRO __data = { .v = (args) }; \
    __NVC097_CALL_MME_MACRO(&val, __data); \
}

#define VA_NVC097_CALL_MME_MACRO(i) V_NVC097_CALL_MME_MACRO

#define P_NVC097_CALL_MME_MACRO(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_CALL_MME_MACRO(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CALL_MME_MACRO(idx), nvk_p_ret); \
} while(0)

struct nv_nvc097_CALL_MME_DATA {
    uint32_t v;
};

static inline void
__NVC097_CALL_MME_DATA(uint32_t *val_out, struct nv_nvc097_CALL_MME_DATA st)
{
    uint32_t val = 0;
    
    val |= st.v;
    *val_out = val;
}

#define V_NVC097_CALL_MME_DATA(val, args...) { \
    struct nv_nvc097_CALL_MME_DATA __data = { .v = (args) }; \
    __NVC097_CALL_MME_DATA(&val, __data); \
}

#define VA_NVC097_CALL_MME_DATA(i) V_NVC097_CALL_MME_DATA

#define P_NVC097_CALL_MME_DATA(push, idx, args...) do { \
    uint32_t nvk_p_ret; \
    V_NVC097_CALL_MME_DATA(nvk_p_ret, args); \
    nv_push_val(push, NVC097_CALL_MME_DATA(idx), nvk_p_ret); \
} while(0)


const char *P_PARSE_NVC097_MTHD(uint16_t idx) ATTRIBUTE_COLD;
void P_DUMP_NVC097_MTHD_DATA(FILE *fp, uint16_t idx, uint32_t data,
                              const char *prefix) ATTRIBUTE_COLD;
